License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 21:07:57 +07:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2005-04-17 05:20:36 +07:00
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/* rwsem.h: R/W semaphores implemented using XADD/CMPXCHG for i486+
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*
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* Written by David Howells (dhowells@redhat.com).
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*
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2008-01-30 19:30:28 +07:00
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* Derived from asm-x86/semaphore.h
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2005-04-17 05:20:36 +07:00
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*
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*
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* The MSW of the count is the negated number of active writers and waiting
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* lockers, and the LSW is the total number of active locks
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*
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* The lock count is initialized to 0 (no active and no waiting lockers).
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*
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* When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case of an
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* uncontended lock. This can be determined because XADD returns the old value.
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* Readers increment by 1 and see a positive value when uncontended, negative
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* if there are writers (and maybe) readers waiting (in which case it goes to
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* sleep).
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*
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* The value of WAITING_BIAS supports up to 32766 waiting processes. This can
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* be extended to 65534 by manually checking the whole MSW rather than relying
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* on the S flag.
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*
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* The value of ACTIVE_BIAS supports up to 65535 active processes.
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*
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* This should be totally fair - if anything is waiting, a process that wants a
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* lock will go to the back of the queue. When the currently active lock is
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* released, if there's a writer at the front of the queue, then that and only
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2016-02-24 06:34:30 +07:00
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* that will be woken up; if there's a bunch of consecutive readers at the
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2005-04-17 05:20:36 +07:00
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* front, then they'll all be woken up, but no other readers will be.
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*/
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2008-10-23 12:26:29 +07:00
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#ifndef _ASM_X86_RWSEM_H
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#define _ASM_X86_RWSEM_H
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2005-04-17 05:20:36 +07:00
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#ifndef _LINUX_RWSEM_H
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#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
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#endif
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#ifdef __KERNEL__
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2010-01-19 05:00:34 +07:00
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#include <asm/asm.h>
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2005-04-17 05:20:36 +07:00
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/*
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2010-01-19 05:00:34 +07:00
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* The bias values and the counter type limits the number of
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* potential readers/writers to 32767 for 32 bits and 2147483647
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* for 64 bits.
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2005-04-17 05:20:36 +07:00
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*/
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2008-03-23 15:03:21 +07:00
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2010-01-19 05:00:34 +07:00
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#ifdef CONFIG_X86_64
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# define RWSEM_ACTIVE_MASK 0xffffffffL
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#else
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# define RWSEM_ACTIVE_MASK 0x0000ffffL
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#endif
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#define RWSEM_UNLOCKED_VALUE 0x00000000L
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#define RWSEM_ACTIVE_BIAS 0x00000001L
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#define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1)
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2005-04-17 05:20:36 +07:00
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#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
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#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
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2008-03-23 15:03:21 +07:00
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2005-04-17 05:20:36 +07:00
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/*
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* lock for reading
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*/
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static inline void __down_read(struct rw_semaphore *sem)
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{
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2008-03-23 15:03:21 +07:00
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asm volatile("# beginning down_read\n\t"
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2010-01-19 05:00:34 +07:00
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LOCK_PREFIX _ASM_INC "(%1)\n\t"
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2010-07-21 05:19:45 +07:00
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/* adds 0x00000001 */
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2008-03-23 15:03:21 +07:00
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" jns 1f\n"
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" call call_rwsem_down_read_failed\n"
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"1:\n\t"
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"# ending down_read\n\t"
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: "+m" (sem->count)
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: "a" (sem)
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: "memory", "cc");
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2005-04-17 05:20:36 +07:00
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}
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/*
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* trylock for reading -- returns 1 if successful, 0 if contention
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*/
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2016-06-09 02:38:38 +07:00
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static inline bool __down_read_trylock(struct rw_semaphore *sem)
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2005-04-17 05:20:36 +07:00
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{
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2011-01-27 03:05:53 +07:00
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long result, tmp;
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2008-03-23 15:03:21 +07:00
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asm volatile("# beginning __down_read_trylock\n\t"
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x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 07:21:09 +07:00
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" mov %0,%1\n\t"
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2008-03-23 15:03:21 +07:00
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"1:\n\t"
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x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 07:21:09 +07:00
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|
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" mov %1,%2\n\t"
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|
" add %3,%2\n\t"
|
2008-03-23 15:03:21 +07:00
|
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" jle 2f\n\t"
|
x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 07:21:09 +07:00
|
|
|
LOCK_PREFIX " cmpxchg %2,%0\n\t"
|
2008-03-23 15:03:21 +07:00
|
|
|
" jnz 1b\n\t"
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"2:\n\t"
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"# ending __down_read_trylock\n\t"
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|
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: "+m" (sem->count), "=&a" (result), "=&r" (tmp)
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: "i" (RWSEM_ACTIVE_READ_BIAS)
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: "memory", "cc");
|
2016-06-09 02:38:38 +07:00
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return result >= 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
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|
|
|
/*
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|
* lock for writing
|
|
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*/
|
2016-04-07 22:12:30 +07:00
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#define ____down_write(sem, slow_path) \
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({ \
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long tmp; \
|
2016-04-07 22:12:31 +07:00
|
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struct rw_semaphore* ret; \
|
2016-10-14 04:26:15 +07:00
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\
|
2016-04-07 22:12:30 +07:00
|
|
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asm volatile("# beginning down_write\n\t" \
|
2016-10-14 04:26:15 +07:00
|
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LOCK_PREFIX " xadd %1,(%4)\n\t" \
|
2016-04-07 22:12:30 +07:00
|
|
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/* adds 0xffff0001, returns the old value */ \
|
|
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" test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t" \
|
|
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/* was the active mask 0 before? */\
|
|
|
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" jz 1f\n" \
|
|
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|
" call " slow_path "\n" \
|
|
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"1:\n" \
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"# ending down_write" \
|
x86/asm: Fix inline asm call constraints for Clang
For inline asm statements which have a CALL instruction, we list the
stack pointer as a constraint to convince GCC to ensure the frame
pointer is set up first:
static inline void foo()
{
register void *__sp asm(_ASM_SP);
asm("call bar" : "+r" (__sp))
}
Unfortunately, that pattern causes Clang to corrupt the stack pointer.
The fix is easy: convert the stack pointer register variable to a global
variable.
It should be noted that the end result is different based on the GCC
version. With GCC 6.4, this patch has exactly the same result as
before:
defconfig defconfig-nofp distro distro-nofp
before 9820389 9491555 8816046 8516940
after 9820389 9491555 8816046 8516940
With GCC 7.2, however, GCC's behavior has changed. It now changes its
behavior based on the conversion of the register variable to a global.
That somehow convinces it to *always* set up the frame pointer before
inserting *any* inline asm. (Therefore, listing the variable as an
output constraint is a no-op and is no longer necessary.) It's a bit
overkill, but the performance impact should be negligible. And in fact,
there's a nice improvement with frame pointers disabled:
defconfig defconfig-nofp distro distro-nofp
before 9796316 9468236 9076191 8790305
after 9796957 9464267 9076381 8785949
So in summary, while listing the stack pointer as an output constraint
is no longer necessary for newer versions of GCC, it's still needed for
older versions.
Suggested-by: Andrey Ryabinin <aryabinin@virtuozzo.com>
Reported-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Alexander Potapenko <glider@google.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Dmitriy Vyukov <dvyukov@google.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Miguel Bernal Marin <miguel.bernal.marin@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/3db862e970c432ae823cf515c52b54fec8270e0e.1505942196.git.jpoimboe@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-09-21 04:24:33 +07:00
|
|
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: "+m" (sem->count), "=d" (tmp), \
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"=a" (ret), ASM_CALL_CONSTRAINT \
|
2016-04-07 22:12:30 +07:00
|
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: "a" (sem), "1" (RWSEM_ACTIVE_WRITE_BIAS) \
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: "memory", "cc"); \
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ret; \
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})
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|
|
2016-04-07 22:12:21 +07:00
|
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static inline void __down_write(struct rw_semaphore *sem)
|
2005-04-17 05:20:36 +07:00
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{
|
2016-04-07 22:12:30 +07:00
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____down_write(sem, "call_rwsem_down_write_failed");
|
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}
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static inline int __down_write_killable(struct rw_semaphore *sem)
|
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{
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if (IS_ERR(____down_write(sem, "call_rwsem_down_write_failed_killable")))
|
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return -EINTR;
|
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return 0;
|
2005-04-17 05:20:36 +07:00
|
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}
|
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|
|
|
|
/*
|
|
|
|
* trylock for writing -- returns 1 if successful, 0 if contention
|
|
|
|
*/
|
2016-06-09 02:38:38 +07:00
|
|
|
static inline bool __down_write_trylock(struct rw_semaphore *sem)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2016-06-09 02:38:38 +07:00
|
|
|
bool result;
|
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|
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long tmp0, tmp1;
|
2013-05-07 20:46:01 +07:00
|
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|
asm volatile("# beginning __down_write_trylock\n\t"
|
|
|
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" mov %0,%1\n\t"
|
|
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"1:\n\t"
|
|
|
|
" test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t"
|
|
|
|
/* was the active mask 0 before? */
|
|
|
|
" jnz 2f\n\t"
|
|
|
|
" mov %1,%2\n\t"
|
2016-06-09 02:38:38 +07:00
|
|
|
" add %4,%2\n\t"
|
2013-05-07 20:46:01 +07:00
|
|
|
LOCK_PREFIX " cmpxchg %2,%0\n\t"
|
|
|
|
" jnz 1b\n\t"
|
|
|
|
"2:\n\t"
|
2016-06-09 02:38:44 +07:00
|
|
|
CC_SET(e)
|
2013-05-07 20:46:01 +07:00
|
|
|
"# ending __down_write_trylock\n\t"
|
2016-06-09 02:38:38 +07:00
|
|
|
: "+m" (sem->count), "=&a" (tmp0), "=&r" (tmp1),
|
2016-06-09 02:38:44 +07:00
|
|
|
CC_OUT(e) (result)
|
2013-05-07 20:46:01 +07:00
|
|
|
: "er" (RWSEM_ACTIVE_WRITE_BIAS)
|
2016-09-19 20:27:08 +07:00
|
|
|
: "memory");
|
2013-05-07 20:46:01 +07:00
|
|
|
return result;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* unlock after reading
|
|
|
|
*/
|
|
|
|
static inline void __up_read(struct rw_semaphore *sem)
|
|
|
|
{
|
2011-01-27 03:05:53 +07:00
|
|
|
long tmp;
|
2008-03-23 15:03:21 +07:00
|
|
|
asm volatile("# beginning __up_read\n\t"
|
x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 07:21:09 +07:00
|
|
|
LOCK_PREFIX " xadd %1,(%2)\n\t"
|
2008-03-23 15:03:21 +07:00
|
|
|
/* subtracts 1, returns the old value */
|
|
|
|
" jns 1f\n\t"
|
2010-07-21 05:19:45 +07:00
|
|
|
" call call_rwsem_wake\n" /* expects old value in %edx */
|
2008-03-23 15:03:21 +07:00
|
|
|
"1:\n"
|
|
|
|
"# ending __up_read\n"
|
|
|
|
: "+m" (sem->count), "=d" (tmp)
|
2010-07-21 05:19:45 +07:00
|
|
|
: "a" (sem), "1" (-RWSEM_ACTIVE_READ_BIAS)
|
2008-03-23 15:03:21 +07:00
|
|
|
: "memory", "cc");
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* unlock after writing
|
|
|
|
*/
|
|
|
|
static inline void __up_write(struct rw_semaphore *sem)
|
|
|
|
{
|
2011-01-27 03:05:53 +07:00
|
|
|
long tmp;
|
2008-03-23 15:03:21 +07:00
|
|
|
asm volatile("# beginning __up_write\n\t"
|
x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 07:21:09 +07:00
|
|
|
LOCK_PREFIX " xadd %1,(%2)\n\t"
|
2010-07-21 05:19:45 +07:00
|
|
|
/* subtracts 0xffff0001, returns the old value */
|
|
|
|
" jns 1f\n\t"
|
2010-07-21 05:19:45 +07:00
|
|
|
" call call_rwsem_wake\n" /* expects old value in %edx */
|
2008-03-23 15:03:21 +07:00
|
|
|
"1:\n\t"
|
|
|
|
"# ending __up_write\n"
|
x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 07:21:09 +07:00
|
|
|
: "+m" (sem->count), "=d" (tmp)
|
|
|
|
: "a" (sem), "1" (-RWSEM_ACTIVE_WRITE_BIAS)
|
|
|
|
: "memory", "cc");
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* downgrade write lock to read lock
|
|
|
|
*/
|
|
|
|
static inline void __downgrade_write(struct rw_semaphore *sem)
|
|
|
|
{
|
2008-03-23 15:03:21 +07:00
|
|
|
asm volatile("# beginning __downgrade_write\n\t"
|
2010-01-19 05:00:34 +07:00
|
|
|
LOCK_PREFIX _ASM_ADD "%2,(%1)\n\t"
|
2010-02-13 15:33:12 +07:00
|
|
|
/*
|
|
|
|
* transitions 0xZZZZ0001 -> 0xYYYY0001 (i386)
|
|
|
|
* 0xZZZZZZZZ00000001 -> 0xYYYYYYYY00000001 (x86_64)
|
|
|
|
*/
|
2008-03-23 15:03:21 +07:00
|
|
|
" jns 1f\n\t"
|
|
|
|
" call call_rwsem_downgrade_wake\n"
|
|
|
|
"1:\n\t"
|
|
|
|
"# ending __downgrade_write\n"
|
|
|
|
: "+m" (sem->count)
|
2010-02-13 15:33:12 +07:00
|
|
|
: "a" (sem), "er" (-RWSEM_WAITING_BIAS)
|
2008-03-23 15:03:21 +07:00
|
|
|
: "memory", "cc");
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* __KERNEL__ */
|
2008-10-23 12:26:29 +07:00
|
|
|
#endif /* _ASM_X86_RWSEM_H */
|