2019-05-30 06:57:54 +07:00
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// SPDX-License-Identifier: GPL-2.0-only
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2014-07-08 23:21:12 +07:00
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/*
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* Atmel (Multi-port DDR-)SDRAM Controller driver
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*
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2016-06-17 07:37:43 +07:00
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* Author: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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*
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2014-07-08 23:21:12 +07:00
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* Copyright (C) 2014 Atmel
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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2016-06-17 07:37:43 +07:00
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#include <linux/init.h>
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2014-07-08 23:21:12 +07:00
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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struct at91_ramc_caps {
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bool has_ddrck;
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bool has_mpddr_clk;
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};
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static const struct at91_ramc_caps at91rm9200_caps = { };
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static const struct at91_ramc_caps at91sam9g45_caps = {
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.has_ddrck = 1,
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.has_mpddr_clk = 0,
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};
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static const struct at91_ramc_caps sama5d3_caps = {
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.has_ddrck = 1,
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.has_mpddr_clk = 1,
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};
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static const struct of_device_id atmel_ramc_of_match[] = {
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{ .compatible = "atmel,at91rm9200-sdramc", .data = &at91rm9200_caps, },
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{ .compatible = "atmel,at91sam9260-sdramc", .data = &at91rm9200_caps, },
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{ .compatible = "atmel,at91sam9g45-ddramc", .data = &at91sam9g45_caps, },
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{ .compatible = "atmel,sama5d3-ddramc", .data = &sama5d3_caps, },
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{},
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};
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static int atmel_ramc_probe(struct platform_device *pdev)
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{
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const struct at91_ramc_caps *caps;
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struct clk *clk;
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2016-08-16 20:53:18 +07:00
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caps = of_device_get_match_data(&pdev->dev);
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2014-07-08 23:21:12 +07:00
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if (caps->has_ddrck) {
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clk = devm_clk_get(&pdev->dev, "ddrck");
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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clk_prepare_enable(clk);
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}
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if (caps->has_mpddr_clk) {
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clk = devm_clk_get(&pdev->dev, "mpddr");
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if (IS_ERR(clk)) {
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pr_err("AT91 RAMC: couldn't get mpddr clock\n");
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return PTR_ERR(clk);
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}
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clk_prepare_enable(clk);
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}
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return 0;
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}
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static struct platform_driver atmel_ramc_driver = {
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.probe = atmel_ramc_probe,
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.driver = {
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.name = "atmel-ramc",
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.of_match_table = atmel_ramc_of_match,
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},
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};
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2016-09-16 20:05:10 +07:00
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builtin_platform_driver(atmel_ramc_driver);
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