2008-04-27 18:55:59 +07:00
|
|
|
/****************************************************************************
|
|
|
|
|
* Driver for Solarflare Solarstorm network controllers and boards
|
|
|
|
|
* Copyright 2005-2006 Fen Systems Ltd.
|
2011-02-25 07:01:34 +07:00
|
|
|
* Copyright 2006-2011 Solarflare Communications Inc.
|
2008-04-27 18:55:59 +07:00
|
|
|
*
|
|
|
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
|
|
|
* under the terms of the GNU General Public License version 2 as published
|
|
|
|
|
* by the Free Software Foundation, incorporated herein by reference.
|
|
|
|
|
*/
|
|
|
|
|
|
2009-11-29 22:12:08 +07:00
|
|
|
#ifndef EFX_NIC_H
|
|
|
|
|
#define EFX_NIC_H
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-23 23:05:28 +07:00
|
|
|
#include <linux/i2c-algo-bit.h>
|
2008-04-27 18:55:59 +07:00
|
|
|
#include "net_driver.h"
|
2008-12-13 12:50:08 +07:00
|
|
|
#include "efx.h"
|
2009-11-29 22:15:41 +07:00
|
|
|
#include "mcdi.h"
|
2010-12-02 20:47:29 +07:00
|
|
|
#include "spi.h"
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Falcon hardware control
|
|
|
|
|
*/
|
|
|
|
|
|
2009-11-28 12:36:04 +07:00
|
|
|
enum {
|
|
|
|
|
EFX_REV_FALCON_A0 = 0,
|
|
|
|
|
EFX_REV_FALCON_A1 = 1,
|
|
|
|
|
EFX_REV_FALCON_B0 = 2,
|
2009-11-29 22:15:41 +07:00
|
|
|
EFX_REV_SIENA_A0 = 3,
|
2008-04-27 18:55:59 +07:00
|
|
|
};
|
|
|
|
|
|
2009-11-28 12:36:04 +07:00
|
|
|
static inline int efx_nic_rev(struct efx_nic *efx)
|
2008-05-17 03:16:10 +07:00
|
|
|
{
|
2009-11-28 12:36:04 +07:00
|
|
|
return efx->type->revision;
|
2008-05-17 03:16:10 +07:00
|
|
|
}
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-29 10:43:56 +07:00
|
|
|
extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
|
|
|
|
|
|
|
|
|
|
/* NIC has two interlinked PCI functions for the same port. */
|
|
|
|
|
static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
|
|
|
|
|
{
|
|
|
|
|
return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
|
|
|
|
|
}
|
|
|
|
|
|
2009-11-29 22:08:55 +07:00
|
|
|
enum {
|
|
|
|
|
PHY_TYPE_NONE = 0,
|
|
|
|
|
PHY_TYPE_TXC43128 = 1,
|
|
|
|
|
PHY_TYPE_88E1111 = 2,
|
|
|
|
|
PHY_TYPE_SFX7101 = 3,
|
|
|
|
|
PHY_TYPE_QT2022C2 = 4,
|
|
|
|
|
PHY_TYPE_PM8358 = 6,
|
|
|
|
|
PHY_TYPE_SFT9001A = 8,
|
|
|
|
|
PHY_TYPE_QT2025C = 9,
|
|
|
|
|
PHY_TYPE_SFT9001B = 10,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
#define FALCON_XMAC_LOOPBACKS \
|
|
|
|
|
((1 << LOOPBACK_XGMII) | \
|
|
|
|
|
(1 << LOOPBACK_XGXS) | \
|
|
|
|
|
(1 << LOOPBACK_XAUI))
|
|
|
|
|
|
|
|
|
|
#define FALCON_GMAC_LOOPBACKS \
|
|
|
|
|
(1 << LOOPBACK_GMAC)
|
|
|
|
|
|
2012-02-03 04:21:15 +07:00
|
|
|
/* Alignment of PCIe DMA boundaries (4KB) */
|
|
|
|
|
#define EFX_PAGE_SIZE 4096
|
|
|
|
|
/* Size and alignment of buffer table entries (same) */
|
|
|
|
|
#define EFX_BUF_SIZE EFX_PAGE_SIZE
|
|
|
|
|
|
2009-11-23 23:05:45 +07:00
|
|
|
/**
|
2009-11-25 23:09:41 +07:00
|
|
|
* struct falcon_board_type - board operations and type information
|
|
|
|
|
* @id: Board type id, as found in NVRAM
|
|
|
|
|
* @ref_model: Model number of Solarflare reference design
|
|
|
|
|
* @gen_type: Generic board type description
|
2009-11-23 23:05:45 +07:00
|
|
|
* @init: Allocate resources and initialise peripheral hardware
|
|
|
|
|
* @init_phy: Do board-specific PHY initialisation
|
2009-11-25 23:09:41 +07:00
|
|
|
* @fini: Shut down hardware and free resources
|
2009-11-23 23:05:45 +07:00
|
|
|
* @set_id_led: Set state of identifying LED or revert to automatic function
|
|
|
|
|
* @monitor: Board-specific health check function
|
2009-11-25 23:09:41 +07:00
|
|
|
*/
|
|
|
|
|
struct falcon_board_type {
|
|
|
|
|
u8 id;
|
|
|
|
|
const char *ref_model;
|
|
|
|
|
const char *gen_type;
|
|
|
|
|
int (*init) (struct efx_nic *nic);
|
|
|
|
|
void (*init_phy) (struct efx_nic *efx);
|
|
|
|
|
void (*fini) (struct efx_nic *nic);
|
|
|
|
|
void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
|
|
|
|
|
int (*monitor) (struct efx_nic *nic);
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* struct falcon_board - board information
|
|
|
|
|
* @type: Type of board
|
|
|
|
|
* @major: Major rev. ('A', 'B' ...)
|
|
|
|
|
* @minor: Minor rev. (0, 1, ...)
|
2009-11-23 23:06:02 +07:00
|
|
|
* @i2c_adap: I2C adapter for on-board peripherals
|
|
|
|
|
* @i2c_data: Data for bit-banging algorithm
|
2009-11-23 23:05:45 +07:00
|
|
|
* @hwmon_client: I2C client for hardware monitor
|
|
|
|
|
* @ioexp_client: I2C client for power/port control
|
|
|
|
|
*/
|
|
|
|
|
struct falcon_board {
|
2009-11-25 23:09:41 +07:00
|
|
|
const struct falcon_board_type *type;
|
2009-11-23 23:05:45 +07:00
|
|
|
int major;
|
|
|
|
|
int minor;
|
2009-11-23 23:06:02 +07:00
|
|
|
struct i2c_adapter i2c_adap;
|
|
|
|
|
struct i2c_algo_bit_data i2c_data;
|
2009-11-23 23:05:45 +07:00
|
|
|
struct i2c_client *hwmon_client, *ioexp_client;
|
|
|
|
|
};
|
|
|
|
|
|
2009-11-23 23:05:28 +07:00
|
|
|
/**
|
|
|
|
|
* struct falcon_nic_data - Falcon NIC state
|
2009-11-25 23:09:04 +07:00
|
|
|
* @pci_dev2: Secondary function of Falcon A
|
2009-11-23 23:05:45 +07:00
|
|
|
* @board: Board state and functions
|
2009-11-25 23:11:35 +07:00
|
|
|
* @stats_disable_count: Nest count for disabling statistics fetches
|
|
|
|
|
* @stats_pending: Is there a pending DMA of MAC statistics.
|
|
|
|
|
* @stats_timer: A timer for regularly fetching MAC statistics.
|
|
|
|
|
* @stats_dma_done: Pointer to the flag which indicates DMA completion.
|
2010-12-02 20:47:29 +07:00
|
|
|
* @spi_flash: SPI flash device
|
|
|
|
|
* @spi_eeprom: SPI EEPROM device
|
|
|
|
|
* @spi_lock: SPI bus lock
|
2010-12-02 20:47:35 +07:00
|
|
|
* @mdio_lock: MDIO bus lock
|
2010-12-02 20:47:51 +07:00
|
|
|
* @xmac_poll_required: XMAC link state needs polling
|
2009-11-23 23:05:28 +07:00
|
|
|
*/
|
|
|
|
|
struct falcon_nic_data {
|
|
|
|
|
struct pci_dev *pci_dev2;
|
2009-11-23 23:05:45 +07:00
|
|
|
struct falcon_board board;
|
2009-11-25 23:11:35 +07:00
|
|
|
unsigned int stats_disable_count;
|
|
|
|
|
bool stats_pending;
|
|
|
|
|
struct timer_list stats_timer;
|
|
|
|
|
u32 *stats_dma_done;
|
2010-12-02 20:47:29 +07:00
|
|
|
struct efx_spi_device spi_flash;
|
|
|
|
|
struct efx_spi_device spi_eeprom;
|
|
|
|
|
struct mutex spi_lock;
|
2010-12-02 20:47:35 +07:00
|
|
|
struct mutex mdio_lock;
|
2010-12-02 20:47:51 +07:00
|
|
|
bool xmac_poll_required;
|
2009-11-23 23:05:28 +07:00
|
|
|
};
|
|
|
|
|
|
2009-11-23 23:05:12 +07:00
|
|
|
static inline struct falcon_board *falcon_board(struct efx_nic *efx)
|
|
|
|
|
{
|
2009-11-23 23:05:45 +07:00
|
|
|
struct falcon_nic_data *data = efx->nic_data;
|
|
|
|
|
return &data->board;
|
2009-11-23 23:05:12 +07:00
|
|
|
}
|
|
|
|
|
|
2009-11-29 22:15:41 +07:00
|
|
|
/**
|
|
|
|
|
* struct siena_nic_data - Siena NIC state
|
|
|
|
|
* @mcdi: Management-Controller-to-Driver Interface
|
|
|
|
|
* @wol_filter_id: Wake-on-LAN packet filter id
|
2012-01-07 03:25:39 +07:00
|
|
|
* @hwmon: Hardware monitor state
|
2009-11-29 22:15:41 +07:00
|
|
|
*/
|
|
|
|
|
struct siena_nic_data {
|
|
|
|
|
struct efx_mcdi_iface mcdi;
|
|
|
|
|
int wol_filter_id;
|
2012-01-07 03:25:39 +07:00
|
|
|
#ifdef CONFIG_SFC_MCDI_MON
|
|
|
|
|
struct efx_mcdi_mon hwmon;
|
|
|
|
|
#endif
|
2009-11-29 22:15:41 +07:00
|
|
|
};
|
|
|
|
|
|
2012-01-07 03:25:39 +07:00
|
|
|
#ifdef CONFIG_SFC_MCDI_MON
|
|
|
|
|
static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
|
|
|
|
|
{
|
|
|
|
|
struct siena_nic_data *nic_data;
|
|
|
|
|
EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
|
|
|
|
|
nic_data = efx->nic_data;
|
|
|
|
|
return &nic_data->hwmon;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 07:48:07 +07:00
|
|
|
/*
|
|
|
|
|
* On the SFC9000 family each port is associated with 1 PCI physical
|
|
|
|
|
* function (PF) handled by sfc and a configurable number of virtual
|
|
|
|
|
* functions (VFs) that may be handled by some other driver, often in
|
|
|
|
|
* a VM guest. The queue pointer registers are mapped in both PF and
|
|
|
|
|
* VF BARs such that an 8K region provides access to a single RX, TX
|
|
|
|
|
* and event queue (collectively a Virtual Interface, VI or VNIC).
|
|
|
|
|
*
|
|
|
|
|
* The PF has access to all 1024 VIs while VFs are mapped to VIs
|
|
|
|
|
* according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
|
|
|
|
|
* in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
|
|
|
|
|
* The number of VIs and the VI_SCALE value are configurable but must
|
|
|
|
|
* be established at boot time by firmware.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
/* Maximum VI_SCALE parameter supported by Siena */
|
|
|
|
|
#define EFX_VI_SCALE_MAX 6
|
|
|
|
|
/* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
|
|
|
|
|
* so this is the smallest allowed value. */
|
|
|
|
|
#define EFX_VI_BASE 128U
|
|
|
|
|
/* Maximum number of VFs allowed */
|
|
|
|
|
#define EFX_VF_COUNT_MAX 127
|
|
|
|
|
/* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
|
|
|
|
|
#define EFX_MAX_VF_EVQ_SIZE 8192UL
|
|
|
|
|
/* The number of buffer table entries reserved for each VI on a VF */
|
|
|
|
|
#define EFX_VF_BUFTBL_PER_VI \
|
|
|
|
|
((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \
|
|
|
|
|
sizeof(efx_qword_t) / EFX_BUF_SIZE)
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_SFC_SRIOV
|
|
|
|
|
|
|
|
|
|
static inline bool efx_sriov_wanted(struct efx_nic *efx)
|
|
|
|
|
{
|
|
|
|
|
return efx->vf_count != 0;
|
|
|
|
|
}
|
|
|
|
|
static inline bool efx_sriov_enabled(struct efx_nic *efx)
|
|
|
|
|
{
|
|
|
|
|
return efx->vf_init_count != 0;
|
|
|
|
|
}
|
|
|
|
|
static inline unsigned int efx_vf_size(struct efx_nic *efx)
|
|
|
|
|
{
|
|
|
|
|
return 1 << efx->vi_scale;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
extern int efx_init_sriov(void);
|
|
|
|
|
extern void efx_sriov_probe(struct efx_nic *efx);
|
|
|
|
|
extern int efx_sriov_init(struct efx_nic *efx);
|
|
|
|
|
extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
|
|
|
|
|
extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
|
|
|
|
|
extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
|
|
|
|
|
extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
|
|
|
|
|
extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
|
|
|
|
|
extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
|
|
|
|
|
extern void efx_sriov_reset(struct efx_nic *efx);
|
|
|
|
|
extern void efx_sriov_fini(struct efx_nic *efx);
|
|
|
|
|
extern void efx_fini_sriov(void);
|
|
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
|
|
static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
|
|
|
|
|
static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
|
|
|
|
|
static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
|
|
|
|
|
|
|
|
|
|
static inline int efx_init_sriov(void) { return 0; }
|
|
|
|
|
static inline void efx_sriov_probe(struct efx_nic *efx) {}
|
|
|
|
|
static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
|
|
|
|
|
static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
|
|
|
|
|
static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
|
|
|
|
|
efx_qword_t *event) {}
|
|
|
|
|
static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
|
|
|
|
|
efx_qword_t *event) {}
|
|
|
|
|
static inline void efx_sriov_event(struct efx_channel *channel,
|
|
|
|
|
efx_qword_t *event) {}
|
|
|
|
|
static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
|
|
|
|
|
static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
|
|
|
|
|
static inline void efx_sriov_reset(struct efx_nic *efx) {}
|
|
|
|
|
static inline void efx_sriov_fini(struct efx_nic *efx) {}
|
|
|
|
|
static inline void efx_fini_sriov(void) {}
|
|
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
|
|
|
|
|
extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
|
|
|
|
|
u16 vlan, u8 qos);
|
|
|
|
|
extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
|
|
|
|
|
struct ifla_vf_info *ivf);
|
|
|
|
|
extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
|
|
|
|
|
bool spoofchk);
|
|
|
|
|
|
2011-04-14 12:50:12 +07:00
|
|
|
extern const struct efx_nic_type falcon_a1_nic_type;
|
|
|
|
|
extern const struct efx_nic_type falcon_b0_nic_type;
|
|
|
|
|
extern const struct efx_nic_type siena_a0_nic_type;
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
|
*
|
|
|
|
|
* Externs
|
|
|
|
|
*
|
|
|
|
|
**************************************************************************
|
|
|
|
|
*/
|
|
|
|
|
|
2010-04-28 16:01:50 +07:00
|
|
|
extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
|
2009-10-23 15:29:51 +07:00
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* TX data path */
|
2009-11-29 10:43:56 +07:00
|
|
|
extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
|
|
|
|
|
extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
|
|
|
|
|
extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
|
|
|
|
|
extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
|
|
|
|
|
extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
|
/* RX data path */
|
2009-11-29 10:43:56 +07:00
|
|
|
extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
|
|
|
|
|
extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
|
|
|
|
|
extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
|
|
|
|
|
extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
|
|
|
|
|
extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
|
2012-02-08 06:49:52 +07:00
|
|
|
extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
|
/* Event data path */
|
2009-11-29 10:43:56 +07:00
|
|
|
extern int efx_nic_probe_eventq(struct efx_channel *channel);
|
|
|
|
|
extern void efx_nic_init_eventq(struct efx_channel *channel);
|
|
|
|
|
extern void efx_nic_fini_eventq(struct efx_channel *channel);
|
|
|
|
|
extern void efx_nic_remove_eventq(struct efx_channel *channel);
|
|
|
|
|
extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
|
|
|
|
|
extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
|
2011-04-04 20:22:11 +07:00
|
|
|
extern bool efx_nic_event_present(struct efx_channel *channel);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
|
/* MAC/PHY */
|
|
|
|
|
extern void falcon_drain_tx_fifo(struct efx_nic *efx);
|
|
|
|
|
extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
|
2011-09-03 06:15:00 +07:00
|
|
|
extern bool falcon_xmac_check_fault(struct efx_nic *efx);
|
|
|
|
|
extern int falcon_reconfigure_xmac(struct efx_nic *efx);
|
|
|
|
|
extern void falcon_update_stats_xmac(struct efx_nic *efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
|
|
|
|
/* Interrupts and test events */
|
2009-11-29 10:43:56 +07:00
|
|
|
extern int efx_nic_init_interrupt(struct efx_nic *efx);
|
|
|
|
|
extern void efx_nic_enable_interrupts(struct efx_nic *efx);
|
2012-02-29 06:37:35 +07:00
|
|
|
extern void efx_nic_event_test_start(struct efx_channel *channel);
|
|
|
|
|
extern void efx_nic_irq_test_start(struct efx_nic *efx);
|
2009-11-29 10:43:56 +07:00
|
|
|
extern void efx_nic_disable_interrupts(struct efx_nic *efx);
|
|
|
|
|
extern void efx_nic_fini_interrupt(struct efx_nic *efx);
|
|
|
|
|
extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
|
|
|
|
|
extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
|
|
|
|
|
extern void falcon_irq_ack_a1(struct efx_nic *efx);
|
|
|
|
|
|
2012-02-29 06:37:35 +07:00
|
|
|
static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
|
|
|
|
|
{
|
|
|
|
|
return ACCESS_ONCE(channel->last_irq_cpu);
|
|
|
|
|
}
|
|
|
|
|
static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
|
|
|
|
|
{
|
|
|
|
|
return ACCESS_ONCE(efx->last_irq_cpu);
|
|
|
|
|
}
|
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/* Global Resources */
|
2009-11-29 10:43:56 +07:00
|
|
|
extern int efx_nic_flush_queues(struct efx_nic *efx);
|
2009-11-25 23:11:35 +07:00
|
|
|
extern void falcon_start_nic_stats(struct efx_nic *efx);
|
|
|
|
|
extern void falcon_stop_nic_stats(struct efx_nic *efx);
|
2010-04-28 16:28:10 +07:00
|
|
|
extern void falcon_setup_xaui(struct efx_nic *efx);
|
2008-04-27 18:55:59 +07:00
|
|
|
extern int falcon_reset_xaui(struct efx_nic *efx);
|
2012-02-15 08:58:49 +07:00
|
|
|
extern void
|
|
|
|
|
efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
|
2009-11-29 10:43:56 +07:00
|
|
|
extern void efx_nic_init_common(struct efx_nic *efx);
|
2010-06-30 12:06:28 +07:00
|
|
|
extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
|
2009-11-29 10:43:56 +07:00
|
|
|
|
|
|
|
|
int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
|
|
|
|
|
unsigned int len);
|
|
|
|
|
void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2008-09-01 18:49:02 +07:00
|
|
|
/* Tests */
|
2009-11-29 10:43:56 +07:00
|
|
|
struct efx_nic_register_test {
|
|
|
|
|
unsigned address;
|
|
|
|
|
efx_oword_t mask;
|
|
|
|
|
};
|
|
|
|
|
extern int efx_nic_test_registers(struct efx_nic *efx,
|
|
|
|
|
const struct efx_nic_register_test *regs,
|
|
|
|
|
size_t n_regs);
|
2008-09-01 18:49:02 +07:00
|
|
|
|
2010-06-21 10:06:53 +07:00
|
|
|
extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
|
|
|
|
|
extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);
|
|
|
|
|
|
2008-04-27 18:55:59 +07:00
|
|
|
/**************************************************************************
|
|
|
|
|
*
|
|
|
|
|
* Falcon MAC stats
|
|
|
|
|
*
|
|
|
|
|
**************************************************************************
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
|
|
|
|
|
#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
|
|
|
|
|
|
|
|
|
|
/* Retrieve statistic from statistics block */
|
|
|
|
|
#define FALCON_STAT(efx, falcon_stat, efx_stat) do { \
|
|
|
|
|
if (FALCON_STAT_WIDTH(falcon_stat) == 16) \
|
|
|
|
|
(efx)->mac_stats.efx_stat += le16_to_cpu( \
|
|
|
|
|
*((__force __le16 *) \
|
|
|
|
|
(efx->stats_buffer.addr + \
|
|
|
|
|
FALCON_STAT_OFFSET(falcon_stat)))); \
|
|
|
|
|
else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \
|
|
|
|
|
(efx)->mac_stats.efx_stat += le32_to_cpu( \
|
|
|
|
|
*((__force __le32 *) \
|
|
|
|
|
(efx->stats_buffer.addr + \
|
|
|
|
|
FALCON_STAT_OFFSET(falcon_stat)))); \
|
|
|
|
|
else \
|
|
|
|
|
(efx)->mac_stats.efx_stat += le64_to_cpu( \
|
|
|
|
|
*((__force __le64 *) \
|
|
|
|
|
(efx->stats_buffer.addr + \
|
|
|
|
|
FALCON_STAT_OFFSET(falcon_stat)))); \
|
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
|
|
#define FALCON_MAC_STATS_SIZE 0x100
|
|
|
|
|
|
|
|
|
|
#define MAC_DATA_LBN 0
|
|
|
|
|
#define MAC_DATA_WIDTH 32
|
|
|
|
|
|
2012-02-11 05:23:41 +07:00
|
|
|
extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
|
|
|
|
|
efx_qword_t *event);
|
2008-04-27 18:55:59 +07:00
|
|
|
|
2009-11-25 23:12:01 +07:00
|
|
|
extern void falcon_poll_xmac(struct efx_nic *efx);
|
|
|
|
|
|
2009-11-29 22:12:08 +07:00
|
|
|
#endif /* EFX_NIC_H */
|
