2019-05-27 13:55:01 +07:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2005-09-10 03:03:28 +07:00
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/*
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* omap_cf.c -- OMAP 16xx CompactFlash controller driver
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*
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* Copyright (c) 2005 David Brownell
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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2005-10-30 01:07:23 +07:00
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#include <linux/platform_device.h>
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2005-09-10 03:03:28 +07:00
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 15:04:11 +07:00
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#include <linux/slab.h>
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2005-09-10 03:03:28 +07:00
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#include <pcmcia/ss.h>
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2008-08-05 22:14:15 +07:00
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#include <mach/hardware.h>
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2005-09-10 03:03:28 +07:00
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#include <asm/io.h>
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2019-05-15 05:46:51 +07:00
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#include <linux/sizes.h>
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2005-09-10 03:03:28 +07:00
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2012-09-20 00:46:56 +07:00
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#include <mach/mux.h>
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2012-10-03 03:39:28 +07:00
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#include <mach/tc.h>
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2005-09-10 03:03:28 +07:00
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/* NOTE: don't expect this to support many I/O cards. The 16xx chips have
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* hard-wired timings to support Compact Flash memory cards; they won't work
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* with various other devices (like WLAN adapters) without some external
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* logic to help out.
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*
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* NOTE: CF controller docs disagree with address space docs as to where
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* CF_BASE really lives; this is a doc erratum.
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*/
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#define CF_BASE 0xfffe2800
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/* status; read after IRQ */
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2008-07-03 16:24:41 +07:00
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#define CF_STATUS (CF_BASE + 0x00)
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2005-09-10 03:03:28 +07:00
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# define CF_STATUS_BAD_READ (1 << 2)
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# define CF_STATUS_BAD_WRITE (1 << 1)
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# define CF_STATUS_CARD_DETECT (1 << 0)
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/* which chipselect (CS0..CS3) is used for CF (active low) */
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2008-07-03 16:24:41 +07:00
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#define CF_CFG (CF_BASE + 0x02)
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2005-09-10 03:03:28 +07:00
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/* card reset */
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2008-07-03 16:24:41 +07:00
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#define CF_CONTROL (CF_BASE + 0x04)
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2005-09-10 03:03:28 +07:00
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# define CF_CONTROL_RESET (1 << 0)
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2008-07-03 16:24:41 +07:00
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#define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT))
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2005-09-10 03:03:28 +07:00
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/*--------------------------------------------------------------------------*/
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static const char driver_name[] = "omap_cf";
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struct omap_cf_socket {
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struct pcmcia_socket socket;
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struct timer_list timer;
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unsigned present:1;
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unsigned active:1;
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struct platform_device *pdev;
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unsigned long phys_cf;
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u_int irq;
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2006-10-01 13:28:19 +07:00
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struct resource iomem;
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2005-09-10 03:03:28 +07:00
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};
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#define POLL_INTERVAL (2 * HZ)
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/*--------------------------------------------------------------------------*/
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static int omap_cf_ss_init(struct pcmcia_socket *s)
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{
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return 0;
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}
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/* the timer is primarily to kick this socket's pccardd */
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2017-10-22 02:09:17 +07:00
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static void omap_cf_timer(struct timer_list *t)
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2005-09-10 03:03:28 +07:00
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{
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2017-10-22 02:09:17 +07:00
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struct omap_cf_socket *cf = from_timer(cf, t, timer);
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2005-09-10 03:03:28 +07:00
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unsigned present = omap_cf_present();
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if (present != cf->present) {
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cf->present = present;
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pr_debug("%s: card %s\n", driver_name,
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present ? "present" : "gone");
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pcmcia_parse_events(&cf->socket, SS_DETECT);
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}
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if (cf->active)
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mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
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}
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/* This irq handler prevents "irqNNN: nobody cared" messages as drivers
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* claim the card's IRQ. It may also detect some card insertions, but
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* not removals; it can't always eliminate timer irqs.
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*/
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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 20:55:46 +07:00
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static irqreturn_t omap_cf_irq(int irq, void *_cf)
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2005-09-10 03:03:28 +07:00
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{
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2017-11-05 09:32:31 +07:00
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struct omap_cf_socket *cf = (struct omap_cf_socket *)_cf;
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omap_cf_timer(&cf->timer);
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2005-09-10 03:03:28 +07:00
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return IRQ_HANDLED;
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}
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static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp)
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{
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if (!sp)
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return -EINVAL;
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2006-10-01 13:28:19 +07:00
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/* NOTE CF is always 3VCARD */
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2005-09-10 03:03:28 +07:00
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if (omap_cf_present()) {
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struct omap_cf_socket *cf;
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*sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD;
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cf = container_of(s, struct omap_cf_socket, socket);
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2010-03-07 16:51:23 +07:00
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s->pcmcia_irq = 0;
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2006-10-01 13:28:19 +07:00
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s->pci_irq = cf->irq;
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2005-09-10 03:03:28 +07:00
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} else
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*sp = 0;
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return 0;
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}
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static int
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omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
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{
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u16 control;
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2006-10-01 13:28:19 +07:00
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/* REVISIT some non-OSK boards may support power switching */
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2005-09-10 03:03:28 +07:00
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switch (s->Vcc) {
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case 0:
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case 33:
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break;
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default:
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return -EINVAL;
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}
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2008-07-03 16:24:41 +07:00
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control = omap_readw(CF_CONTROL);
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2005-09-10 03:03:28 +07:00
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if (s->flags & SS_RESET)
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2008-07-03 16:24:41 +07:00
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omap_writew(CF_CONTROL_RESET, CF_CONTROL);
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2005-09-10 03:03:28 +07:00
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else
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2008-07-03 16:24:41 +07:00
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omap_writew(0, CF_CONTROL);
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2005-09-10 03:03:28 +07:00
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pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
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driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
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return 0;
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}
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static int omap_cf_ss_suspend(struct pcmcia_socket *s)
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{
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2008-05-01 18:34:54 +07:00
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pr_debug("%s: %s\n", driver_name, __func__);
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2005-09-10 03:03:28 +07:00
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return omap_cf_set_socket(s, &dead_socket);
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}
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/* regions are 2K each: mem, attrib, io (and reserved-for-ide) */
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static int
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omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
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{
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struct omap_cf_socket *cf;
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cf = container_of(s, struct omap_cf_socket, socket);
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io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
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io->start = cf->phys_cf + SZ_4K;
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io->stop = io->start + SZ_2K - 1;
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return 0;
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}
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static int
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omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
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{
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struct omap_cf_socket *cf;
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if (map->card_start)
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return -EINVAL;
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cf = container_of(s, struct omap_cf_socket, socket);
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map->static_start = cf->phys_cf;
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map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
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if (map->flags & MAP_ATTRIB)
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map->static_start += SZ_2K;
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return 0;
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}
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static struct pccard_operations omap_cf_ops = {
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.init = omap_cf_ss_init,
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.suspend = omap_cf_ss_suspend,
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.get_status = omap_cf_get_status,
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.set_socket = omap_cf_set_socket,
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.set_io_map = omap_cf_set_io_map,
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.set_mem_map = omap_cf_set_mem_map,
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};
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/*--------------------------------------------------------------------------*/
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/*
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* NOTE: right now the only board-specific platform_data is
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* "what chipselect is used". Boards could want more.
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*/
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2007-04-09 06:04:02 +07:00
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static int __init omap_cf_probe(struct platform_device *pdev)
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2005-09-10 03:03:28 +07:00
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{
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unsigned seg;
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struct omap_cf_socket *cf;
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int irq;
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int status;
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2007-04-09 06:04:02 +07:00
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seg = (int) pdev->dev.platform_data;
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2005-09-10 03:03:28 +07:00
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if (seg == 0 || seg > 3)
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return -ENODEV;
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/* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
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irq = platform_get_irq(pdev, 0);
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2006-01-20 00:56:29 +07:00
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if (irq < 0)
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2005-09-10 03:03:28 +07:00
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return -EINVAL;
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2006-12-13 15:34:52 +07:00
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cf = kzalloc(sizeof *cf, GFP_KERNEL);
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2005-09-10 03:03:28 +07:00
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if (!cf)
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return -ENOMEM;
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2017-10-22 02:09:17 +07:00
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timer_setup(&cf->timer, omap_cf_timer, 0);
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2005-09-10 03:03:28 +07:00
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cf->pdev = pdev;
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2007-04-09 06:04:02 +07:00
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platform_set_drvdata(pdev, cf);
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2005-09-10 03:03:28 +07:00
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/* this primarily just shuts up irq handling noise */
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2006-07-02 09:29:38 +07:00
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status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
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2005-09-10 03:03:28 +07:00
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driver_name, cf);
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if (status < 0)
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goto fail0;
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cf->irq = irq;
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cf->socket.pci_irq = irq;
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switch (seg) {
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/* NOTE: CS0 could be configured too ... */
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case 1:
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cf->phys_cf = OMAP_CS1_PHYS;
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break;
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case 2:
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cf->phys_cf = OMAP_CS2_PHYS;
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break;
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case 3:
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cf->phys_cf = omap_cs3_phys();
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break;
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default:
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goto fail1;
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}
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2006-10-01 13:28:19 +07:00
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cf->iomem.start = cf->phys_cf;
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cf->iomem.end = cf->iomem.end + SZ_8K - 1;
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|
|
cf->iomem.flags = IORESOURCE_MEM;
|
2005-09-10 03:03:28 +07:00
|
|
|
|
|
|
|
/* pcmcia layer only remaps "real" memory */
|
|
|
|
cf->socket.io_offset = (unsigned long)
|
|
|
|
ioremap(cf->phys_cf + SZ_4K, SZ_2K);
|
|
|
|
if (!cf->socket.io_offset)
|
|
|
|
goto fail1;
|
|
|
|
|
|
|
|
if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
|
|
|
|
goto fail1;
|
|
|
|
|
|
|
|
/* NOTE: CF conflicts with MMC1 */
|
|
|
|
omap_cfg_reg(W11_1610_CF_CD1);
|
|
|
|
omap_cfg_reg(P11_1610_CF_CD2);
|
|
|
|
omap_cfg_reg(R11_1610_CF_IOIS16);
|
|
|
|
omap_cfg_reg(V10_1610_CF_IREQ);
|
|
|
|
omap_cfg_reg(W10_1610_CF_RESET);
|
|
|
|
|
2008-07-03 16:24:41 +07:00
|
|
|
omap_writew(~(1 << seg), CF_CFG);
|
2005-09-10 03:03:28 +07:00
|
|
|
|
|
|
|
pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);
|
|
|
|
|
|
|
|
/* NOTE: better EMIFS setup might support more cards; but the
|
|
|
|
* TRM only shows how to affect regular flash signals, not their
|
|
|
|
* CF/PCMCIA variants...
|
|
|
|
*/
|
|
|
|
pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
|
2008-07-03 16:24:41 +07:00
|
|
|
seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
|
|
|
|
omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */
|
|
|
|
omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */
|
2005-09-10 03:03:28 +07:00
|
|
|
|
|
|
|
/* CF uses armxor_ck, which is "always" available */
|
|
|
|
|
|
|
|
pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
|
2008-07-03 16:24:41 +07:00
|
|
|
omap_readw(CF_STATUS), omap_readw(CF_CFG),
|
|
|
|
omap_readw(CF_CONTROL),
|
2005-09-10 03:03:28 +07:00
|
|
|
omap_cf_present() ? "present" : "(not present)");
|
|
|
|
|
|
|
|
cf->socket.owner = THIS_MODULE;
|
2007-04-09 06:04:02 +07:00
|
|
|
cf->socket.dev.parent = &pdev->dev;
|
2005-09-10 03:03:28 +07:00
|
|
|
cf->socket.ops = &omap_cf_ops;
|
|
|
|
cf->socket.resource_ops = &pccard_static_ops;
|
|
|
|
cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
|
|
|
|
| SS_CAP_MEM_ALIGN;
|
|
|
|
cf->socket.map_size = SZ_2K;
|
2006-10-01 13:28:19 +07:00
|
|
|
cf->socket.io[0].res = &cf->iomem;
|
2005-09-10 03:03:28 +07:00
|
|
|
|
|
|
|
status = pcmcia_register_socket(&cf->socket);
|
|
|
|
if (status < 0)
|
|
|
|
goto fail2;
|
|
|
|
|
|
|
|
cf->active = 1;
|
|
|
|
mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail2:
|
|
|
|
release_mem_region(cf->phys_cf, SZ_8K);
|
|
|
|
fail1:
|
2006-10-21 04:44:18 +07:00
|
|
|
if (cf->socket.io_offset)
|
|
|
|
iounmap((void __iomem *) cf->socket.io_offset);
|
2005-09-10 03:03:28 +07:00
|
|
|
free_irq(irq, cf);
|
|
|
|
fail0:
|
|
|
|
kfree(cf);
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
2007-04-09 06:04:02 +07:00
|
|
|
static int __exit omap_cf_remove(struct platform_device *pdev)
|
2005-09-10 03:03:28 +07:00
|
|
|
{
|
2007-04-09 06:04:02 +07:00
|
|
|
struct omap_cf_socket *cf = platform_get_drvdata(pdev);
|
2005-09-10 03:03:28 +07:00
|
|
|
|
|
|
|
cf->active = 0;
|
|
|
|
pcmcia_unregister_socket(&cf->socket);
|
|
|
|
del_timer_sync(&cf->timer);
|
|
|
|
iounmap((void __iomem *) cf->socket.io_offset);
|
|
|
|
release_mem_region(cf->phys_cf, SZ_8K);
|
|
|
|
free_irq(cf->irq, cf);
|
|
|
|
kfree(cf);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-04-09 06:04:02 +07:00
|
|
|
static struct platform_driver omap_cf_driver = {
|
|
|
|
.driver = {
|
2020-02-19 03:07:16 +07:00
|
|
|
.name = driver_name,
|
2007-04-09 06:04:02 +07:00
|
|
|
},
|
|
|
|
.remove = __exit_p(omap_cf_remove),
|
2005-09-10 03:03:28 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
static int __init omap_cf_init(void)
|
|
|
|
{
|
|
|
|
if (cpu_is_omap16xx())
|
2007-04-09 06:04:02 +07:00
|
|
|
return platform_driver_probe(&omap_cf_driver, omap_cf_probe);
|
2006-10-01 13:28:19 +07:00
|
|
|
return -ENODEV;
|
2005-09-10 03:03:28 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit omap_cf_exit(void)
|
|
|
|
{
|
|
|
|
if (cpu_is_omap16xx())
|
2007-04-09 06:04:02 +07:00
|
|
|
platform_driver_unregister(&omap_cf_driver);
|
2005-09-10 03:03:28 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
module_init(omap_cf_init);
|
|
|
|
module_exit(omap_cf_exit);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("OMAP CF Driver");
|
|
|
|
MODULE_LICENSE("GPL");
|
2008-04-16 04:34:34 +07:00
|
|
|
MODULE_ALIAS("platform:omap_cf");
|