License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 21:07:57 +07:00
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// SPDX-License-Identifier: GPL-2.0
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2011-04-21 09:48:07 +07:00
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/*
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* linux/arch/m68k/kernel/sys_m68k.c
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*
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* This file contains various random system calls that
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* have a non-standard calling sequence on the Linux/m68k
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* platform.
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*/
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#include <linux/capability.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/fs.h>
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#include <linux/smp.h>
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#include <linux/sem.h>
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#include <linux/msg.h>
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#include <linux/shm.h>
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#include <linux/stat.h>
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#include <linux/syscalls.h>
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#include <linux/mman.h>
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#include <linux/file.h>
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#include <linux/ipc.h>
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#include <asm/setup.h>
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2016-12-25 02:46:01 +07:00
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#include <linux/uaccess.h>
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2011-04-21 09:48:07 +07:00
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#include <asm/cachectl.h>
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#include <asm/traps.h>
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#include <asm/page.h>
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#include <asm/unistd.h>
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#include <asm/cacheflush.h>
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2011-03-22 10:39:27 +07:00
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#ifdef CONFIG_MMU
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2011-04-21 09:48:07 +07:00
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#include <asm/tlb.h>
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asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
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unsigned long error_code);
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asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
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unsigned long prot, unsigned long flags,
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unsigned long fd, unsigned long pgoff)
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{
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/*
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* This is wrong for sun3 - there PAGE_SIZE is 8Kb,
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* so we need to shift the argument down by 1; m68k mmap64(3)
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* (in libc) expects the last argument of mmap2 in 4Kb units.
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*/
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2018-03-11 17:34:46 +07:00
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return ksys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
|
2011-04-21 09:48:07 +07:00
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}
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/* Convert virtual (user) address VADDR to physical address PADDR */
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#define virt_to_phys_040(vaddr) \
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({ \
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unsigned long _mmusr, _paddr; \
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\
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__asm__ __volatile__ (".chip 68040\n\t" \
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"ptestr (%1)\n\t" \
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"movec %%mmusr,%0\n\t" \
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".chip 68k" \
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: "=r" (_mmusr) \
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: "a" (vaddr)); \
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_paddr = (_mmusr & MMU_R_040) ? (_mmusr & PAGE_MASK) : 0; \
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_paddr; \
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})
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static inline int
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cache_flush_040 (unsigned long addr, int scope, int cache, unsigned long len)
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{
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unsigned long paddr, i;
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switch (scope)
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{
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case FLUSH_SCOPE_ALL:
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switch (cache)
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{
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case FLUSH_CACHE_DATA:
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/* This nop is needed for some broken versions of the 68040. */
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__asm__ __volatile__ ("nop\n\t"
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".chip 68040\n\t"
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"cpusha %dc\n\t"
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".chip 68k");
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break;
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case FLUSH_CACHE_INSN:
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__asm__ __volatile__ ("nop\n\t"
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".chip 68040\n\t"
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"cpusha %ic\n\t"
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".chip 68k");
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break;
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default:
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case FLUSH_CACHE_BOTH:
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__asm__ __volatile__ ("nop\n\t"
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".chip 68040\n\t"
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"cpusha %bc\n\t"
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".chip 68k");
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break;
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}
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break;
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case FLUSH_SCOPE_LINE:
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/* Find the physical address of the first mapped page in the
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address range. */
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if ((paddr = virt_to_phys_040(addr))) {
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paddr += addr & ~(PAGE_MASK | 15);
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len = (len + (addr & 15) + 15) >> 4;
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} else {
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unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
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if (len <= tmp)
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return 0;
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addr += tmp;
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len -= tmp;
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tmp = PAGE_SIZE;
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for (;;)
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{
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if ((paddr = virt_to_phys_040(addr)))
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break;
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if (len <= tmp)
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return 0;
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addr += tmp;
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len -= tmp;
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}
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len = (len + 15) >> 4;
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}
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i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
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while (len--)
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{
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switch (cache)
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{
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case FLUSH_CACHE_DATA:
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__asm__ __volatile__ ("nop\n\t"
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".chip 68040\n\t"
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"cpushl %%dc,(%0)\n\t"
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".chip 68k"
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: : "a" (paddr));
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break;
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case FLUSH_CACHE_INSN:
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__asm__ __volatile__ ("nop\n\t"
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".chip 68040\n\t"
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"cpushl %%ic,(%0)\n\t"
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".chip 68k"
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: : "a" (paddr));
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break;
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default:
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case FLUSH_CACHE_BOTH:
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__asm__ __volatile__ ("nop\n\t"
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".chip 68040\n\t"
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"cpushl %%bc,(%0)\n\t"
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".chip 68k"
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: : "a" (paddr));
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break;
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}
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if (!--i && len)
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{
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/*
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* No need to page align here since it is done by
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* virt_to_phys_040().
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*/
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addr += PAGE_SIZE;
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i = PAGE_SIZE / 16;
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/* Recompute physical address when crossing a page
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boundary. */
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for (;;)
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{
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if ((paddr = virt_to_phys_040(addr)))
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break;
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if (len <= i)
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return 0;
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len -= i;
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addr += PAGE_SIZE;
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}
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}
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else
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paddr += 16;
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}
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break;
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default:
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case FLUSH_SCOPE_PAGE:
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len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
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for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
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{
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if (!(paddr = virt_to_phys_040(addr)))
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continue;
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switch (cache)
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{
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case FLUSH_CACHE_DATA:
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__asm__ __volatile__ ("nop\n\t"
|
|
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|
".chip 68040\n\t"
|
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|
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"cpushp %%dc,(%0)\n\t"
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".chip 68k"
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: : "a" (paddr));
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break;
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case FLUSH_CACHE_INSN:
|
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__asm__ __volatile__ ("nop\n\t"
|
|
|
|
".chip 68040\n\t"
|
|
|
|
"cpushp %%ic,(%0)\n\t"
|
|
|
|
".chip 68k"
|
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|
: : "a" (paddr));
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break;
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|
default:
|
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|
|
case FLUSH_CACHE_BOTH:
|
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__asm__ __volatile__ ("nop\n\t"
|
|
|
|
".chip 68040\n\t"
|
|
|
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"cpushp %%bc,(%0)\n\t"
|
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|
|
".chip 68k"
|
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: : "a" (paddr));
|
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break;
|
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|
}
|
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}
|
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break;
|
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|
}
|
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|
return 0;
|
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|
|
}
|
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|
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|
|
|
#define virt_to_phys_060(vaddr) \
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({ \
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unsigned long paddr; \
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__asm__ __volatile__ (".chip 68060\n\t" \
|
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|
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"plpar (%0)\n\t" \
|
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|
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".chip 68k" \
|
|
|
|
: "=a" (paddr) \
|
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|
|
: "0" (vaddr)); \
|
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(paddr); /* XXX */ \
|
|
|
|
})
|
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|
|
|
|
|
static inline int
|
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|
|
cache_flush_060 (unsigned long addr, int scope, int cache, unsigned long len)
|
|
|
|
{
|
|
|
|
unsigned long paddr, i;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* 68060 manual says:
|
|
|
|
* cpush %dc : flush DC, remains valid (with our %cacr setup)
|
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|
|
* cpush %ic : invalidate IC
|
|
|
|
* cpush %bc : flush DC + invalidate IC
|
|
|
|
*/
|
|
|
|
switch (scope)
|
|
|
|
{
|
|
|
|
case FLUSH_SCOPE_ALL:
|
|
|
|
switch (cache)
|
|
|
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{
|
|
|
|
case FLUSH_CACHE_DATA:
|
|
|
|
__asm__ __volatile__ (".chip 68060\n\t"
|
|
|
|
"cpusha %dc\n\t"
|
|
|
|
".chip 68k");
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|
break;
|
|
|
|
case FLUSH_CACHE_INSN:
|
|
|
|
__asm__ __volatile__ (".chip 68060\n\t"
|
|
|
|
"cpusha %ic\n\t"
|
|
|
|
".chip 68k");
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
case FLUSH_CACHE_BOTH:
|
|
|
|
__asm__ __volatile__ (".chip 68060\n\t"
|
|
|
|
"cpusha %bc\n\t"
|
|
|
|
".chip 68k");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case FLUSH_SCOPE_LINE:
|
|
|
|
/* Find the physical address of the first mapped page in the
|
|
|
|
address range. */
|
|
|
|
len += addr & 15;
|
|
|
|
addr &= -16;
|
|
|
|
if (!(paddr = virt_to_phys_060(addr))) {
|
|
|
|
unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
|
|
|
|
|
|
|
|
if (len <= tmp)
|
|
|
|
return 0;
|
|
|
|
addr += tmp;
|
|
|
|
len -= tmp;
|
|
|
|
tmp = PAGE_SIZE;
|
|
|
|
for (;;)
|
|
|
|
{
|
|
|
|
if ((paddr = virt_to_phys_060(addr)))
|
|
|
|
break;
|
|
|
|
if (len <= tmp)
|
|
|
|
return 0;
|
|
|
|
addr += tmp;
|
|
|
|
len -= tmp;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
len = (len + 15) >> 4;
|
|
|
|
i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
|
|
|
|
while (len--)
|
|
|
|
{
|
|
|
|
switch (cache)
|
|
|
|
{
|
|
|
|
case FLUSH_CACHE_DATA:
|
|
|
|
__asm__ __volatile__ (".chip 68060\n\t"
|
|
|
|
"cpushl %%dc,(%0)\n\t"
|
|
|
|
".chip 68k"
|
|
|
|
: : "a" (paddr));
|
|
|
|
break;
|
|
|
|
case FLUSH_CACHE_INSN:
|
|
|
|
__asm__ __volatile__ (".chip 68060\n\t"
|
|
|
|
"cpushl %%ic,(%0)\n\t"
|
|
|
|
".chip 68k"
|
|
|
|
: : "a" (paddr));
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
case FLUSH_CACHE_BOTH:
|
|
|
|
__asm__ __volatile__ (".chip 68060\n\t"
|
|
|
|
"cpushl %%bc,(%0)\n\t"
|
|
|
|
".chip 68k"
|
|
|
|
: : "a" (paddr));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (!--i && len)
|
|
|
|
{
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We just want to jump to the first cache line
|
|
|
|
* in the next page.
|
|
|
|
*/
|
|
|
|
addr += PAGE_SIZE;
|
|
|
|
addr &= PAGE_MASK;
|
|
|
|
|
|
|
|
i = PAGE_SIZE / 16;
|
|
|
|
/* Recompute physical address when crossing a page
|
|
|
|
boundary. */
|
|
|
|
for (;;)
|
|
|
|
{
|
|
|
|
if ((paddr = virt_to_phys_060(addr)))
|
|
|
|
break;
|
|
|
|
if (len <= i)
|
|
|
|
return 0;
|
|
|
|
len -= i;
|
|
|
|
addr += PAGE_SIZE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
paddr += 16;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
case FLUSH_SCOPE_PAGE:
|
|
|
|
len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
|
|
|
|
addr &= PAGE_MASK; /* Workaround for bug in some
|
|
|
|
revisions of the 68060 */
|
|
|
|
for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
|
|
|
|
{
|
|
|
|
if (!(paddr = virt_to_phys_060(addr)))
|
|
|
|
continue;
|
|
|
|
switch (cache)
|
|
|
|
{
|
|
|
|
case FLUSH_CACHE_DATA:
|
|
|
|
__asm__ __volatile__ (".chip 68060\n\t"
|
|
|
|
"cpushp %%dc,(%0)\n\t"
|
|
|
|
".chip 68k"
|
|
|
|
: : "a" (paddr));
|
|
|
|
break;
|
|
|
|
case FLUSH_CACHE_INSN:
|
|
|
|
__asm__ __volatile__ (".chip 68060\n\t"
|
|
|
|
"cpushp %%ic,(%0)\n\t"
|
|
|
|
".chip 68k"
|
|
|
|
: : "a" (paddr));
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
case FLUSH_CACHE_BOTH:
|
|
|
|
__asm__ __volatile__ (".chip 68060\n\t"
|
|
|
|
"cpushp %%bc,(%0)\n\t"
|
|
|
|
".chip 68k"
|
|
|
|
: : "a" (paddr));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* sys_cacheflush -- flush (part of) the processor cache. */
|
|
|
|
asmlinkage int
|
|
|
|
sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
|
|
|
|
{
|
|
|
|
int ret = -EINVAL;
|
|
|
|
|
|
|
|
if (scope < FLUSH_SCOPE_LINE || scope > FLUSH_SCOPE_ALL ||
|
|
|
|
cache & ~FLUSH_CACHE_BOTH)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
if (scope == FLUSH_SCOPE_ALL) {
|
|
|
|
/* Only the superuser may explicitly flush the whole cache. */
|
|
|
|
ret = -EPERM;
|
|
|
|
if (!capable(CAP_SYS_ADMIN))
|
|
|
|
goto out;
|
|
|
|
} else {
|
2014-10-10 05:29:45 +07:00
|
|
|
struct vm_area_struct *vma;
|
|
|
|
|
|
|
|
/* Check for overflow. */
|
|
|
|
if (addr + len < addr)
|
|
|
|
goto out;
|
|
|
|
|
2011-04-21 09:48:07 +07:00
|
|
|
/*
|
|
|
|
* Verify that the specified address region actually belongs
|
|
|
|
* to this process.
|
|
|
|
*/
|
2014-10-10 05:29:45 +07:00
|
|
|
down_read(¤t->mm->mmap_sem);
|
|
|
|
vma = find_vma(current->mm, addr);
|
|
|
|
if (!vma || addr < vma->vm_start || addr + len > vma->vm_end)
|
|
|
|
goto out_unlock;
|
2011-04-21 09:48:07 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
if (CPU_IS_020_OR_030) {
|
|
|
|
if (scope == FLUSH_SCOPE_LINE && len < 256) {
|
|
|
|
unsigned long cacr;
|
|
|
|
__asm__ ("movec %%cacr, %0" : "=r" (cacr));
|
|
|
|
if (cache & FLUSH_CACHE_INSN)
|
|
|
|
cacr |= 4;
|
|
|
|
if (cache & FLUSH_CACHE_DATA)
|
|
|
|
cacr |= 0x400;
|
|
|
|
len >>= 2;
|
|
|
|
while (len--) {
|
|
|
|
__asm__ __volatile__ ("movec %1, %%caar\n\t"
|
|
|
|
"movec %0, %%cacr"
|
|
|
|
: /* no outputs */
|
|
|
|
: "r" (cacr), "r" (addr));
|
|
|
|
addr += 4;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* Flush the whole cache, even if page granularity requested. */
|
|
|
|
unsigned long cacr;
|
|
|
|
__asm__ ("movec %%cacr, %0" : "=r" (cacr));
|
|
|
|
if (cache & FLUSH_CACHE_INSN)
|
|
|
|
cacr |= 8;
|
|
|
|
if (cache & FLUSH_CACHE_DATA)
|
|
|
|
cacr |= 0x800;
|
|
|
|
__asm__ __volatile__ ("movec %0, %%cacr" : : "r" (cacr));
|
|
|
|
}
|
|
|
|
ret = 0;
|
2014-10-10 05:29:45 +07:00
|
|
|
goto out_unlock;
|
2011-04-21 09:48:07 +07:00
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* 040 or 060: don't blindly trust 'scope', someone could
|
|
|
|
* try to flush a few megs of memory.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (len>=3*PAGE_SIZE && scope<FLUSH_SCOPE_PAGE)
|
|
|
|
scope=FLUSH_SCOPE_PAGE;
|
|
|
|
if (len>=10*PAGE_SIZE && scope<FLUSH_SCOPE_ALL)
|
|
|
|
scope=FLUSH_SCOPE_ALL;
|
|
|
|
if (CPU_IS_040) {
|
|
|
|
ret = cache_flush_040 (addr, scope, cache, len);
|
|
|
|
} else if (CPU_IS_060) {
|
|
|
|
ret = cache_flush_060 (addr, scope, cache, len);
|
|
|
|
}
|
|
|
|
}
|
2014-10-10 05:29:45 +07:00
|
|
|
out_unlock:
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
2011-04-21 09:48:07 +07:00
|
|
|
out:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This syscall gets its arguments in A0 (mem), D2 (oldval) and
|
|
|
|
D1 (newval). */
|
|
|
|
asmlinkage int
|
|
|
|
sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
|
|
|
|
unsigned long __user * mem)
|
|
|
|
{
|
|
|
|
/* This was borrowed from ARM's implementation. */
|
|
|
|
for (;;) {
|
|
|
|
struct mm_struct *mm = current->mm;
|
|
|
|
pgd_t *pgd;
|
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte;
|
|
|
|
spinlock_t *ptl;
|
|
|
|
unsigned long mem_value;
|
|
|
|
|
|
|
|
down_read(&mm->mmap_sem);
|
|
|
|
pgd = pgd_offset(mm, (unsigned long)mem);
|
|
|
|
if (!pgd_present(*pgd))
|
|
|
|
goto bad_access;
|
|
|
|
pmd = pmd_offset(pgd, (unsigned long)mem);
|
|
|
|
if (!pmd_present(*pmd))
|
|
|
|
goto bad_access;
|
|
|
|
pte = pte_offset_map_lock(mm, pmd, (unsigned long)mem, &ptl);
|
|
|
|
if (!pte_present(*pte) || !pte_dirty(*pte)
|
|
|
|
|| !pte_write(*pte)) {
|
|
|
|
pte_unmap_unlock(pte, ptl);
|
|
|
|
goto bad_access;
|
|
|
|
}
|
|
|
|
|
2012-07-28 05:20:34 +07:00
|
|
|
/*
|
|
|
|
* No need to check for EFAULT; we know that the page is
|
|
|
|
* present and writable.
|
|
|
|
*/
|
|
|
|
__get_user(mem_value, mem);
|
2011-04-21 09:48:07 +07:00
|
|
|
if (mem_value == oldval)
|
2012-07-28 05:20:34 +07:00
|
|
|
__put_user(newval, mem);
|
2011-04-21 09:48:07 +07:00
|
|
|
|
|
|
|
pte_unmap_unlock(pte, ptl);
|
|
|
|
up_read(&mm->mmap_sem);
|
|
|
|
return mem_value;
|
|
|
|
|
|
|
|
bad_access:
|
|
|
|
up_read(&mm->mmap_sem);
|
|
|
|
/* This is not necessarily a bad access, we can get here if
|
|
|
|
a memory we're trying to write to should be copied-on-write.
|
|
|
|
Make the kernel do the necessary page stuff, then re-iterate.
|
|
|
|
Simulate a write access fault to do that. */
|
|
|
|
{
|
|
|
|
/* The first argument of the function corresponds to
|
|
|
|
D1, which is the first field of struct pt_regs. */
|
|
|
|
struct pt_regs *fp = (struct pt_regs *)&newval;
|
|
|
|
|
|
|
|
/* '3' is an RMW flag. */
|
|
|
|
if (do_page_fault(fp, (unsigned long)mem, 3))
|
|
|
|
/* If the do_page_fault() failed, we don't
|
|
|
|
have anything meaningful to return.
|
|
|
|
There should be a SIGSEGV pending for
|
|
|
|
the process. */
|
|
|
|
return 0xdeadbeef;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-03-22 10:39:27 +07:00
|
|
|
#else
|
2011-04-21 09:48:07 +07:00
|
|
|
|
|
|
|
/* sys_cacheflush -- flush (part of) the processor cache. */
|
|
|
|
asmlinkage int
|
|
|
|
sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
|
|
|
|
{
|
|
|
|
flush_cache_all();
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This syscall gets its arguments in A0 (mem), D2 (oldval) and
|
|
|
|
D1 (newval). */
|
|
|
|
asmlinkage int
|
|
|
|
sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
|
|
|
|
unsigned long __user * mem)
|
|
|
|
{
|
|
|
|
struct mm_struct *mm = current->mm;
|
|
|
|
unsigned long mem_value;
|
|
|
|
|
|
|
|
down_read(&mm->mmap_sem);
|
|
|
|
|
|
|
|
mem_value = *mem;
|
|
|
|
if (mem_value == oldval)
|
|
|
|
*mem = newval;
|
|
|
|
|
|
|
|
up_read(&mm->mmap_sem);
|
|
|
|
return mem_value;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* CONFIG_MMU */
|
|
|
|
|
|
|
|
asmlinkage int sys_getpagesize(void)
|
|
|
|
{
|
|
|
|
return PAGE_SIZE;
|
|
|
|
}
|
|
|
|
|
|
|
|
asmlinkage unsigned long sys_get_thread_area(void)
|
|
|
|
{
|
|
|
|
return current_thread_info()->tp_value;
|
|
|
|
}
|
|
|
|
|
|
|
|
asmlinkage int sys_set_thread_area(unsigned long tp)
|
|
|
|
{
|
|
|
|
current_thread_info()->tp_value = tp;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
asmlinkage int sys_atomic_barrier(void)
|
|
|
|
{
|
|
|
|
/* no code needed for uniprocs */
|
|
|
|
return 0;
|
|
|
|
}
|