2005-04-17 05:20:36 +07:00
|
|
|
/*
|
2015-05-11 15:15:47 +07:00
|
|
|
* Intel CPU Microcode Update Driver for Linux
|
2005-04-17 05:20:36 +07:00
|
|
|
*
|
2015-05-11 15:15:47 +07:00
|
|
|
* Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
|
|
|
|
* 2006 Shaohua Li <shaohua.li@intel.com>
|
2005-04-17 05:20:36 +07:00
|
|
|
*
|
2015-10-20 16:54:45 +07:00
|
|
|
* Intel CPU microcode early update for Linux
|
|
|
|
*
|
|
|
|
* Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
|
|
|
|
* H Peter Anvin" <hpa@zytor.com>
|
|
|
|
*
|
2015-05-11 15:15:47 +07:00
|
|
|
* This program is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU General Public License
|
|
|
|
* as published by the Free Software Foundation; either version
|
|
|
|
* 2 of the License, or (at your option) any later version.
|
2005-04-17 05:20:36 +07:00
|
|
|
*/
|
2009-12-09 13:30:50 +07:00
|
|
|
|
2015-10-20 16:54:45 +07:00
|
|
|
/*
|
|
|
|
* This needs to be before all headers so that pr_debug in printk.h doesn't turn
|
|
|
|
* printk calls into no_printk().
|
|
|
|
*
|
|
|
|
*#define DEBUG
|
|
|
|
*/
|
2015-10-20 16:54:46 +07:00
|
|
|
#define pr_fmt(fmt) "microcode: " fmt
|
2009-12-09 13:30:50 +07:00
|
|
|
|
2015-10-20 16:54:45 +07:00
|
|
|
#include <linux/earlycpio.h>
|
2009-03-11 17:19:46 +07:00
|
|
|
#include <linux/firmware.h>
|
|
|
|
#include <linux/uaccess.h>
|
2015-10-20 16:54:45 +07:00
|
|
|
#include <linux/vmalloc.h>
|
|
|
|
#include <linux/initrd.h>
|
2009-03-11 17:19:46 +07:00
|
|
|
#include <linux/kernel.h>
|
2015-10-20 16:54:45 +07:00
|
|
|
#include <linux/slab.h>
|
|
|
|
#include <linux/cpu.h>
|
|
|
|
#include <linux/mm.h>
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2012-12-21 14:44:22 +07:00
|
|
|
#include <asm/microcode_intel.h>
|
2009-03-11 17:19:46 +07:00
|
|
|
#include <asm/processor.h>
|
2015-10-20 16:54:45 +07:00
|
|
|
#include <asm/tlbflush.h>
|
|
|
|
#include <asm/setup.h>
|
2009-03-11 17:19:46 +07:00
|
|
|
#include <asm/msr.h>
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2016-02-03 18:33:41 +07:00
|
|
|
/*
|
2016-06-06 22:10:50 +07:00
|
|
|
* Temporary microcode blobs pointers storage. We note here during early load
|
|
|
|
* the pointers to microcode blobs we've got from whatever storage (detached
|
|
|
|
* initrd, builtin). Later on, we put those into final storage
|
|
|
|
* mc_saved_data.mc_saved.
|
|
|
|
*
|
|
|
|
* Important: those are offsets from the beginning of initrd or absolute
|
|
|
|
* addresses within the kernel image when built-in.
|
2016-02-03 18:33:41 +07:00
|
|
|
*/
|
|
|
|
static unsigned long mc_tmp_ptrs[MAX_UCODE_COUNT];
|
|
|
|
|
2015-10-20 16:54:45 +07:00
|
|
|
static struct mc_saved_data {
|
2016-02-03 18:33:36 +07:00
|
|
|
unsigned int num_saved;
|
2015-10-20 16:54:45 +07:00
|
|
|
struct microcode_intel **mc_saved;
|
|
|
|
} mc_saved_data;
|
|
|
|
|
2016-06-06 22:10:42 +07:00
|
|
|
/* Microcode blobs within the initrd. 0 if builtin. */
|
|
|
|
static struct ucode_blobs {
|
|
|
|
unsigned long start;
|
|
|
|
bool valid;
|
|
|
|
} blobs;
|
|
|
|
|
2016-06-06 22:10:50 +07:00
|
|
|
/* Go through saved patches and find the one suitable for the current CPU. */
|
2015-10-20 16:54:45 +07:00
|
|
|
static enum ucode_state
|
2016-06-06 22:10:47 +07:00
|
|
|
find_microcode_patch(struct microcode_intel **saved,
|
2015-10-20 16:54:45 +07:00
|
|
|
unsigned int num_saved, struct ucode_cpu_info *uci)
|
|
|
|
{
|
|
|
|
struct microcode_intel *ucode_ptr, *new_mc = NULL;
|
|
|
|
struct microcode_header_intel *mc_hdr;
|
|
|
|
int new_rev, ret, i;
|
|
|
|
|
|
|
|
new_rev = uci->cpu_sig.rev;
|
|
|
|
|
|
|
|
for (i = 0; i < num_saved; i++) {
|
|
|
|
ucode_ptr = saved[i];
|
|
|
|
mc_hdr = (struct microcode_header_intel *)ucode_ptr;
|
|
|
|
|
|
|
|
ret = has_newer_microcode(ucode_ptr,
|
|
|
|
uci->cpu_sig.sig,
|
|
|
|
uci->cpu_sig.pf,
|
|
|
|
new_rev);
|
|
|
|
if (!ret)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
new_rev = mc_hdr->rev;
|
|
|
|
new_mc = ucode_ptr;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!new_mc)
|
|
|
|
return UCODE_NFOUND;
|
|
|
|
|
|
|
|
uci->mc = (struct microcode_intel *)new_mc;
|
|
|
|
return UCODE_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void
|
2016-02-03 18:33:41 +07:00
|
|
|
copy_ptrs(struct microcode_intel **mc_saved, unsigned long *mc_ptrs,
|
|
|
|
unsigned long off, int num_saved)
|
2015-10-20 16:54:45 +07:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < num_saved; i++)
|
2016-02-03 18:33:41 +07:00
|
|
|
mc_saved[i] = (struct microcode_intel *)(mc_ptrs[i] + off);
|
2015-10-20 16:54:45 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_X86_32
|
|
|
|
static void
|
2016-02-03 18:33:35 +07:00
|
|
|
microcode_phys(struct microcode_intel **mc_saved_tmp, struct mc_saved_data *mcs)
|
2015-10-20 16:54:45 +07:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
struct microcode_intel ***mc_saved;
|
|
|
|
|
2016-02-03 18:33:35 +07:00
|
|
|
mc_saved = (struct microcode_intel ***)__pa_nodebug(&mcs->mc_saved);
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
for (i = 0; i < mcs->num_saved; i++) {
|
2015-10-20 16:54:45 +07:00
|
|
|
struct microcode_intel *p;
|
|
|
|
|
2016-02-03 18:33:35 +07:00
|
|
|
p = *(struct microcode_intel **)__pa_nodebug(mcs->mc_saved + i);
|
2015-10-20 16:54:45 +07:00
|
|
|
mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static enum ucode_state
|
2016-02-03 18:33:41 +07:00
|
|
|
load_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
|
|
|
|
unsigned long offset, struct ucode_cpu_info *uci)
|
2015-10-20 16:54:45 +07:00
|
|
|
{
|
|
|
|
struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
|
2016-02-03 18:33:36 +07:00
|
|
|
unsigned int count = mcs->num_saved;
|
2015-10-20 16:54:45 +07:00
|
|
|
|
2016-02-03 18:33:35 +07:00
|
|
|
if (!mcs->mc_saved) {
|
2016-02-03 18:33:41 +07:00
|
|
|
copy_ptrs(mc_saved_tmp, mc_ptrs, offset, count);
|
2015-10-20 16:54:45 +07:00
|
|
|
|
2016-06-06 22:10:47 +07:00
|
|
|
return find_microcode_patch(mc_saved_tmp, count, uci);
|
2015-10-20 16:54:45 +07:00
|
|
|
} else {
|
|
|
|
#ifdef CONFIG_X86_32
|
2016-02-03 18:33:35 +07:00
|
|
|
microcode_phys(mc_saved_tmp, mcs);
|
2016-06-06 22:10:47 +07:00
|
|
|
return find_microcode_patch(mc_saved_tmp, count, uci);
|
2015-10-20 16:54:45 +07:00
|
|
|
#else
|
2016-06-06 22:10:47 +07:00
|
|
|
return find_microcode_patch(mcs->mc_saved, count, uci);
|
2015-10-20 16:54:45 +07:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Given CPU signature and a microcode patch, this function finds if the
|
|
|
|
* microcode patch has matching family and model with the CPU.
|
|
|
|
*/
|
|
|
|
static enum ucode_state
|
|
|
|
matching_model_microcode(struct microcode_header_intel *mc_header,
|
|
|
|
unsigned long sig)
|
|
|
|
{
|
|
|
|
unsigned int fam, model;
|
|
|
|
unsigned int fam_ucode, model_ucode;
|
|
|
|
struct extended_sigtable *ext_header;
|
|
|
|
unsigned long total_size = get_totalsize(mc_header);
|
|
|
|
unsigned long data_size = get_datasize(mc_header);
|
|
|
|
int ext_sigcount, i;
|
|
|
|
struct extended_signature *ext_sig;
|
|
|
|
|
2015-11-23 17:12:21 +07:00
|
|
|
fam = x86_family(sig);
|
2015-10-20 16:54:45 +07:00
|
|
|
model = x86_model(sig);
|
|
|
|
|
2015-11-23 17:12:21 +07:00
|
|
|
fam_ucode = x86_family(mc_header->sig);
|
2015-10-20 16:54:45 +07:00
|
|
|
model_ucode = x86_model(mc_header->sig);
|
|
|
|
|
|
|
|
if (fam == fam_ucode && model == model_ucode)
|
|
|
|
return UCODE_OK;
|
|
|
|
|
|
|
|
/* Look for ext. headers: */
|
|
|
|
if (total_size <= data_size + MC_HEADER_SIZE)
|
|
|
|
return UCODE_NFOUND;
|
|
|
|
|
|
|
|
ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
|
|
|
|
ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
|
|
|
|
ext_sigcount = ext_header->count;
|
|
|
|
|
|
|
|
for (i = 0; i < ext_sigcount; i++) {
|
2015-11-23 17:12:21 +07:00
|
|
|
fam_ucode = x86_family(ext_sig->sig);
|
2015-10-20 16:54:45 +07:00
|
|
|
model_ucode = x86_model(ext_sig->sig);
|
|
|
|
|
|
|
|
if (fam == fam_ucode && model == model_ucode)
|
|
|
|
return UCODE_OK;
|
|
|
|
|
|
|
|
ext_sig++;
|
|
|
|
}
|
|
|
|
return UCODE_NFOUND;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
2016-02-03 18:33:35 +07:00
|
|
|
save_microcode(struct mc_saved_data *mcs,
|
2015-10-20 16:54:45 +07:00
|
|
|
struct microcode_intel **mc_saved_src,
|
2016-02-03 18:33:36 +07:00
|
|
|
unsigned int num_saved)
|
2015-10-20 16:54:45 +07:00
|
|
|
{
|
|
|
|
int i, j;
|
|
|
|
struct microcode_intel **saved_ptr;
|
|
|
|
int ret;
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
if (!num_saved)
|
2015-10-20 16:54:45 +07:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Copy new microcode data.
|
|
|
|
*/
|
2016-02-03 18:33:36 +07:00
|
|
|
saved_ptr = kcalloc(num_saved, sizeof(struct microcode_intel *), GFP_KERNEL);
|
2015-10-20 16:54:45 +07:00
|
|
|
if (!saved_ptr)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
for (i = 0; i < num_saved; i++) {
|
2015-10-20 16:54:45 +07:00
|
|
|
struct microcode_header_intel *mc_hdr;
|
|
|
|
struct microcode_intel *mc;
|
|
|
|
unsigned long size;
|
|
|
|
|
|
|
|
if (!mc_saved_src[i]) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
mc = mc_saved_src[i];
|
|
|
|
mc_hdr = &mc->hdr;
|
|
|
|
size = get_totalsize(mc_hdr);
|
|
|
|
|
2016-02-16 15:43:20 +07:00
|
|
|
saved_ptr[i] = kmemdup(mc, size, GFP_KERNEL);
|
2015-10-20 16:54:45 +07:00
|
|
|
if (!saved_ptr[i]) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Point to newly saved microcode.
|
|
|
|
*/
|
2016-02-03 18:33:36 +07:00
|
|
|
mcs->mc_saved = saved_ptr;
|
|
|
|
mcs->num_saved = num_saved;
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err:
|
|
|
|
for (j = 0; j <= i; j++)
|
|
|
|
kfree(saved_ptr[j]);
|
|
|
|
kfree(saved_ptr);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A microcode patch in ucode_ptr is saved into mc_saved
|
|
|
|
* - if it has matching signature and newer revision compared to an existing
|
|
|
|
* patch mc_saved.
|
|
|
|
* - or if it is a newly discovered microcode patch.
|
|
|
|
*
|
|
|
|
* The microcode patch should have matching model with CPU.
|
|
|
|
*
|
|
|
|
* Returns: The updated number @num_saved of saved microcode patches.
|
|
|
|
*/
|
|
|
|
static unsigned int _save_mc(struct microcode_intel **mc_saved,
|
|
|
|
u8 *ucode_ptr, unsigned int num_saved)
|
|
|
|
{
|
|
|
|
struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
|
|
|
|
unsigned int sig, pf;
|
|
|
|
int found = 0, i;
|
|
|
|
|
|
|
|
mc_hdr = (struct microcode_header_intel *)ucode_ptr;
|
|
|
|
|
|
|
|
for (i = 0; i < num_saved; i++) {
|
|
|
|
mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
|
|
|
|
sig = mc_saved_hdr->sig;
|
|
|
|
pf = mc_saved_hdr->pf;
|
|
|
|
|
|
|
|
if (!find_matching_signature(ucode_ptr, sig, pf))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
found = 1;
|
|
|
|
|
|
|
|
if (mc_hdr->rev <= mc_saved_hdr->rev)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Found an older ucode saved earlier. Replace it with
|
|
|
|
* this newer one.
|
|
|
|
*/
|
|
|
|
mc_saved[i] = (struct microcode_intel *)ucode_ptr;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Newly detected microcode, save it to memory. */
|
|
|
|
if (i >= num_saved && !found)
|
|
|
|
mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
|
|
|
|
|
|
|
|
return num_saved;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Get microcode matching with BSP's model. Only CPUs with the same model as
|
|
|
|
* BSP can stay in the platform.
|
|
|
|
*/
|
|
|
|
static enum ucode_state __init
|
2016-02-03 18:33:43 +07:00
|
|
|
get_matching_model_microcode(unsigned long start, void *data, size_t size,
|
|
|
|
struct mc_saved_data *mcs, unsigned long *mc_ptrs,
|
2015-10-20 16:54:45 +07:00
|
|
|
struct ucode_cpu_info *uci)
|
|
|
|
{
|
|
|
|
struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
|
2016-02-03 18:33:43 +07:00
|
|
|
struct microcode_header_intel *mc_header;
|
2016-02-03 18:33:36 +07:00
|
|
|
unsigned int num_saved = mcs->num_saved;
|
2016-02-03 18:33:43 +07:00
|
|
|
enum ucode_state state = UCODE_OK;
|
|
|
|
unsigned int leftover = size;
|
|
|
|
u8 *ucode_ptr = data;
|
|
|
|
unsigned int mc_size;
|
2015-10-20 16:54:45 +07:00
|
|
|
int i;
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
while (leftover && num_saved < ARRAY_SIZE(mc_saved_tmp)) {
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
if (leftover < sizeof(mc_header))
|
|
|
|
break;
|
|
|
|
|
|
|
|
mc_header = (struct microcode_header_intel *)ucode_ptr;
|
|
|
|
|
|
|
|
mc_size = get_totalsize(mc_header);
|
|
|
|
if (!mc_size || mc_size > leftover ||
|
|
|
|
microcode_sanity_check(ucode_ptr, 0) < 0)
|
|
|
|
break;
|
|
|
|
|
|
|
|
leftover -= mc_size;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Since APs with same family and model as the BSP may boot in
|
|
|
|
* the platform, we need to find and save microcode patches
|
|
|
|
* with the same family and model as the BSP.
|
|
|
|
*/
|
2016-02-03 18:33:43 +07:00
|
|
|
if (matching_model_microcode(mc_header, uci->cpu_sig.sig) != UCODE_OK) {
|
2015-10-20 16:54:45 +07:00
|
|
|
ucode_ptr += mc_size;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
num_saved = _save_mc(mc_saved_tmp, ucode_ptr, num_saved);
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
ucode_ptr += mc_size;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (leftover) {
|
|
|
|
state = UCODE_ERROR;
|
2016-02-03 18:33:43 +07:00
|
|
|
return state;
|
2015-10-20 16:54:45 +07:00
|
|
|
}
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
if (!num_saved) {
|
2015-10-20 16:54:45 +07:00
|
|
|
state = UCODE_NFOUND;
|
2016-02-03 18:33:43 +07:00
|
|
|
return state;
|
2015-10-20 16:54:45 +07:00
|
|
|
}
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
for (i = 0; i < num_saved; i++)
|
2016-02-03 18:33:41 +07:00
|
|
|
mc_ptrs[i] = (unsigned long)mc_saved_tmp[i] - start;
|
2015-10-20 16:54:45 +07:00
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
mcs->num_saved = num_saved;
|
2016-02-03 18:33:43 +07:00
|
|
|
|
2015-10-20 16:54:45 +07:00
|
|
|
return state;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int collect_cpu_info_early(struct ucode_cpu_info *uci)
|
|
|
|
{
|
|
|
|
unsigned int val[2];
|
|
|
|
unsigned int family, model;
|
|
|
|
struct cpu_signature csig;
|
|
|
|
unsigned int eax, ebx, ecx, edx;
|
|
|
|
|
|
|
|
csig.sig = 0;
|
|
|
|
csig.pf = 0;
|
|
|
|
csig.rev = 0;
|
|
|
|
|
|
|
|
memset(uci, 0, sizeof(*uci));
|
|
|
|
|
|
|
|
eax = 0x00000001;
|
|
|
|
ecx = 0;
|
|
|
|
native_cpuid(&eax, &ebx, &ecx, &edx);
|
|
|
|
csig.sig = eax;
|
|
|
|
|
2015-11-23 17:12:21 +07:00
|
|
|
family = x86_family(csig.sig);
|
2015-10-20 16:54:45 +07:00
|
|
|
model = x86_model(csig.sig);
|
|
|
|
|
|
|
|
if ((model >= 5) || (family > 6)) {
|
|
|
|
/* get processor flags from MSR 0x17 */
|
|
|
|
native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
|
|
|
|
csig.pf = 1 << ((val[1] >> 18) & 7);
|
|
|
|
}
|
2016-02-03 18:33:40 +07:00
|
|
|
native_wrmsrl(MSR_IA32_UCODE_REV, 0);
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
/* As documented in the SDM: Do a CPUID 1 here */
|
|
|
|
sync_core();
|
|
|
|
|
|
|
|
/* get the current revision from MSR 0x8B */
|
|
|
|
native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
|
|
|
|
|
|
|
|
csig.rev = val[1];
|
|
|
|
|
|
|
|
uci->cpu_sig = csig;
|
|
|
|
uci->valid = 1;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void show_saved_mc(void)
|
|
|
|
{
|
2015-10-20 16:54:48 +07:00
|
|
|
#ifdef DEBUG
|
2015-10-20 16:54:45 +07:00
|
|
|
int i, j;
|
|
|
|
unsigned int sig, pf, rev, total_size, data_size, date;
|
|
|
|
struct ucode_cpu_info uci;
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
if (!mc_saved_data.num_saved) {
|
2015-10-20 16:54:45 +07:00
|
|
|
pr_debug("no microcode data saved.\n");
|
|
|
|
return;
|
|
|
|
}
|
2016-02-03 18:33:36 +07:00
|
|
|
pr_debug("Total microcode saved: %d\n", mc_saved_data.num_saved);
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
collect_cpu_info_early(&uci);
|
|
|
|
|
|
|
|
sig = uci.cpu_sig.sig;
|
|
|
|
pf = uci.cpu_sig.pf;
|
|
|
|
rev = uci.cpu_sig.rev;
|
|
|
|
pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
for (i = 0; i < mc_saved_data.num_saved; i++) {
|
2015-10-20 16:54:45 +07:00
|
|
|
struct microcode_header_intel *mc_saved_header;
|
|
|
|
struct extended_sigtable *ext_header;
|
|
|
|
int ext_sigcount;
|
|
|
|
struct extended_signature *ext_sig;
|
|
|
|
|
|
|
|
mc_saved_header = (struct microcode_header_intel *)
|
|
|
|
mc_saved_data.mc_saved[i];
|
|
|
|
sig = mc_saved_header->sig;
|
|
|
|
pf = mc_saved_header->pf;
|
|
|
|
rev = mc_saved_header->rev;
|
|
|
|
total_size = get_totalsize(mc_saved_header);
|
|
|
|
data_size = get_datasize(mc_saved_header);
|
|
|
|
date = mc_saved_header->date;
|
|
|
|
|
2016-02-08 18:53:12 +07:00
|
|
|
pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",
|
2015-10-20 16:54:45 +07:00
|
|
|
i, sig, pf, rev, total_size,
|
|
|
|
date & 0xffff,
|
|
|
|
date >> 24,
|
|
|
|
(date >> 16) & 0xff);
|
|
|
|
|
|
|
|
/* Look for ext. headers: */
|
|
|
|
if (total_size <= data_size + MC_HEADER_SIZE)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
|
|
|
|
ext_sigcount = ext_header->count;
|
|
|
|
ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
|
|
|
|
|
|
|
|
for (j = 0; j < ext_sigcount; j++) {
|
|
|
|
sig = ext_sig->sig;
|
|
|
|
pf = ext_sig->pf;
|
|
|
|
|
|
|
|
pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
|
|
|
|
j, sig, pf);
|
|
|
|
|
|
|
|
ext_sig++;
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
#endif
|
2015-10-20 16:54:48 +07:00
|
|
|
}
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Save this mc into mc_saved_data. So it will be loaded early when a CPU is
|
|
|
|
* hot added or resumes.
|
|
|
|
*
|
|
|
|
* Please make sure this mc should be a valid microcode patch before calling
|
|
|
|
* this function.
|
|
|
|
*/
|
2016-06-06 22:10:48 +07:00
|
|
|
static void save_mc_for_early(u8 *mc)
|
2015-10-20 16:54:45 +07:00
|
|
|
{
|
2016-06-06 22:10:48 +07:00
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
2016-06-06 22:10:50 +07:00
|
|
|
/* Synchronization during CPU hotplug. */
|
2016-06-06 22:10:48 +07:00
|
|
|
static DEFINE_MUTEX(x86_cpu_microcode_mutex);
|
|
|
|
|
2015-10-20 16:54:45 +07:00
|
|
|
struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
|
|
|
|
unsigned int mc_saved_count_init;
|
2016-02-03 18:33:36 +07:00
|
|
|
unsigned int num_saved;
|
2015-10-20 16:54:45 +07:00
|
|
|
struct microcode_intel **mc_saved;
|
2016-06-06 22:10:48 +07:00
|
|
|
int ret, i;
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
mutex_lock(&x86_cpu_microcode_mutex);
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
mc_saved_count_init = mc_saved_data.num_saved;
|
|
|
|
num_saved = mc_saved_data.num_saved;
|
2015-10-20 16:54:45 +07:00
|
|
|
mc_saved = mc_saved_data.mc_saved;
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
if (mc_saved && num_saved)
|
2015-10-20 16:54:45 +07:00
|
|
|
memcpy(mc_saved_tmp, mc_saved,
|
2016-02-03 18:33:36 +07:00
|
|
|
num_saved * sizeof(struct microcode_intel *));
|
2015-10-20 16:54:45 +07:00
|
|
|
/*
|
|
|
|
* Save the microcode patch mc in mc_save_tmp structure if it's a newer
|
|
|
|
* version.
|
|
|
|
*/
|
2016-02-03 18:33:36 +07:00
|
|
|
num_saved = _save_mc(mc_saved_tmp, mc, num_saved);
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Save the mc_save_tmp in global mc_saved_data.
|
|
|
|
*/
|
2016-02-03 18:33:36 +07:00
|
|
|
ret = save_microcode(&mc_saved_data, mc_saved_tmp, num_saved);
|
2015-10-20 16:54:45 +07:00
|
|
|
if (ret) {
|
|
|
|
pr_err("Cannot save microcode patch.\n");
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
show_saved_mc();
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Free old saved microcode data.
|
|
|
|
*/
|
|
|
|
if (mc_saved) {
|
|
|
|
for (i = 0; i < mc_saved_count_init; i++)
|
|
|
|
kfree(mc_saved[i]);
|
|
|
|
kfree(mc_saved);
|
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
|
|
|
mutex_unlock(&x86_cpu_microcode_mutex);
|
|
|
|
#endif
|
2016-06-06 22:10:48 +07:00
|
|
|
}
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
|
|
|
|
char name[30];
|
|
|
|
|
|
|
|
native_cpuid(&eax, &ebx, &ecx, &edx);
|
|
|
|
|
2015-11-23 17:12:21 +07:00
|
|
|
sprintf(name, "intel-ucode/%02x-%02x-%02x",
|
|
|
|
x86_family(eax), x86_model(eax), x86_stepping(eax));
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
return get_builtin_firmware(cp, name);
|
|
|
|
#else
|
|
|
|
return false;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Print ucode update info.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
|
|
|
|
{
|
2016-02-03 18:33:33 +07:00
|
|
|
pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
|
|
|
|
uci->cpu_sig.rev,
|
|
|
|
date & 0xffff,
|
|
|
|
date >> 24,
|
|
|
|
(date >> 16) & 0xff);
|
2015-10-20 16:54:45 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_X86_32
|
|
|
|
|
|
|
|
static int delay_ucode_info;
|
|
|
|
static int current_mc_date;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Print early updated ucode info after printk works. This is delayed info dump.
|
|
|
|
*/
|
|
|
|
void show_ucode_info_early(void)
|
|
|
|
{
|
|
|
|
struct ucode_cpu_info uci;
|
|
|
|
|
|
|
|
if (delay_ucode_info) {
|
|
|
|
collect_cpu_info_early(&uci);
|
|
|
|
print_ucode_info(&uci, current_mc_date);
|
|
|
|
delay_ucode_info = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* At this point, we can not call printk() yet. Keep microcode patch number in
|
|
|
|
* mc_saved_data.mc_saved and delay printing microcode info in
|
|
|
|
* show_ucode_info_early() until printk() works.
|
|
|
|
*/
|
|
|
|
static void print_ucode(struct ucode_cpu_info *uci)
|
|
|
|
{
|
2016-02-03 18:33:37 +07:00
|
|
|
struct microcode_intel *mc;
|
2015-10-20 16:54:45 +07:00
|
|
|
int *delay_ucode_info_p;
|
|
|
|
int *current_mc_date_p;
|
|
|
|
|
2016-02-03 18:33:37 +07:00
|
|
|
mc = uci->mc;
|
|
|
|
if (!mc)
|
2015-10-20 16:54:45 +07:00
|
|
|
return;
|
|
|
|
|
|
|
|
delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
|
|
|
|
current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date);
|
|
|
|
|
|
|
|
*delay_ucode_info_p = 1;
|
2016-02-03 18:33:37 +07:00
|
|
|
*current_mc_date_p = mc->hdr.date;
|
2015-10-20 16:54:45 +07:00
|
|
|
}
|
|
|
|
#else
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Flush global tlb. We only do this in x86_64 where paging has been enabled
|
|
|
|
* already and PGE should be enabled as well.
|
|
|
|
*/
|
|
|
|
static inline void flush_tlb_early(void)
|
|
|
|
{
|
|
|
|
__native_flush_tlb_global_irq_disabled();
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void print_ucode(struct ucode_cpu_info *uci)
|
|
|
|
{
|
2016-02-03 18:33:37 +07:00
|
|
|
struct microcode_intel *mc;
|
2015-10-20 16:54:45 +07:00
|
|
|
|
2016-02-03 18:33:37 +07:00
|
|
|
mc = uci->mc;
|
|
|
|
if (!mc)
|
2015-10-20 16:54:45 +07:00
|
|
|
return;
|
|
|
|
|
2016-02-03 18:33:37 +07:00
|
|
|
print_ucode_info(uci, mc->hdr.date);
|
2015-10-20 16:54:45 +07:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
|
|
|
|
{
|
2016-02-03 18:33:37 +07:00
|
|
|
struct microcode_intel *mc;
|
2015-10-20 16:54:45 +07:00
|
|
|
unsigned int val[2];
|
|
|
|
|
2016-02-03 18:33:37 +07:00
|
|
|
mc = uci->mc;
|
|
|
|
if (!mc)
|
2015-10-20 16:54:45 +07:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* write microcode via MSR 0x79 */
|
2016-02-03 18:33:40 +07:00
|
|
|
native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
|
|
|
|
native_wrmsrl(MSR_IA32_UCODE_REV, 0);
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
/* As documented in the SDM: Do a CPUID 1 here */
|
|
|
|
sync_core();
|
|
|
|
|
|
|
|
/* get the current revision from MSR 0x8B */
|
|
|
|
native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
|
2016-02-03 18:33:37 +07:00
|
|
|
if (val[1] != mc->hdr.rev)
|
2015-10-20 16:54:45 +07:00
|
|
|
return -1;
|
|
|
|
|
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
/* Flush global tlb. This is precaution. */
|
|
|
|
flush_tlb_early();
|
|
|
|
#endif
|
|
|
|
uci->cpu_sig.rev = val[1];
|
|
|
|
|
|
|
|
if (early)
|
|
|
|
print_ucode(uci);
|
|
|
|
else
|
2016-02-03 18:33:37 +07:00
|
|
|
print_ucode_info(uci, mc->hdr.date);
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function converts microcode patch offsets previously stored in
|
2016-02-03 18:33:41 +07:00
|
|
|
* mc_tmp_ptrs to pointers and stores the pointers in mc_saved_data.
|
2015-10-20 16:54:45 +07:00
|
|
|
*/
|
|
|
|
int __init save_microcode_in_initrd_intel(void)
|
|
|
|
{
|
|
|
|
struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
|
2016-06-06 22:10:42 +07:00
|
|
|
unsigned int count = mc_saved_data.num_saved;
|
|
|
|
unsigned long offset = 0;
|
|
|
|
int ret;
|
2015-10-20 16:54:45 +07:00
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
if (!count)
|
2016-06-06 22:10:42 +07:00
|
|
|
return 0;
|
2015-10-20 16:54:45 +07:00
|
|
|
|
2016-06-06 22:10:42 +07:00
|
|
|
/*
|
|
|
|
* We have found a valid initrd but it might've been relocated in the
|
|
|
|
* meantime so get its updated address.
|
|
|
|
*/
|
|
|
|
if (IS_ENABLED(CONFIG_BLK_DEV_INITRD) && blobs.valid)
|
|
|
|
offset = initrd_start;
|
|
|
|
|
|
|
|
copy_ptrs(mc_saved, mc_tmp_ptrs, offset, count);
|
2016-02-03 18:33:36 +07:00
|
|
|
|
2015-10-20 16:54:45 +07:00
|
|
|
ret = save_microcode(&mc_saved_data, mc_saved, count);
|
|
|
|
if (ret)
|
|
|
|
pr_err("Cannot save microcode patches from initrd.\n");
|
2016-06-06 22:10:46 +07:00
|
|
|
else
|
|
|
|
show_saved_mc();
|
2015-10-20 16:54:45 +07:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2016-06-06 22:10:42 +07:00
|
|
|
static __init enum ucode_state
|
|
|
|
__scan_microcode_initrd(struct cpio_data *cd, struct ucode_blobs *blbp)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_BLK_DEV_INITRD
|
|
|
|
static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
|
|
|
|
char *p = IS_ENABLED(CONFIG_X86_32) ? (char *)__pa_nodebug(ucode_name)
|
|
|
|
: ucode_name;
|
|
|
|
# ifdef CONFIG_X86_32
|
|
|
|
unsigned long start = 0, size;
|
|
|
|
struct boot_params *params;
|
|
|
|
|
|
|
|
params = (struct boot_params *)__pa_nodebug(&boot_params);
|
|
|
|
size = params->hdr.ramdisk_size;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set start only if we have an initrd image. We cannot use initrd_start
|
|
|
|
* because it is not set that early yet.
|
|
|
|
*/
|
|
|
|
start = (size ? params->hdr.ramdisk_image : 0);
|
|
|
|
|
|
|
|
# else /* CONFIG_X86_64 */
|
|
|
|
unsigned long start = 0, size;
|
|
|
|
|
|
|
|
size = (u64)boot_params.ext_ramdisk_size << 32;
|
|
|
|
size |= boot_params.hdr.ramdisk_size;
|
|
|
|
|
|
|
|
if (size) {
|
|
|
|
start = (u64)boot_params.ext_ramdisk_image << 32;
|
|
|
|
start |= boot_params.hdr.ramdisk_image;
|
|
|
|
|
|
|
|
start += PAGE_OFFSET;
|
|
|
|
}
|
|
|
|
# endif
|
|
|
|
|
2016-06-06 22:10:45 +07:00
|
|
|
*cd = find_cpio_data(p, (void *)start, size, NULL);
|
2016-06-06 22:10:42 +07:00
|
|
|
if (cd->data) {
|
|
|
|
blbp->start = start;
|
|
|
|
blbp->valid = true;
|
|
|
|
|
|
|
|
return UCODE_OK;
|
|
|
|
} else
|
|
|
|
#endif /* CONFIG_BLK_DEV_INITRD */
|
|
|
|
return UCODE_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __init enum ucode_state
|
|
|
|
scan_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
|
|
|
|
struct ucode_cpu_info *uci, struct ucode_blobs *blbp)
|
|
|
|
{
|
|
|
|
struct cpio_data cd = { NULL, 0, "" };
|
|
|
|
enum ucode_state ret;
|
|
|
|
|
|
|
|
/* try built-in microcode first */
|
|
|
|
if (load_builtin_intel_microcode(&cd))
|
|
|
|
/*
|
|
|
|
* Invalidate blobs as we might've gotten an initrd too,
|
|
|
|
* supplied by the boot loader, by mistake or simply forgotten
|
|
|
|
* there. That's fine, we ignore it since we've found builtin
|
|
|
|
* microcode already.
|
|
|
|
*/
|
|
|
|
blbp->valid = false;
|
|
|
|
else {
|
|
|
|
ret = __scan_microcode_initrd(&cd, blbp);
|
|
|
|
if (ret != UCODE_OK)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return get_matching_model_microcode(blbp->start, cd.data, cd.size,
|
|
|
|
mcs, mc_ptrs, uci);
|
|
|
|
}
|
|
|
|
|
2015-10-20 16:54:45 +07:00
|
|
|
static void __init
|
2016-02-03 18:33:41 +07:00
|
|
|
_load_ucode_intel_bsp(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
|
2016-06-06 22:10:42 +07:00
|
|
|
struct ucode_blobs *blbp)
|
2015-10-20 16:54:45 +07:00
|
|
|
{
|
|
|
|
struct ucode_cpu_info uci;
|
|
|
|
enum ucode_state ret;
|
|
|
|
|
|
|
|
collect_cpu_info_early(&uci);
|
|
|
|
|
2016-06-06 22:10:42 +07:00
|
|
|
ret = scan_microcode(mcs, mc_ptrs, &uci, blbp);
|
2015-10-20 16:54:45 +07:00
|
|
|
if (ret != UCODE_OK)
|
|
|
|
return;
|
|
|
|
|
2016-06-06 22:10:42 +07:00
|
|
|
ret = load_microcode(mcs, mc_ptrs, blbp->start, &uci);
|
2015-10-20 16:54:45 +07:00
|
|
|
if (ret != UCODE_OK)
|
|
|
|
return;
|
|
|
|
|
|
|
|
apply_microcode_early(&uci, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
void __init load_ucode_intel_bsp(void)
|
|
|
|
{
|
2016-06-06 22:10:42 +07:00
|
|
|
struct ucode_blobs *blobs_p;
|
|
|
|
struct mc_saved_data *mcs;
|
|
|
|
unsigned long *ptrs;
|
2016-02-03 18:33:30 +07:00
|
|
|
|
2016-06-06 22:10:42 +07:00
|
|
|
#ifdef CONFIG_X86_32
|
|
|
|
mcs = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
|
|
|
|
ptrs = (unsigned long *)__pa_nodebug(&mc_tmp_ptrs);
|
|
|
|
blobs_p = (struct ucode_blobs *)__pa_nodebug(&blobs);
|
2015-10-20 16:54:45 +07:00
|
|
|
#else
|
2016-06-06 22:10:42 +07:00
|
|
|
mcs = &mc_saved_data;
|
|
|
|
ptrs = mc_tmp_ptrs;
|
|
|
|
blobs_p = &blobs;
|
2015-10-20 16:54:45 +07:00
|
|
|
#endif
|
2016-06-06 22:10:42 +07:00
|
|
|
|
|
|
|
_load_ucode_intel_bsp(mcs, ptrs, blobs_p);
|
2015-10-20 16:54:45 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
void load_ucode_intel_ap(void)
|
|
|
|
{
|
2016-06-06 22:10:42 +07:00
|
|
|
struct ucode_blobs *blobs_p;
|
|
|
|
struct mc_saved_data *mcs;
|
2016-02-03 18:33:35 +07:00
|
|
|
struct ucode_cpu_info uci;
|
2015-10-20 16:54:45 +07:00
|
|
|
enum ucode_state ret;
|
2016-06-06 22:10:42 +07:00
|
|
|
unsigned long *ptrs;
|
2015-10-20 16:54:45 +07:00
|
|
|
|
2016-06-06 22:10:42 +07:00
|
|
|
#ifdef CONFIG_X86_32
|
|
|
|
mcs = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
|
|
|
|
ptrs = (unsigned long *)__pa_nodebug(mc_tmp_ptrs);
|
|
|
|
blobs_p = (struct ucode_blobs *)__pa_nodebug(&blobs);
|
2015-10-20 16:54:45 +07:00
|
|
|
#else
|
2016-06-06 22:10:42 +07:00
|
|
|
mcs = &mc_saved_data;
|
|
|
|
ptrs = mc_tmp_ptrs;
|
|
|
|
blobs_p = &blobs;
|
2015-10-20 16:54:45 +07:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If there is no valid ucode previously saved in memory, no need to
|
|
|
|
* update ucode on this AP.
|
|
|
|
*/
|
2016-06-06 22:10:42 +07:00
|
|
|
if (!mcs->num_saved)
|
2015-10-20 16:54:45 +07:00
|
|
|
return;
|
|
|
|
|
|
|
|
collect_cpu_info_early(&uci);
|
2016-06-06 22:10:42 +07:00
|
|
|
ret = load_microcode(mcs, ptrs, blobs_p->start, &uci);
|
2015-10-20 16:54:45 +07:00
|
|
|
if (ret != UCODE_OK)
|
|
|
|
return;
|
|
|
|
|
|
|
|
apply_microcode_early(&uci, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
void reload_ucode_intel(void)
|
|
|
|
{
|
|
|
|
struct ucode_cpu_info uci;
|
|
|
|
enum ucode_state ret;
|
|
|
|
|
2016-02-03 18:33:36 +07:00
|
|
|
if (!mc_saved_data.num_saved)
|
2015-10-20 16:54:45 +07:00
|
|
|
return;
|
|
|
|
|
|
|
|
collect_cpu_info_early(&uci);
|
|
|
|
|
2016-06-06 22:10:47 +07:00
|
|
|
ret = find_microcode_patch(mc_saved_data.mc_saved,
|
2016-02-03 18:33:36 +07:00
|
|
|
mc_saved_data.num_saved, &uci);
|
2015-10-20 16:54:45 +07:00
|
|
|
if (ret != UCODE_OK)
|
|
|
|
return;
|
|
|
|
|
|
|
|
apply_microcode_early(&uci, false);
|
|
|
|
}
|
|
|
|
|
2008-08-20 05:22:26 +07:00
|
|
|
static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2016-06-09 20:41:41 +07:00
|
|
|
static struct cpu_signature prev;
|
2007-10-20 01:35:04 +07:00
|
|
|
struct cpuinfo_x86 *c = &cpu_data(cpu_num);
|
2005-04-17 05:20:36 +07:00
|
|
|
unsigned int val[2];
|
|
|
|
|
2008-08-20 05:22:26 +07:00
|
|
|
memset(csig, 0, sizeof(*csig));
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-20 05:22:26 +07:00
|
|
|
csig->sig = cpuid_eax(0x00000001);
|
2006-09-27 15:50:51 +07:00
|
|
|
|
|
|
|
if ((c->x86_model >= 5) || (c->x86 > 6)) {
|
|
|
|
/* get processor flags from MSR 0x17 */
|
|
|
|
rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
|
2008-08-20 05:22:26 +07:00
|
|
|
csig->pf = 1 << ((val[1] >> 18) & 7);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2011-10-13 07:46:33 +07:00
|
|
|
csig->rev = c->microcode;
|
2016-06-09 20:41:41 +07:00
|
|
|
|
|
|
|
/* No extra locking on prev, races are harmless. */
|
|
|
|
if (csig->sig != prev.sig || csig->pf != prev.pf || csig->rev != prev.rev) {
|
|
|
|
pr_info("sig=0x%x, pf=0x%x, revision=0x%x\n",
|
|
|
|
csig->sig, csig->pf, csig->rev);
|
|
|
|
prev = *csig;
|
|
|
|
}
|
2008-08-20 05:22:26 +07:00
|
|
|
|
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2006-09-27 15:50:51 +07:00
|
|
|
/*
|
|
|
|
* return 0 - no update found
|
|
|
|
* return 1 - found update
|
|
|
|
*/
|
2016-02-03 18:33:37 +07:00
|
|
|
static int get_matching_mc(struct microcode_intel *mc, int cpu)
|
2006-09-27 15:50:51 +07:00
|
|
|
{
|
2012-12-21 14:44:22 +07:00
|
|
|
struct cpu_signature cpu_sig;
|
|
|
|
unsigned int csig, cpf, crev;
|
2006-09-27 15:50:51 +07:00
|
|
|
|
2012-12-21 14:44:22 +07:00
|
|
|
collect_cpu_info(cpu, &cpu_sig);
|
2008-09-12 04:27:52 +07:00
|
|
|
|
2012-12-21 14:44:22 +07:00
|
|
|
csig = cpu_sig.sig;
|
|
|
|
cpf = cpu_sig.pf;
|
|
|
|
crev = cpu_sig.rev;
|
2006-09-27 15:50:51 +07:00
|
|
|
|
2016-02-03 18:33:37 +07:00
|
|
|
return has_newer_microcode(mc, csig, cpf, crev);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2014-07-25 01:23:21 +07:00
|
|
|
static int apply_microcode_intel(int cpu)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2016-02-03 18:33:37 +07:00
|
|
|
struct microcode_intel *mc;
|
2009-03-11 17:19:46 +07:00
|
|
|
struct ucode_cpu_info *uci;
|
2016-02-03 18:33:39 +07:00
|
|
|
struct cpuinfo_x86 *c;
|
2005-04-17 05:20:36 +07:00
|
|
|
unsigned int val[2];
|
2016-06-09 20:41:41 +07:00
|
|
|
static int prev_rev;
|
2009-03-11 17:19:46 +07:00
|
|
|
|
2006-09-27 15:50:51 +07:00
|
|
|
/* We should bind the task to the CPU */
|
2016-02-03 18:33:39 +07:00
|
|
|
if (WARN_ON(raw_smp_processor_id() != cpu))
|
2016-02-03 18:33:38 +07:00
|
|
|
return -1;
|
2006-09-27 15:50:51 +07:00
|
|
|
|
2016-02-03 18:33:38 +07:00
|
|
|
uci = ucode_cpu_info + cpu;
|
|
|
|
mc = uci->mc;
|
2016-02-03 18:33:37 +07:00
|
|
|
if (!mc)
|
2009-05-12 04:48:27 +07:00
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2012-12-21 14:44:22 +07:00
|
|
|
/*
|
|
|
|
* Microcode on this CPU could be updated earlier. Only apply the
|
2016-02-03 18:33:37 +07:00
|
|
|
* microcode patch in mc when it is newer than the one on this
|
2012-12-21 14:44:22 +07:00
|
|
|
* CPU.
|
|
|
|
*/
|
2016-02-03 18:33:37 +07:00
|
|
|
if (!get_matching_mc(mc, cpu))
|
2012-12-21 14:44:22 +07:00
|
|
|
return 0;
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
/* write microcode via MSR 0x79 */
|
2016-02-03 18:33:40 +07:00
|
|
|
wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
|
|
|
|
wrmsrl(MSR_IA32_UCODE_REV, 0);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2011-10-13 07:46:33 +07:00
|
|
|
/* As documented in the SDM: Do a CPUID 1 here */
|
2006-01-12 04:45:27 +07:00
|
|
|
sync_core();
|
2005-09-04 05:56:37 +07:00
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
/* get the current revision from MSR 0x8B */
|
|
|
|
rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
|
|
|
|
|
2016-02-03 18:33:37 +07:00
|
|
|
if (val[1] != mc->hdr.rev) {
|
2009-12-09 13:30:50 +07:00
|
|
|
pr_err("CPU%d update to revision 0x%x failed\n",
|
2016-02-03 18:33:39 +07:00
|
|
|
cpu, mc->hdr.rev);
|
2009-05-12 04:48:27 +07:00
|
|
|
return -1;
|
2006-09-27 15:50:51 +07:00
|
|
|
}
|
2016-02-03 18:33:39 +07:00
|
|
|
|
2016-06-09 20:41:41 +07:00
|
|
|
if (val[1] != prev_rev) {
|
|
|
|
pr_info("updated to revision 0x%x, date = %04x-%02x-%02x\n",
|
|
|
|
val[1],
|
|
|
|
mc->hdr.date & 0xffff,
|
|
|
|
mc->hdr.date >> 24,
|
|
|
|
(mc->hdr.date >> 16) & 0xff);
|
|
|
|
prev_rev = val[1];
|
|
|
|
}
|
2009-03-11 17:19:46 +07:00
|
|
|
|
2016-02-03 18:33:39 +07:00
|
|
|
c = &cpu_data(cpu);
|
|
|
|
|
2008-08-20 05:22:26 +07:00
|
|
|
uci->cpu_sig.rev = val[1];
|
2011-10-13 07:46:33 +07:00
|
|
|
c->microcode = val[1];
|
2009-05-12 04:48:27 +07:00
|
|
|
|
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2009-05-12 04:48:27 +07:00
|
|
|
static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
|
|
|
|
int (*get_ucode_data)(void *, const void *, size_t))
|
2006-09-27 15:50:51 +07:00
|
|
|
{
|
2008-09-12 04:27:52 +07:00
|
|
|
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
|
2010-03-06 00:42:03 +07:00
|
|
|
u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
|
2008-09-12 04:27:52 +07:00
|
|
|
int new_rev = uci->cpu_sig.rev;
|
|
|
|
unsigned int leftover = size;
|
2009-05-12 04:48:27 +07:00
|
|
|
enum ucode_state state = UCODE_OK;
|
2010-03-06 00:42:03 +07:00
|
|
|
unsigned int curr_mc_size = 0;
|
2012-12-21 14:44:22 +07:00
|
|
|
unsigned int csig, cpf;
|
2006-09-27 15:50:51 +07:00
|
|
|
|
2008-09-12 04:27:52 +07:00
|
|
|
while (leftover) {
|
|
|
|
struct microcode_header_intel mc_header;
|
|
|
|
unsigned int mc_size;
|
2006-09-27 15:50:51 +07:00
|
|
|
|
2015-02-03 19:00:24 +07:00
|
|
|
if (leftover < sizeof(mc_header)) {
|
|
|
|
pr_err("error! Truncated header in microcode data file\n");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2008-09-12 04:27:52 +07:00
|
|
|
if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
|
|
|
|
break;
|
2006-09-27 15:50:52 +07:00
|
|
|
|
2008-09-12 04:27:52 +07:00
|
|
|
mc_size = get_totalsize(&mc_header);
|
|
|
|
if (!mc_size || mc_size > leftover) {
|
2009-12-09 13:30:50 +07:00
|
|
|
pr_err("error! Bad data in microcode data file\n");
|
2008-09-12 04:27:52 +07:00
|
|
|
break;
|
|
|
|
}
|
2006-09-27 15:50:52 +07:00
|
|
|
|
2010-03-06 00:42:03 +07:00
|
|
|
/* For performance reasons, reuse mc area when possible */
|
|
|
|
if (!mc || mc_size > curr_mc_size) {
|
2010-12-26 01:57:41 +07:00
|
|
|
vfree(mc);
|
2010-03-06 00:42:03 +07:00
|
|
|
mc = vmalloc(mc_size);
|
|
|
|
if (!mc)
|
|
|
|
break;
|
|
|
|
curr_mc_size = mc_size;
|
|
|
|
}
|
2008-09-12 04:27:52 +07:00
|
|
|
|
|
|
|
if (get_ucode_data(mc, ucode_ptr, mc_size) ||
|
2012-12-21 14:44:22 +07:00
|
|
|
microcode_sanity_check(mc, 1) < 0) {
|
2008-09-12 04:27:52 +07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2012-12-21 14:44:22 +07:00
|
|
|
csig = uci->cpu_sig.sig;
|
|
|
|
cpf = uci->cpu_sig.pf;
|
2015-05-17 17:54:58 +07:00
|
|
|
if (has_newer_microcode(mc, csig, cpf, new_rev)) {
|
2010-12-26 01:57:41 +07:00
|
|
|
vfree(new_mc);
|
2008-09-12 04:27:52 +07:00
|
|
|
new_rev = mc_header.rev;
|
|
|
|
new_mc = mc;
|
2010-03-06 00:42:03 +07:00
|
|
|
mc = NULL; /* trigger new vmalloc */
|
|
|
|
}
|
2008-09-12 04:27:52 +07:00
|
|
|
|
|
|
|
ucode_ptr += mc_size;
|
|
|
|
leftover -= mc_size;
|
2006-09-27 15:50:52 +07:00
|
|
|
}
|
|
|
|
|
2010-12-26 01:57:41 +07:00
|
|
|
vfree(mc);
|
2010-03-06 00:42:03 +07:00
|
|
|
|
2009-05-12 04:48:27 +07:00
|
|
|
if (leftover) {
|
2010-12-26 01:57:41 +07:00
|
|
|
vfree(new_mc);
|
2009-05-12 04:48:27 +07:00
|
|
|
state = UCODE_ERROR;
|
2009-03-11 17:19:46 +07:00
|
|
|
goto out;
|
2009-05-12 04:48:27 +07:00
|
|
|
}
|
2009-03-11 17:19:46 +07:00
|
|
|
|
2009-05-12 04:48:27 +07:00
|
|
|
if (!new_mc) {
|
|
|
|
state = UCODE_NFOUND;
|
2009-03-11 17:19:46 +07:00
|
|
|
goto out;
|
2006-09-27 15:50:52 +07:00
|
|
|
}
|
2008-09-12 04:27:52 +07:00
|
|
|
|
2010-12-26 01:57:41 +07:00
|
|
|
vfree(uci->mc);
|
2009-03-11 17:19:46 +07:00
|
|
|
uci->mc = (struct microcode_intel *)new_mc;
|
|
|
|
|
2012-12-21 14:44:22 +07:00
|
|
|
/*
|
|
|
|
* If early loading microcode is supported, save this mc into
|
|
|
|
* permanent memory. So it will be loaded early when a CPU is hot added
|
|
|
|
* or resumes.
|
|
|
|
*/
|
|
|
|
save_mc_for_early(new_mc);
|
|
|
|
|
2009-12-09 13:30:50 +07:00
|
|
|
pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
|
|
|
|
cpu, new_rev, uci->cpu_sig.rev);
|
2009-05-12 04:48:27 +07:00
|
|
|
out:
|
|
|
|
return state;
|
2006-09-27 15:50:52 +07:00
|
|
|
}
|
|
|
|
|
2008-09-12 04:27:52 +07:00
|
|
|
static int get_ucode_fw(void *to, const void *from, size_t n)
|
|
|
|
{
|
|
|
|
memcpy(to, from, n);
|
|
|
|
return 0;
|
|
|
|
}
|
2006-09-27 15:50:52 +07:00
|
|
|
|
2012-07-26 20:51:00 +07:00
|
|
|
static enum ucode_state request_microcode_fw(int cpu, struct device *device,
|
|
|
|
bool refresh_fw)
|
2006-09-27 15:50:52 +07:00
|
|
|
{
|
|
|
|
char name[30];
|
2007-10-20 01:35:04 +07:00
|
|
|
struct cpuinfo_x86 *c = &cpu_data(cpu);
|
2006-09-27 15:50:52 +07:00
|
|
|
const struct firmware *firmware;
|
2009-05-12 04:48:27 +07:00
|
|
|
enum ucode_state ret;
|
2006-09-27 15:50:52 +07:00
|
|
|
|
2008-07-28 23:44:17 +07:00
|
|
|
sprintf(name, "intel-ucode/%02x-%02x-%02x",
|
2006-09-27 15:50:52 +07:00
|
|
|
c->x86, c->x86_model, c->x86_mask);
|
2009-05-12 04:48:27 +07:00
|
|
|
|
2013-12-02 21:38:17 +07:00
|
|
|
if (request_firmware_direct(&firmware, name, device)) {
|
2009-12-09 13:30:50 +07:00
|
|
|
pr_debug("data file %s load failed\n", name);
|
2009-05-12 04:48:27 +07:00
|
|
|
return UCODE_NFOUND;
|
2006-09-27 15:50:52 +07:00
|
|
|
}
|
2008-09-12 04:27:52 +07:00
|
|
|
|
2009-01-12 16:14:29 +07:00
|
|
|
ret = generic_load_microcode(cpu, (void *)firmware->data,
|
|
|
|
firmware->size, &get_ucode_fw);
|
2008-09-12 04:27:52 +07:00
|
|
|
|
2006-09-27 15:50:52 +07:00
|
|
|
release_firmware(firmware);
|
|
|
|
|
2008-09-12 04:27:52 +07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int get_ucode_user(void *to, const void *from, size_t n)
|
|
|
|
{
|
|
|
|
return copy_from_user(to, from, n);
|
|
|
|
}
|
|
|
|
|
2009-05-12 04:48:27 +07:00
|
|
|
static enum ucode_state
|
|
|
|
request_microcode_user(int cpu, const void __user *buf, size_t size)
|
2008-09-12 04:27:52 +07:00
|
|
|
{
|
2009-01-12 16:14:29 +07:00
|
|
|
return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
|
2006-09-27 15:50:52 +07:00
|
|
|
}
|
|
|
|
|
2008-07-28 23:44:21 +07:00
|
|
|
static void microcode_fini_cpu(int cpu)
|
2006-09-27 15:50:52 +07:00
|
|
|
{
|
|
|
|
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
|
|
|
|
|
2008-09-23 17:08:44 +07:00
|
|
|
vfree(uci->mc);
|
|
|
|
uci->mc = NULL;
|
2006-09-27 15:50:52 +07:00
|
|
|
}
|
2008-07-28 23:44:21 +07:00
|
|
|
|
2008-11-24 02:49:52 +07:00
|
|
|
static struct microcode_ops microcode_intel_ops = {
|
2008-09-12 04:27:52 +07:00
|
|
|
.request_microcode_user = request_microcode_user,
|
|
|
|
.request_microcode_fw = request_microcode_fw,
|
2008-07-28 23:44:21 +07:00
|
|
|
.collect_cpu_info = collect_cpu_info,
|
2014-07-25 01:23:21 +07:00
|
|
|
.apply_microcode = apply_microcode_intel,
|
2008-07-28 23:44:21 +07:00
|
|
|
.microcode_fini_cpu = microcode_fini_cpu,
|
|
|
|
};
|
|
|
|
|
2008-09-23 17:08:44 +07:00
|
|
|
struct microcode_ops * __init init_intel_microcode(void)
|
2008-07-28 23:44:21 +07:00
|
|
|
{
|
2015-10-20 16:54:44 +07:00
|
|
|
struct cpuinfo_x86 *c = &boot_cpu_data;
|
2012-04-16 15:42:00 +07:00
|
|
|
|
|
|
|
if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
|
|
|
|
cpu_has(c, X86_FEATURE_IA64)) {
|
|
|
|
pr_err("Intel CPU family 0x%x not supported\n", c->x86);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2008-09-23 17:08:44 +07:00
|
|
|
return µcode_intel_ops;
|
2008-07-28 23:44:21 +07:00
|
|
|
}
|
|
|
|
|