2019-05-20 14:19:02 +07:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2005-04-17 05:20:36 +07:00
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/*
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Conexant cx22700 DVB OFDM demodulator driver
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Copyright (C) 2001-2002 Convergence Integrated Media GmbH
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Holger Waechtler <holger@convergence.de>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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2017-12-29 01:03:51 +07:00
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#include <media/dvb_frontend.h>
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2005-04-17 05:20:36 +07:00
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#include "cx22700.h"
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struct cx22700_state {
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struct i2c_adapter* i2c;
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const struct cx22700_config* config;
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struct dvb_frontend frontend;
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};
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static int debug;
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#define dprintk(args...) \
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do { \
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if (debug) printk(KERN_DEBUG "cx22700: " args); \
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} while (0)
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static u8 init_tab [] = {
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0x04, 0x10,
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0x05, 0x09,
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0x06, 0x00,
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0x08, 0x04,
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0x09, 0x00,
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0x0a, 0x01,
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0x15, 0x40,
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0x16, 0x10,
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0x17, 0x87,
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0x18, 0x17,
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0x1a, 0x10,
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0x25, 0x04,
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0x2e, 0x00,
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0x39, 0x00,
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0x3a, 0x04,
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0x45, 0x08,
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0x46, 0x02,
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0x47, 0x05,
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};
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static int cx22700_writereg (struct cx22700_state* state, u8 reg, u8 data)
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{
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int ret;
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u8 buf [] = { reg, data };
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struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
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2008-04-09 09:20:00 +07:00
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dprintk ("%s\n", __func__);
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2005-04-17 05:20:36 +07:00
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ret = i2c_transfer (state->i2c, &msg, 1);
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if (ret != 1)
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printk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
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2008-04-09 09:20:00 +07:00
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__func__, reg, data, ret);
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2005-04-17 05:20:36 +07:00
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return (ret != 1) ? -1 : 0;
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}
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static int cx22700_readreg (struct cx22700_state* state, u8 reg)
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{
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int ret;
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u8 b0 [] = { reg };
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u8 b1 [] = { 0 };
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struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
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{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
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2008-04-09 09:20:00 +07:00
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dprintk ("%s\n", __func__);
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2005-04-17 05:20:36 +07:00
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ret = i2c_transfer (state->i2c, msg, 2);
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if (ret != 2) return -EIO;
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return b1[0];
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}
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static int cx22700_set_inversion (struct cx22700_state* state, int inversion)
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{
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u8 val;
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2008-04-09 09:20:00 +07:00
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dprintk ("%s\n", __func__);
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2005-04-17 05:20:36 +07:00
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switch (inversion) {
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case INVERSION_AUTO:
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return -EOPNOTSUPP;
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case INVERSION_ON:
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val = cx22700_readreg (state, 0x09);
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return cx22700_writereg (state, 0x09, val | 0x01);
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case INVERSION_OFF:
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val = cx22700_readreg (state, 0x09);
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return cx22700_writereg (state, 0x09, val & 0xfe);
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default:
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return -EINVAL;
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}
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}
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2011-12-22 20:14:08 +07:00
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static int cx22700_set_tps(struct cx22700_state *state,
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struct dtv_frontend_properties *p)
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2005-04-17 05:20:36 +07:00
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{
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static const u8 qam_tab [4] = { 0, 1, 0, 2 };
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static const u8 fec_tab [6] = { 0, 1, 2, 0, 3, 4 };
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u8 val;
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2008-04-09 09:20:00 +07:00
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dprintk ("%s\n", __func__);
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2005-04-17 05:20:36 +07:00
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if (p->code_rate_HP < FEC_1_2 || p->code_rate_HP > FEC_7_8)
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return -EINVAL;
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if (p->code_rate_LP < FEC_1_2 || p->code_rate_LP > FEC_7_8)
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2006-06-30 21:51:11 +07:00
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return -EINVAL;
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2005-04-17 05:20:36 +07:00
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if (p->code_rate_HP == FEC_4_5 || p->code_rate_LP == FEC_4_5)
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return -EINVAL;
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2012-10-28 02:14:01 +07:00
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if ((int)p->guard_interval < GUARD_INTERVAL_1_32 ||
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2005-04-17 05:20:36 +07:00
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p->guard_interval > GUARD_INTERVAL_1_4)
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return -EINVAL;
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if (p->transmission_mode != TRANSMISSION_MODE_2K &&
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p->transmission_mode != TRANSMISSION_MODE_8K)
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return -EINVAL;
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2011-12-22 20:14:08 +07:00
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if (p->modulation != QPSK &&
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p->modulation != QAM_16 &&
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p->modulation != QAM_64)
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2005-04-17 05:20:36 +07:00
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return -EINVAL;
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2012-10-28 02:14:01 +07:00
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if ((int)p->hierarchy < HIERARCHY_NONE ||
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2011-12-22 20:14:08 +07:00
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p->hierarchy > HIERARCHY_4)
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2005-04-17 05:20:36 +07:00
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return -EINVAL;
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2011-12-22 20:14:08 +07:00
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if (p->bandwidth_hz > 8000000 || p->bandwidth_hz < 6000000)
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2005-04-17 05:20:36 +07:00
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return -EINVAL;
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2011-12-22 20:14:08 +07:00
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if (p->bandwidth_hz == 7000000)
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2005-04-17 05:20:36 +07:00
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cx22700_writereg (state, 0x09, cx22700_readreg (state, 0x09 | 0x10));
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else
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cx22700_writereg (state, 0x09, cx22700_readreg (state, 0x09 & ~0x10));
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2011-12-22 20:14:08 +07:00
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val = qam_tab[p->modulation - QPSK];
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val |= p->hierarchy - HIERARCHY_NONE;
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2005-04-17 05:20:36 +07:00
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cx22700_writereg (state, 0x04, val);
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2014-11-05 18:42:22 +07:00
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if (p->code_rate_HP - FEC_1_2 >= sizeof(fec_tab) ||
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p->code_rate_LP - FEC_1_2 >= sizeof(fec_tab))
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return -EINVAL;
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2005-04-17 05:20:36 +07:00
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val = fec_tab[p->code_rate_HP - FEC_1_2] << 3;
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val |= fec_tab[p->code_rate_LP - FEC_1_2];
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cx22700_writereg (state, 0x05, val);
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val = (p->guard_interval - GUARD_INTERVAL_1_32) << 2;
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val |= p->transmission_mode - TRANSMISSION_MODE_2K;
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cx22700_writereg (state, 0x06, val);
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cx22700_writereg (state, 0x08, 0x04 | 0x02); /* use user tps parameters */
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2011-03-31 08:57:33 +07:00
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cx22700_writereg (state, 0x08, 0x04); /* restart acquisition */
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2005-04-17 05:20:36 +07:00
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return 0;
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}
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2011-12-22 20:14:08 +07:00
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static int cx22700_get_tps(struct cx22700_state *state,
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struct dtv_frontend_properties *p)
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2005-04-17 05:20:36 +07:00
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{
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2015-06-08 00:53:52 +07:00
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static const enum fe_modulation qam_tab[3] = { QPSK, QAM_16, QAM_64 };
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static const enum fe_code_rate fec_tab[5] = {
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FEC_1_2, FEC_2_3, FEC_3_4, FEC_5_6, FEC_7_8
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};
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2005-04-17 05:20:36 +07:00
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u8 val;
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2008-04-09 09:20:00 +07:00
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dprintk ("%s\n", __func__);
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2005-04-17 05:20:36 +07:00
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if (!(cx22700_readreg(state, 0x07) & 0x20)) /* tps valid? */
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return -EAGAIN;
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val = cx22700_readreg (state, 0x01);
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if ((val & 0x7) > 4)
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2011-12-22 20:14:08 +07:00
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p->hierarchy = HIERARCHY_AUTO;
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2005-04-17 05:20:36 +07:00
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else
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2011-12-22 20:14:08 +07:00
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p->hierarchy = HIERARCHY_NONE + (val & 0x7);
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2005-04-17 05:20:36 +07:00
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if (((val >> 3) & 0x3) > 2)
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2011-12-22 20:14:08 +07:00
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p->modulation = QAM_AUTO;
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2005-04-17 05:20:36 +07:00
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else
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2011-12-22 20:14:08 +07:00
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p->modulation = qam_tab[(val >> 3) & 0x3];
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2005-04-17 05:20:36 +07:00
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val = cx22700_readreg (state, 0x02);
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if (((val >> 3) & 0x07) > 4)
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p->code_rate_HP = FEC_AUTO;
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else
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p->code_rate_HP = fec_tab[(val >> 3) & 0x07];
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if ((val & 0x07) > 4)
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p->code_rate_LP = FEC_AUTO;
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else
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p->code_rate_LP = fec_tab[val & 0x07];
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val = cx22700_readreg (state, 0x03);
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p->guard_interval = GUARD_INTERVAL_1_32 + ((val >> 6) & 0x3);
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p->transmission_mode = TRANSMISSION_MODE_2K + ((val >> 5) & 0x1);
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return 0;
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}
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static int cx22700_init (struct dvb_frontend* fe)
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2005-05-17 11:54:31 +07:00
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{ struct cx22700_state* state = fe->demodulator_priv;
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2005-04-17 05:20:36 +07:00
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int i;
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dprintk("cx22700_init: init chip\n");
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cx22700_writereg (state, 0x00, 0x02); /* soft reset */
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cx22700_writereg (state, 0x00, 0x00);
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msleep(10);
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for (i=0; i<sizeof(init_tab); i+=2)
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cx22700_writereg (state, init_tab[i], init_tab[i+1]);
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cx22700_writereg (state, 0x00, 0x01);
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return 0;
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}
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2015-06-08 00:53:52 +07:00
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static int cx22700_read_status(struct dvb_frontend *fe, enum fe_status *status)
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2005-04-17 05:20:36 +07:00
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{
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2005-05-17 11:54:31 +07:00
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struct cx22700_state* state = fe->demodulator_priv;
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2005-04-17 05:20:36 +07:00
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u16 rs_ber = (cx22700_readreg (state, 0x0d) << 9)
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u8 sync = cx22700_readreg (state, 0x07);
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*status = 0;
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if (rs_ber < 0xff00)
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*status |= FE_HAS_SIGNAL;
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if (sync & 0x20)
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*status |= FE_HAS_CARRIER;
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if (sync & 0x10)
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*status |= FE_HAS_VITERBI;
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if (sync & 0x10)
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*status |= FE_HAS_SYNC;
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if (*status == 0x0f)
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*status |= FE_HAS_LOCK;
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return 0;
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}
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static int cx22700_read_ber(struct dvb_frontend* fe, u32* ber)
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{
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2005-05-17 11:54:31 +07:00
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struct cx22700_state* state = fe->demodulator_priv;
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2005-04-17 05:20:36 +07:00
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*ber = cx22700_readreg (state, 0x0c) & 0x7f;
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cx22700_writereg (state, 0x0c, 0x00);
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return 0;
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}
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static int cx22700_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
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{
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2005-05-17 11:54:31 +07:00
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struct cx22700_state* state = fe->demodulator_priv;
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2005-04-17 05:20:36 +07:00
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u16 rs_ber = (cx22700_readreg (state, 0x0d) << 9)
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| (cx22700_readreg (state, 0x0e) << 1);
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*signal_strength = ~rs_ber;
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return 0;
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}
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static int cx22700_read_snr(struct dvb_frontend* fe, u16* snr)
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{
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2005-05-17 11:54:31 +07:00
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struct cx22700_state* state = fe->demodulator_priv;
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2005-04-17 05:20:36 +07:00
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u16 rs_ber = (cx22700_readreg (state, 0x0d) << 9)
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| (cx22700_readreg (state, 0x0e) << 1);
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*snr = ~rs_ber;
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return 0;
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}
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static int cx22700_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
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{
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2005-05-17 11:54:31 +07:00
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struct cx22700_state* state = fe->demodulator_priv;
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2005-04-17 05:20:36 +07:00
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*ucblocks = cx22700_readreg (state, 0x0f);
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cx22700_writereg (state, 0x0f, 0x00);
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return 0;
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}
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2011-12-22 20:14:08 +07:00
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static int cx22700_set_frontend(struct dvb_frontend *fe)
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2005-04-17 05:20:36 +07:00
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{
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2011-12-22 20:14:08 +07:00
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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2005-05-17 11:54:31 +07:00
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struct cx22700_state* state = fe->demodulator_priv;
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2005-04-17 05:20:36 +07:00
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|
|
|
|
|
cx22700_writereg (state, 0x00, 0x02); /* XXX CHECKME: soft reset*/
|
|
|
|
cx22700_writereg (state, 0x00, 0x00);
|
|
|
|
|
2006-05-14 15:01:31 +07:00
|
|
|
if (fe->ops.tuner_ops.set_params) {
|
2011-12-24 22:24:33 +07:00
|
|
|
fe->ops.tuner_ops.set_params(fe);
|
2006-05-14 15:01:31 +07:00
|
|
|
if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
|
2006-04-19 03:47:09 +07:00
|
|
|
}
|
|
|
|
|
2011-12-22 20:14:08 +07:00
|
|
|
cx22700_set_inversion(state, c->inversion);
|
|
|
|
cx22700_set_tps(state, c);
|
2005-04-17 05:20:36 +07:00
|
|
|
cx22700_writereg (state, 0x37, 0x01); /* PAL loop filter off */
|
|
|
|
cx22700_writereg (state, 0x00, 0x01); /* restart acquire */
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-02-04 21:58:30 +07:00
|
|
|
static int cx22700_get_frontend(struct dvb_frontend *fe,
|
|
|
|
struct dtv_frontend_properties *c)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2005-05-17 11:54:31 +07:00
|
|
|
struct cx22700_state* state = fe->demodulator_priv;
|
2005-04-17 05:20:36 +07:00
|
|
|
u8 reg09 = cx22700_readreg (state, 0x09);
|
|
|
|
|
2011-12-22 20:14:08 +07:00
|
|
|
c->inversion = reg09 & 0x1 ? INVERSION_ON : INVERSION_OFF;
|
|
|
|
return cx22700_get_tps(state, c);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2006-04-19 03:47:09 +07:00
|
|
|
static int cx22700_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
|
|
|
|
{
|
|
|
|
struct cx22700_state* state = fe->demodulator_priv;
|
|
|
|
|
|
|
|
if (enable) {
|
|
|
|
return cx22700_writereg(state, 0x0a, 0x00);
|
|
|
|
} else {
|
|
|
|
return cx22700_writereg(state, 0x0a, 0x01);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
static int cx22700_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
|
|
|
|
{
|
2005-12-12 15:37:24 +07:00
|
|
|
fesettings->min_delay_ms = 150;
|
|
|
|
fesettings->step_size = 166667;
|
|
|
|
fesettings->max_drift = 166667*2;
|
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void cx22700_release(struct dvb_frontend* fe)
|
|
|
|
{
|
2005-05-17 11:54:31 +07:00
|
|
|
struct cx22700_state* state = fe->demodulator_priv;
|
2005-04-17 05:20:36 +07:00
|
|
|
kfree(state);
|
|
|
|
}
|
|
|
|
|
2016-08-10 04:32:21 +07:00
|
|
|
static const struct dvb_frontend_ops cx22700_ops;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
struct dvb_frontend* cx22700_attach(const struct cx22700_config* config,
|
|
|
|
struct i2c_adapter* i2c)
|
|
|
|
{
|
|
|
|
struct cx22700_state* state = NULL;
|
|
|
|
|
|
|
|
/* allocate memory for the internal state */
|
2009-08-11 08:51:01 +07:00
|
|
|
state = kzalloc(sizeof(struct cx22700_state), GFP_KERNEL);
|
2005-04-17 05:20:36 +07:00
|
|
|
if (state == NULL) goto error;
|
|
|
|
|
|
|
|
/* setup the state */
|
|
|
|
state->config = config;
|
|
|
|
state->i2c = i2c;
|
|
|
|
|
|
|
|
/* check if the demod is there */
|
|
|
|
if (cx22700_readreg(state, 0x07) < 0) goto error;
|
|
|
|
|
|
|
|
/* create dvb_frontend */
|
2006-05-14 15:01:31 +07:00
|
|
|
memcpy(&state->frontend.ops, &cx22700_ops, sizeof(struct dvb_frontend_ops));
|
2005-04-17 05:20:36 +07:00
|
|
|
state->frontend.demodulator_priv = state;
|
|
|
|
return &state->frontend;
|
|
|
|
|
|
|
|
error:
|
|
|
|
kfree(state);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2016-08-10 04:32:21 +07:00
|
|
|
static const struct dvb_frontend_ops cx22700_ops = {
|
2011-12-22 20:14:08 +07:00
|
|
|
.delsys = { SYS_DVBT },
|
2005-04-17 05:20:36 +07:00
|
|
|
.info = {
|
|
|
|
.name = "Conexant CX22700 DVB-T",
|
2018-07-06 05:59:36 +07:00
|
|
|
.frequency_min_hz = 470 * MHz,
|
|
|
|
.frequency_max_hz = 860 * MHz,
|
|
|
|
.frequency_stepsize_hz = 166667,
|
2005-04-17 05:20:36 +07:00
|
|
|
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
|
|
|
|
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
|
|
|
|
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
|
2005-12-12 15:37:24 +07:00
|
|
|
FE_CAN_RECOVER
|
2005-04-17 05:20:36 +07:00
|
|
|
},
|
|
|
|
|
|
|
|
.release = cx22700_release,
|
|
|
|
|
|
|
|
.init = cx22700_init,
|
2006-04-19 03:47:09 +07:00
|
|
|
.i2c_gate_ctrl = cx22700_i2c_gate_ctrl,
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2011-12-22 20:14:08 +07:00
|
|
|
.set_frontend = cx22700_set_frontend,
|
|
|
|
.get_frontend = cx22700_get_frontend,
|
2005-04-17 05:20:36 +07:00
|
|
|
.get_tune_settings = cx22700_get_tune_settings,
|
|
|
|
|
|
|
|
.read_status = cx22700_read_status,
|
|
|
|
.read_ber = cx22700_read_ber,
|
|
|
|
.read_signal_strength = cx22700_read_signal_strength,
|
|
|
|
.read_snr = cx22700_read_snr,
|
|
|
|
.read_ucblocks = cx22700_read_ucblocks,
|
|
|
|
};
|
|
|
|
|
|
|
|
module_param(debug, int, 0644);
|
|
|
|
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Conexant CX22700 DVB-T Demodulator driver");
|
|
|
|
MODULE_AUTHOR("Holger Waechtler");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(cx22700_attach);
|