2005-04-17 05:20:36 +07:00
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/*
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2007-08-01 19:09:31 +07:00
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* linux/arch/m32r/platforms/mappi/setup.c
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2005-04-17 05:20:36 +07:00
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*
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* Setup routines for Renesas MAPPI Board
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*
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2005-07-08 07:59:32 +07:00
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* Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
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* Hitoshi Yamamoto
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2005-04-17 05:20:36 +07:00
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*/
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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2005-10-30 01:07:23 +07:00
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#include <linux/platform_device.h>
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2005-04-17 05:20:36 +07:00
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#include <asm/m32r.h>
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#include <asm/io.h>
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#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
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icu_data_t icu_data[NR_IRQS];
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static void disable_mappi_irq(unsigned int irq)
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{
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unsigned long port, data;
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port = irq2port(irq);
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data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
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outl(data, port);
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}
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static void enable_mappi_irq(unsigned int irq)
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{
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unsigned long port, data;
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port = irq2port(irq);
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data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
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outl(data, port);
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}
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2011-01-20 00:27:59 +07:00
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static void mask_mappi(struct irq_data *data)
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2005-04-17 05:20:36 +07:00
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{
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2011-01-20 00:27:59 +07:00
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disable_mappi_irq(data->irq);
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2005-04-17 05:20:36 +07:00
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}
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2011-01-20 00:27:59 +07:00
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static void unmask_mappi(struct irq_data *data)
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2005-04-17 05:20:36 +07:00
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{
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2011-01-20 00:27:59 +07:00
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enable_mappi_irq(data->irq);
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2005-04-17 05:20:36 +07:00
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}
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2011-01-20 00:27:59 +07:00
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static void shutdown_mappi(struct irq_data *data)
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2005-04-17 05:20:36 +07:00
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{
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unsigned long port;
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2011-01-20 00:27:59 +07:00
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port = irq2port(data->irq);
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2005-04-17 05:20:36 +07:00
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outl(M32R_ICUCR_ILEVEL7, port);
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}
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2009-06-17 05:33:26 +07:00
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static struct irq_chip mappi_irq_type =
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2005-04-17 05:20:36 +07:00
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{
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2011-01-20 00:27:59 +07:00
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.name = "MAPPI-IRQ",
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.irq_shutdown = shutdown_mappi,
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.irq_mask = mask_mappi,
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.irq_unmask = unmask_mappi,
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2005-04-17 05:20:36 +07:00
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};
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void __init init_IRQ(void)
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{
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static int once = 0;
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if (once)
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return;
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else
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once++;
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#ifdef CONFIG_NE2000
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/* INT0 : LAN controller (RTL8019AS) */
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2011-03-24 23:32:45 +07:00
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irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
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2011-01-20 00:27:59 +07:00
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handle_level_irq);
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2007-07-27 00:41:19 +07:00
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icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
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2005-04-17 05:20:36 +07:00
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disable_mappi_irq(M32R_IRQ_INT0);
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#endif /* CONFIG_M32R_NE2000 */
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/* MFT2 : system timer */
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2011-03-24 23:32:45 +07:00
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irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
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2011-01-20 00:27:59 +07:00
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handle_level_irq);
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2005-04-17 05:20:36 +07:00
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icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
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disable_mappi_irq(M32R_IRQ_MFT2);
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#ifdef CONFIG_SERIAL_M32R_SIO
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/* SIO0_R : uart receive data */
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2011-03-24 23:32:45 +07:00
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irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
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2011-01-20 00:27:59 +07:00
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handle_level_irq);
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2005-04-17 05:20:36 +07:00
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icu_data[M32R_IRQ_SIO0_R].icucr = 0;
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disable_mappi_irq(M32R_IRQ_SIO0_R);
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/* SIO0_S : uart send data */
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2011-03-24 23:32:45 +07:00
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irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
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2011-01-20 00:27:59 +07:00
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handle_level_irq);
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2005-04-17 05:20:36 +07:00
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icu_data[M32R_IRQ_SIO0_S].icucr = 0;
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disable_mappi_irq(M32R_IRQ_SIO0_S);
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/* SIO1_R : uart receive data */
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2011-03-24 23:32:45 +07:00
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irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
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2011-01-20 00:27:59 +07:00
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handle_level_irq);
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2005-04-17 05:20:36 +07:00
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icu_data[M32R_IRQ_SIO1_R].icucr = 0;
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disable_mappi_irq(M32R_IRQ_SIO1_R);
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/* SIO1_S : uart send data */
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2011-03-24 23:32:45 +07:00
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irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
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2011-01-20 00:27:59 +07:00
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handle_level_irq);
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2005-04-17 05:20:36 +07:00
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icu_data[M32R_IRQ_SIO1_S].icucr = 0;
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disable_mappi_irq(M32R_IRQ_SIO1_S);
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#endif /* CONFIG_SERIAL_M32R_SIO */
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#if defined(CONFIG_M32R_PCC)
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/* INT1 : pccard0 interrupt */
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2011-03-24 23:32:45 +07:00
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irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
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2011-01-20 00:27:59 +07:00
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handle_level_irq);
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2005-04-17 05:20:36 +07:00
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icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
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disable_mappi_irq(M32R_IRQ_INT1);
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/* INT2 : pccard1 interrupt */
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2011-03-24 23:32:45 +07:00
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irq_set_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
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2011-01-20 00:27:59 +07:00
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handle_level_irq);
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2005-04-17 05:20:36 +07:00
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icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
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disable_mappi_irq(M32R_IRQ_INT2);
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#endif /* CONFIG_M32RPCC */
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}
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2005-07-08 07:59:32 +07:00
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#if defined(CONFIG_FB_S1D13XXX)
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#include <video/s1d13xxxfb.h>
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#include <asm/s1d13806.h>
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static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
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.initregs = s1d13xxxfb_initregs,
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.initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
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.platform_init_video = NULL,
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#ifdef CONFIG_PM
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.platform_suspend_video = NULL,
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.platform_resume_video = NULL,
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#endif
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};
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static struct resource s1d13xxxfb_resources[] = {
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[0] = {
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.start = 0x10200000UL,
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.end = 0x1033FFFFUL,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 0x10000000UL,
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.end = 0x100001FFUL,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device s1d13xxxfb_device = {
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.name = S1D_DEVICENAME,
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.id = 0,
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.dev = {
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.platform_data = &s1d13xxxfb_data,
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},
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.num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
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.resource = s1d13xxxfb_resources,
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};
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static int __init platform_init(void)
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{
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platform_device_register(&s1d13xxxfb_device);
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return 0;
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}
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arch_initcall(platform_init);
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#endif
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