2010-02-12 04:56:07 +07:00
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/*
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* linux/arch/arm/mach-vexpress/platsmp.c
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*
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* Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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2013-09-18 00:30:58 +07:00
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#include <linux/of_address.h>
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2012-10-09 18:56:36 +07:00
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#include <linux/vexpress.h>
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2012-02-24 16:18:14 +07:00
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2013-01-30 16:12:55 +07:00
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#include <asm/mcpm.h>
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2012-02-24 16:18:14 +07:00
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#include <asm/smp_scu.h>
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#include <asm/mach/map.h>
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2010-02-12 04:56:07 +07:00
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2011-09-08 19:15:22 +07:00
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#include <plat/platsmp.h>
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2010-02-12 04:56:07 +07:00
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2011-09-08 19:15:22 +07:00
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#include "core.h"
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ARM: Fix subtle race in CPU pen_release hotplug code
There is a subtle race in the CPU hotplug code, where a CPU which has
been offlined can online itself before being requested, which results
in things going astray on the next online/offline cycle.
What happens in the normal online/offline/online cycle is:
CPU0 CPU3
requests boot of CPU3
pen_release = 3
flush cache line
checks pen_release, reads 3
starts boot
pen_release = -1
... requests CPU3 offline ...
... dies ...
checks pen_release, reads -1
requests boot of CPU3
pen_release = 3
flush cache line
checks pen_release, reads 3
starts boot
pen_release = -1
However, as the write of -1 of pen_release is not fully flushed back to
memory, and the checking of pen_release is done with caches disabled,
this allows CPU3 the opportunity to read the old value of pen_release:
CPU0 CPU3
requests boot of CPU3
pen_release = 3
flush cache line
checks pen_release, reads 3
starts boot
pen_release = -1
... requests CPU3 offline ...
... dies ...
checks pen_release, reads 3
starts boot
pen_release = -1
requests boot of CPU3
pen_release = 3
flush cache line
Fix this by grouping the write of pen_release along with its cache line
flushing code to ensure that any update to pen_release is always pushed
out to physical memory.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-18 17:53:12 +07:00
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2013-01-30 16:12:55 +07:00
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bool __init vexpress_smp_init_ops(void)
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{
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#ifdef CONFIG_MCPM
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/*
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* The best way to detect a multi-cluster configuration at the moment
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* is to look for the presence of a CCI in the system.
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* Override the default vexpress_smp_ops if so.
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*/
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struct device_node *node;
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node = of_find_compatible_node(NULL, NULL, "arm,cci-400");
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if (node && of_device_is_available(node)) {
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mcpm_smp_set_ops();
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return true;
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}
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#endif
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return false;
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}
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2013-09-18 00:30:58 +07:00
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static const struct of_device_id vexpress_smp_dt_scu_match[] __initconst = {
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{ .compatible = "arm,cortex-a5-scu", },
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{ .compatible = "arm,cortex-a9-scu", },
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{}
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};
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static void __init vexpress_smp_dt_prepare_cpus(unsigned int max_cpus)
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{
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struct device_node *scu = of_find_matching_node(NULL,
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vexpress_smp_dt_scu_match);
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if (scu)
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scu_enable(of_iomap(scu, 0));
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/*
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* Write the address of secondary startup into the
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* system-wide flags register. The boot monitor waits
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* until it receives a soft interrupt, and then the
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* secondary CPU branches to this address.
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*/
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vexpress_flags_set(virt_to_phys(versatile_secondary_startup));
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}
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struct smp_operations __initdata vexpress_smp_dt_ops = {
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.smp_prepare_cpus = vexpress_smp_dt_prepare_cpus,
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.smp_secondary_init = versatile_secondary_init,
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.smp_boot_secondary = versatile_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = vexpress_cpu_die,
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#endif
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};
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