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linux_dsm_epyc7002/drivers/mailbox/Makefile

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mailbox: Introduce framework for mailbox Introduce common framework for client/protocol drivers and controller drivers of Inter-Processor-Communication (IPC). Client driver developers should have a look at include/linux/mailbox_client.h to understand the part of the API exposed to client drivers. Similarly controller driver developers should have a look at include/linux/mailbox_controller.h Reviewed-by: Mark Brown <broonie@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2014-06-13 00:01:19 +07:00
# Generic MAILBOX API
obj-$(CONFIG_MAILBOX) += mailbox.o
mailbox: Add generic mechanism for testing Mailbox Controllers This particular Client implementation uses shared memory in order to pass messages between Mailbox users; however, it can be easily hacked to support any type of Controller. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2015-10-16 14:21:30 +07:00
obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
mailbox: arm_mhu: add driver for ARM MHU controller Add driver for the ARM Primecell Message-Handling-Unit(MHU) controller. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Vincent Yang <vincent.yang@socionext.com> Signed-off-by: Tetsuya Nuriya <nuriya.tetsuya@socionext.com>
2014-06-26 20:39:42 +07:00
obj-$(CONFIG_ARM_MHU) += arm_mhu.o
mailbox: Add Platform Message-Handling-Unit variant driver Add Message-Handling-Unit driver for platform variants as mailbox controller. Actually, only the Amlogic Meson GXBB SoC MHU is supported. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-08-18 17:10:25 +07:00
obj-$(CONFIG_PLATFORM_MHU) += platform_mhu.o
ARM / highbank: add support for pl320 IPC The pl320 IPC allows for interprocessor communication between the highbank A9 and the EnergyCore Management Engine. The pl320 implements a straightforward mailbox protocol. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-28 23:13:14 +07:00
obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o
mailbox/omap: move the OMAP mailbox framework to drivers The mailbox hardware (in OMAP) uses a queued mailbox interrupt mechanism that provides a communication channel between processors through a set of registers and their associated interrupt signals by sending and receiving messages. The OMAP mailbox framework/driver code is moved to be under drivers/mailbox, in preparation for adapting to a common mailbox driver framework. This allows the build for OMAP mailbox to be enabled (it was disabled during the multi-platform support). As part of the migration from plat and mach code: - Kconfig symbols have been renamed to build OMAP1 or OMAP2+ drivers. - mailbox.h under plat-omap/plat/include has been split into a public and private header files. The public header has only the API related functions and types. - The module name mailbox.ko from plat-omap is changed to omap-mailbox.ko - The module name mailbox_mach.ko from mach-omapX is changed as mailbox_omap1.ko for OMAP1 mailbox_omap2.ko for OMAP2+ Cc: Tony Lindgren <tony@atomide.com> [gregkh@linuxfoundation.org: ack for staging part] Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Omar Ramirez Luna <omar.ramirez@copitl.com> Signed-off-by: Suman Anna <s-anna@ti.com>
2013-03-13 05:55:29 +07:00
mailbox/omap: consolidate OMAP mailbox driver There is no need for a separate common OMAP mailbox module now that the OMAP1 mailbox driver has been removed. So, consolidate the two individual OMAP mailbox modules into a single driver. This streamlines the driver for converting to mailbox framework. The following are the main changes: - collapse mailbox-omap2.c into omap-mailbox.c - remove omap_mbox_ops and replace the ops calls with the equivalent functionality. - simplify the sub-mailbox startup/shutdown functionality, the one-time operations are moved into probe, and the pm_runtime_get_sync and pm_runtime_put_sync can be invoked without using a configuration counter. - move all definitions from private omap_mbox.h into the source code, and eliminate this internal header. - rename some variables that used the omap2_mbox prefix with a generic omap_mbox prefix. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-06-25 07:43:41 +07:00
obj-$(CONFIG_OMAP2PLUS_MBOX) += omap-mailbox.o
Mailbox: Add support for Platform Communication Channel ACPI 5.0+ spec defines a generic mode of communication between the OS and a platform such as the BMC. This medium (PCC) is typically used by CPPC (ACPI CPU Performance management), RAS (ACPI reliability protocol) and MPST (ACPI Memory power states). This patch adds PCC support as a Mailbox Controller. As of ACPI v5.1 there is no provision for clients to lookup mailbox controllers in a way that Linux expects. e.g. in DT the clients can list the mailboxes they can associate with in the DT binding and then provide a unique index to lookup a channel within a mailbox. Since the ACPI spec doesn't have anything similar, we introduce a mailbox controller specific API so that when the client calls it, we know to lookup in the context of a specific controller. This also helps in keeping a consistent interface across DT and ACPI for such drivers. This patch implements basic PCC support using the ACPI v5.1 structures. IRQ mode support will be provided as follow up patches. Signed-off-by: Ashwin Chaugule <ashwin.chaugule@linaro.org> Reviewed-by: Mark Brown <broonie@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2014-11-13 07:59:38 +07:00
mailbox: rockchip: Add Rockchip mailbox driver This driver is found on RK3368 SoCs. The Mailbox module is a simple APB peripheral that allows both the Cortex-A53 MCU system to communicate by writing operation to generate interrupt. The registers are accessible by both CPU via APB interface. The Mailbox has the following main features: 1) Support dual-core system: Cortex-A53 and MCU. 2) Support APB interface. 3) Support four mailbox elements, each element includes one data word, one command word register and one flag bit that can represent one interrupt. 4) Four interrupts to Cortex-A53. 5) Four interrupts to MCU. 6) Provide 32 lock registers for software to use to indicate whether mailbox is occupied. [Jassi: Removed unused variable buf_base] Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2015-10-27 14:31:45 +07:00
obj-$(CONFIG_ROCKCHIP_MBOX) += rockchip-mailbox.o
Mailbox: Add support for Platform Communication Channel ACPI 5.0+ spec defines a generic mode of communication between the OS and a platform such as the BMC. This medium (PCC) is typically used by CPPC (ACPI CPU Performance management), RAS (ACPI reliability protocol) and MPST (ACPI Memory power states). This patch adds PCC support as a Mailbox Controller. As of ACPI v5.1 there is no provision for clients to lookup mailbox controllers in a way that Linux expects. e.g. in DT the clients can list the mailboxes they can associate with in the DT binding and then provide a unique index to lookup a channel within a mailbox. Since the ACPI spec doesn't have anything similar, we introduce a mailbox controller specific API so that when the client calls it, we know to lookup in the context of a specific controller. This also helps in keeping a consistent interface across DT and ACPI for such drivers. This patch implements basic PCC support using the ACPI v5.1 structures. IRQ mode support will be provided as follow up patches. Signed-off-by: Ashwin Chaugule <ashwin.chaugule@linaro.org> Reviewed-by: Mark Brown <broonie@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2014-11-13 07:59:38 +07:00
obj-$(CONFIG_PCC) += pcc.o
mailbox: Add Altera mailbox driver The Altera mailbox allows for interprocessor communication. It supports only one channel and work as either sender or receiver. Signed-off-by: Ley Foon Tan <lftan@altera.com>
2015-02-04 15:32:18 +07:00
obj-$(CONFIG_ALTERA_MBOX) += mailbox-altera.o
mailbox: Enable BCM2835 mailbox support This mailbox driver provides a single mailbox channel to write 32-bit values to the VPU and get a 32-bit response. The Raspberry Pi firmware uses this mailbox channel to implement firmware calls, while Roku 2 (despite being derived from the same firmware tree) doesn't. The driver was originally submitted by Lubomir, based on the out-of-tree 2708 mailbox driver. Eric Anholt fixed it up for upstreaming, with the major functional change being that it now has no notion of multiple channels (since that is a firmware-dependent concept) and instead the raspberrypi-firmware driver will do that bit-twiddling in its own messages. [Jassi: made the 'mbox_chan_ops' struct as const and removed a redundant variable] Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Craig McGeachie <slapdau@yahoo.com.au> Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2015-05-06 03:27:45 +07:00
obj-$(CONFIG_BCM2835_MBOX) += bcm2835-mailbox.o
mailbox: Add support for ST's Mailbox IP ST's platforms currently support a maximum of 5 Mailboxes, one for each of the supported co-processors situated on the platform. Each Mailbox is divided up into 4 instances which consist of 32 channels. Messages are passed between the application and co-processors using shared memory areas. It is the Client's responsibility to manage these areas. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2015-10-16 14:21:28 +07:00
obj-$(CONFIG_STI_MBOX) += mailbox-sti.o
mailbox: Add support for APM X-Gene platform mailbox driver X-Gene mailbox controller provides 8 mailbox channels, with each channel has a dedicated interrupt line. Signed-off-by: Feng Kan <fkan@apm.com> Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-02-13 10:39:26 +07:00
mailbox: Introduce TI message manager driver Support for TI Message Manager Module. This hardware block manages a bunch of hardware queues meant for communication between processor entities. Clients sitting on top of this would manage the required protocol for communicating with the counterpart entities. For more details on TI Message Manager hardware block, see documentation that will is available here: http://www.ti.com/lit/ug/spruhy8/spruhy8.pdf Chapter 8.1(Message Manager) Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-03-17 07:23:14 +07:00
obj-$(CONFIG_TI_MESSAGE_MANAGER) += ti-msgmgr.o
mailbox: Add support for APM X-Gene platform mailbox driver X-Gene mailbox controller provides 8 mailbox channels, with each channel has a dedicated interrupt line. Signed-off-by: Feng Kan <fkan@apm.com> Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-02-13 10:39:26 +07:00
obj-$(CONFIG_XGENE_SLIMPRO_MBOX) += mailbox-xgene-slimpro.o
mailbox: Hi6220: add mailbox driver Add driver for Hi6220 mailbox, the mailbox communicates with MCU; for sending data, it can support two methods for low level implementation: one is to use interrupt as acknowledge, another is automatic mode which without any acknowledge. These two methods have been supported in the driver. For receiving data, it will depend on the interrupt to notify the channel has incoming message. Now mailbox driver is used to send message to MCU to control dynamic voltage and frequency scaling for CPU, GPU and DDR. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-02-15 20:50:24 +07:00
obj-$(CONFIG_HI6220_MBOX) += hi6220-mailbox.o
mailbox: Add Broadcom PDC mailbox driver The Broadcom PDC mailbox driver is a mailbox controller that manages data transfers to and from one or more offload engines. Signed-off-by: Rob Rice <rob.rice@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-07-01 02:59:23 +07:00
obj-$(CONFIG_BCM_PDC_MBOX) += bcm-pdc-mailbox.o
mailbox: Add Tegra HSP driver This driver exposes a mailbox interface for interprocessor communication using the Hardware Synchronization Primitives (HSP) module's doorbell mechanism. There are multiple HSP instances and they provide additional features such as shared mailboxes, shared and arbitrated semaphores. A driver for a remote processor can use the mailbox client provided by the HSP driver and build an IPC protocol on top of this synchronization mechanism. Based on work by Joseph Lo <josephl@nvidia.com>. Acked-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-20 00:19:39 +07:00
mailbox: Add driver for Broadcom FlexRM ring manager Some of the Broadcom iProc SoCs have FlexRM ring manager which provides a ring-based programming interface to various offload engines (e.g. RAID, Crypto, etc). This patch adds a common mailbox driver for Broadcom FlexRM ring manager which can be shared by various offload engine drivers (implemented as mailbox clients). Reviewed-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Pramod KUMAR <pramod.kumar@broadcom.com> Signed-off-by: Anup Patel <anup.patel@broadcom.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-03-15 13:40:00 +07:00
obj-$(CONFIG_BCM_FLEXRM_MBOX) += bcm-flexrm-mailbox.o
mailbox: Add Tegra HSP driver This driver exposes a mailbox interface for interprocessor communication using the Hardware Synchronization Primitives (HSP) module's doorbell mechanism. There are multiple HSP instances and they provide additional features such as shared mailboxes, shared and arbitrated semaphores. A driver for a remote processor can use the mailbox client provided by the HSP driver and build an IPC protocol on top of this synchronization mechanism. Based on work by Joseph Lo <josephl@nvidia.com>. Acked-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-20 00:19:39 +07:00
obj-$(CONFIG_TEGRA_HSP_MBOX) += tegra-hsp.o
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