2005-04-26 03:09:41 +07:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2005 Silicon Graphics, Inc. All rights reserved.
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*/
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/*
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* MOATB Core Services driver.
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*/
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/ioport.h>
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2009-09-05 06:58:05 +07:00
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#include <linux/kernel.h>
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2005-04-26 03:09:41 +07:00
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#include <linux/notifier.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/fs.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/mm.h>
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#include <linux/uio.h>
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2008-02-07 15:15:24 +07:00
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#include <linux/mutex.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 15:04:11 +07:00
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#include <linux/slab.h>
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2005-04-26 03:09:41 +07:00
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#include <asm/io.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/sn/addrs.h>
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#include <asm/sn/intr.h>
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#include <asm/sn/tiocx.h>
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#include "mbcs.h"
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#define MBCS_DEBUG 0
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#if MBCS_DEBUG
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#define DBG(fmt...) printk(KERN_ALERT fmt)
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#else
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#define DBG(fmt...)
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#endif
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2010-06-02 19:28:52 +07:00
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static DEFINE_MUTEX(mbcs_mutex);
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2007-07-19 15:47:53 +07:00
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static int mbcs_major;
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2005-04-26 03:09:41 +07:00
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2007-07-19 15:47:53 +07:00
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static LIST_HEAD(soft_list);
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2005-04-26 03:09:41 +07:00
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/*
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* file operations
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*/
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2007-07-19 15:47:53 +07:00
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static const struct file_operations mbcs_ops = {
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2005-04-26 03:09:41 +07:00
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.open = mbcs_open,
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.llseek = mbcs_sram_llseek,
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.read = mbcs_sram_read,
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.write = mbcs_sram_write,
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.mmap = mbcs_gscr_mmap,
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};
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struct mbcs_callback_arg {
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int minor;
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struct cx_dev *cx_dev;
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};
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static inline void mbcs_getdma_init(struct getdma *gdma)
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{
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memset(gdma, 0, sizeof(struct getdma));
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gdma->DoneIntEnable = 1;
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}
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static inline void mbcs_putdma_init(struct putdma *pdma)
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{
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memset(pdma, 0, sizeof(struct putdma));
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pdma->DoneIntEnable = 1;
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}
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static inline void mbcs_algo_init(struct algoblock *algo_soft)
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{
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memset(algo_soft, 0, sizeof(struct algoblock));
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}
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static inline void mbcs_getdma_set(void *mmr,
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uint64_t hostAddr,
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uint64_t localAddr,
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uint64_t localRamSel,
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uint64_t numPkts,
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uint64_t amoEnable,
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uint64_t intrEnable,
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uint64_t peerIO,
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uint64_t amoHostDest,
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uint64_t amoModType, uint64_t intrHostDest,
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uint64_t intrVector)
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{
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union dma_control rdma_control;
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union dma_amo_dest amo_dest;
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union intr_dest intr_dest;
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union dma_localaddr local_addr;
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union dma_hostaddr host_addr;
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rdma_control.dma_control_reg = 0;
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amo_dest.dma_amo_dest_reg = 0;
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intr_dest.intr_dest_reg = 0;
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local_addr.dma_localaddr_reg = 0;
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host_addr.dma_hostaddr_reg = 0;
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host_addr.dma_sys_addr = hostAddr;
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MBCS_MMR_SET(mmr, MBCS_RD_DMA_SYS_ADDR, host_addr.dma_hostaddr_reg);
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local_addr.dma_ram_addr = localAddr;
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local_addr.dma_ram_sel = localRamSel;
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MBCS_MMR_SET(mmr, MBCS_RD_DMA_LOC_ADDR, local_addr.dma_localaddr_reg);
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rdma_control.dma_op_length = numPkts;
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rdma_control.done_amo_en = amoEnable;
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rdma_control.done_int_en = intrEnable;
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rdma_control.pio_mem_n = peerIO;
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MBCS_MMR_SET(mmr, MBCS_RD_DMA_CTRL, rdma_control.dma_control_reg);
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amo_dest.dma_amo_sys_addr = amoHostDest;
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amo_dest.dma_amo_mod_type = amoModType;
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MBCS_MMR_SET(mmr, MBCS_RD_DMA_AMO_DEST, amo_dest.dma_amo_dest_reg);
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intr_dest.address = intrHostDest;
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intr_dest.int_vector = intrVector;
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MBCS_MMR_SET(mmr, MBCS_RD_DMA_INT_DEST, intr_dest.intr_dest_reg);
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}
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static inline void mbcs_putdma_set(void *mmr,
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uint64_t hostAddr,
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uint64_t localAddr,
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uint64_t localRamSel,
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uint64_t numPkts,
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uint64_t amoEnable,
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uint64_t intrEnable,
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uint64_t peerIO,
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uint64_t amoHostDest,
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uint64_t amoModType,
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uint64_t intrHostDest, uint64_t intrVector)
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{
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union dma_control wdma_control;
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union dma_amo_dest amo_dest;
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union intr_dest intr_dest;
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union dma_localaddr local_addr;
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union dma_hostaddr host_addr;
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wdma_control.dma_control_reg = 0;
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amo_dest.dma_amo_dest_reg = 0;
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intr_dest.intr_dest_reg = 0;
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local_addr.dma_localaddr_reg = 0;
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host_addr.dma_hostaddr_reg = 0;
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host_addr.dma_sys_addr = hostAddr;
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MBCS_MMR_SET(mmr, MBCS_WR_DMA_SYS_ADDR, host_addr.dma_hostaddr_reg);
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local_addr.dma_ram_addr = localAddr;
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local_addr.dma_ram_sel = localRamSel;
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MBCS_MMR_SET(mmr, MBCS_WR_DMA_LOC_ADDR, local_addr.dma_localaddr_reg);
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wdma_control.dma_op_length = numPkts;
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wdma_control.done_amo_en = amoEnable;
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wdma_control.done_int_en = intrEnable;
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wdma_control.pio_mem_n = peerIO;
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MBCS_MMR_SET(mmr, MBCS_WR_DMA_CTRL, wdma_control.dma_control_reg);
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amo_dest.dma_amo_sys_addr = amoHostDest;
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amo_dest.dma_amo_mod_type = amoModType;
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MBCS_MMR_SET(mmr, MBCS_WR_DMA_AMO_DEST, amo_dest.dma_amo_dest_reg);
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intr_dest.address = intrHostDest;
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intr_dest.int_vector = intrVector;
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MBCS_MMR_SET(mmr, MBCS_WR_DMA_INT_DEST, intr_dest.intr_dest_reg);
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}
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static inline void mbcs_algo_set(void *mmr,
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uint64_t amoHostDest,
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uint64_t amoModType,
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uint64_t intrHostDest,
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uint64_t intrVector, uint64_t algoStepCount)
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{
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union dma_amo_dest amo_dest;
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union intr_dest intr_dest;
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union algo_step step;
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step.algo_step_reg = 0;
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intr_dest.intr_dest_reg = 0;
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amo_dest.dma_amo_dest_reg = 0;
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amo_dest.dma_amo_sys_addr = amoHostDest;
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amo_dest.dma_amo_mod_type = amoModType;
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MBCS_MMR_SET(mmr, MBCS_ALG_AMO_DEST, amo_dest.dma_amo_dest_reg);
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intr_dest.address = intrHostDest;
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intr_dest.int_vector = intrVector;
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MBCS_MMR_SET(mmr, MBCS_ALG_INT_DEST, intr_dest.intr_dest_reg);
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step.alg_step_cnt = algoStepCount;
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MBCS_MMR_SET(mmr, MBCS_ALG_STEP, step.algo_step_reg);
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}
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static inline int mbcs_getdma_start(struct mbcs_soft *soft)
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{
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void *mmr_base;
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struct getdma *gdma;
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uint64_t numPkts;
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union cm_control cm_control;
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mmr_base = soft->mmr_base;
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gdma = &soft->getdma;
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/* check that host address got setup */
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if (!gdma->hostAddr)
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return -1;
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numPkts =
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(gdma->bytes + (MBCS_CACHELINE_SIZE - 1)) / MBCS_CACHELINE_SIZE;
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/* program engine */
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mbcs_getdma_set(mmr_base, tiocx_dma_addr(gdma->hostAddr),
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gdma->localAddr,
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(gdma->localAddr < MB2) ? 0 :
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(gdma->localAddr < MB4) ? 1 :
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(gdma->localAddr < MB6) ? 2 : 3,
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numPkts,
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gdma->DoneAmoEnable,
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gdma->DoneIntEnable,
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gdma->peerIO,
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gdma->amoHostDest,
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gdma->amoModType,
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gdma->intrHostDest, gdma->intrVector);
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/* start engine */
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cm_control.cm_control_reg = MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
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cm_control.rd_dma_go = 1;
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MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL, cm_control.cm_control_reg);
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return 0;
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}
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static inline int mbcs_putdma_start(struct mbcs_soft *soft)
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{
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void *mmr_base;
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struct putdma *pdma;
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uint64_t numPkts;
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union cm_control cm_control;
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mmr_base = soft->mmr_base;
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pdma = &soft->putdma;
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/* check that host address got setup */
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if (!pdma->hostAddr)
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return -1;
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numPkts =
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(pdma->bytes + (MBCS_CACHELINE_SIZE - 1)) / MBCS_CACHELINE_SIZE;
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/* program engine */
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mbcs_putdma_set(mmr_base, tiocx_dma_addr(pdma->hostAddr),
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pdma->localAddr,
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(pdma->localAddr < MB2) ? 0 :
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(pdma->localAddr < MB4) ? 1 :
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(pdma->localAddr < MB6) ? 2 : 3,
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numPkts,
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pdma->DoneAmoEnable,
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pdma->DoneIntEnable,
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pdma->peerIO,
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pdma->amoHostDest,
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pdma->amoModType,
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pdma->intrHostDest, pdma->intrVector);
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/* start engine */
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cm_control.cm_control_reg = MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
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cm_control.wr_dma_go = 1;
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MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL, cm_control.cm_control_reg);
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return 0;
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}
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static inline int mbcs_algo_start(struct mbcs_soft *soft)
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{
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struct algoblock *algo_soft = &soft->algo;
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void *mmr_base = soft->mmr_base;
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union cm_control cm_control;
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|
2008-02-07 15:15:24 +07:00
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if (mutex_lock_interruptible(&soft->algolock))
|
2005-04-26 03:09:41 +07:00
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return -ERESTARTSYS;
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atomic_set(&soft->algo_done, 0);
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mbcs_algo_set(mmr_base,
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algo_soft->amoHostDest,
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algo_soft->amoModType,
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algo_soft->intrHostDest,
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algo_soft->intrVector, algo_soft->algoStepCount);
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|
|
|
|
|
/* start algorithm */
|
|
|
|
cm_control.cm_control_reg = MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
|
|
|
|
cm_control.alg_done_int_en = 1;
|
|
|
|
cm_control.alg_go = 1;
|
|
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL, cm_control.cm_control_reg);
|
|
|
|
|
2008-02-07 15:15:24 +07:00
|
|
|
mutex_unlock(&soft->algolock);
|
2005-04-26 03:09:41 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline ssize_t
|
|
|
|
do_mbcs_sram_dmawrite(struct mbcs_soft *soft, uint64_t hostAddr,
|
|
|
|
size_t len, loff_t * off)
|
|
|
|
{
|
|
|
|
int rv = 0;
|
|
|
|
|
2008-02-07 15:15:24 +07:00
|
|
|
if (mutex_lock_interruptible(&soft->dmawritelock))
|
2005-04-26 03:09:41 +07:00
|
|
|
return -ERESTARTSYS;
|
|
|
|
|
|
|
|
atomic_set(&soft->dmawrite_done, 0);
|
|
|
|
|
|
|
|
soft->putdma.hostAddr = hostAddr;
|
|
|
|
soft->putdma.localAddr = *off;
|
|
|
|
soft->putdma.bytes = len;
|
|
|
|
|
|
|
|
if (mbcs_putdma_start(soft) < 0) {
|
|
|
|
DBG(KERN_ALERT "do_mbcs_sram_dmawrite: "
|
|
|
|
"mbcs_putdma_start failed\n");
|
|
|
|
rv = -EAGAIN;
|
|
|
|
goto dmawrite_exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (wait_event_interruptible(soft->dmawrite_queue,
|
|
|
|
atomic_read(&soft->dmawrite_done))) {
|
|
|
|
rv = -ERESTARTSYS;
|
|
|
|
goto dmawrite_exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
rv = len;
|
|
|
|
*off += len;
|
|
|
|
|
|
|
|
dmawrite_exit:
|
2008-02-07 15:15:24 +07:00
|
|
|
mutex_unlock(&soft->dmawritelock);
|
2005-04-26 03:09:41 +07:00
|
|
|
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline ssize_t
|
|
|
|
do_mbcs_sram_dmaread(struct mbcs_soft *soft, uint64_t hostAddr,
|
|
|
|
size_t len, loff_t * off)
|
|
|
|
{
|
|
|
|
int rv = 0;
|
|
|
|
|
2008-02-07 15:15:25 +07:00
|
|
|
if (mutex_lock_interruptible(&soft->dmareadlock))
|
2005-04-26 03:09:41 +07:00
|
|
|
return -ERESTARTSYS;
|
|
|
|
|
|
|
|
atomic_set(&soft->dmawrite_done, 0);
|
|
|
|
|
|
|
|
soft->getdma.hostAddr = hostAddr;
|
|
|
|
soft->getdma.localAddr = *off;
|
|
|
|
soft->getdma.bytes = len;
|
|
|
|
|
|
|
|
if (mbcs_getdma_start(soft) < 0) {
|
|
|
|
DBG(KERN_ALERT "mbcs_strategy: mbcs_getdma_start failed\n");
|
|
|
|
rv = -EAGAIN;
|
|
|
|
goto dmaread_exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (wait_event_interruptible(soft->dmaread_queue,
|
|
|
|
atomic_read(&soft->dmaread_done))) {
|
|
|
|
rv = -ERESTARTSYS;
|
|
|
|
goto dmaread_exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
rv = len;
|
|
|
|
*off += len;
|
|
|
|
|
|
|
|
dmaread_exit:
|
2008-02-07 15:15:25 +07:00
|
|
|
mutex_unlock(&soft->dmareadlock);
|
2005-04-26 03:09:41 +07:00
|
|
|
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
2007-07-19 15:47:53 +07:00
|
|
|
static int mbcs_open(struct inode *ip, struct file *fp)
|
2005-04-26 03:09:41 +07:00
|
|
|
{
|
|
|
|
struct mbcs_soft *soft;
|
|
|
|
int minor;
|
|
|
|
|
2010-06-02 19:28:52 +07:00
|
|
|
mutex_lock(&mbcs_mutex);
|
2005-04-26 03:09:41 +07:00
|
|
|
minor = iminor(ip);
|
|
|
|
|
2008-05-16 00:24:23 +07:00
|
|
|
/* Nothing protects access to this list... */
|
2005-04-26 03:09:41 +07:00
|
|
|
list_for_each_entry(soft, &soft_list, list) {
|
|
|
|
if (soft->nasid == minor) {
|
|
|
|
fp->private_data = soft->cxdev;
|
2010-06-02 19:28:52 +07:00
|
|
|
mutex_unlock(&mbcs_mutex);
|
2005-04-26 03:09:41 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-06-02 19:28:52 +07:00
|
|
|
mutex_unlock(&mbcs_mutex);
|
2005-04-26 03:09:41 +07:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2007-07-19 15:47:53 +07:00
|
|
|
static ssize_t mbcs_sram_read(struct file * fp, char __user *buf, size_t len, loff_t * off)
|
2005-04-26 03:09:41 +07:00
|
|
|
{
|
|
|
|
struct cx_dev *cx_dev = fp->private_data;
|
|
|
|
struct mbcs_soft *soft = cx_dev->soft;
|
|
|
|
uint64_t hostAddr;
|
|
|
|
int rv = 0;
|
|
|
|
|
|
|
|
hostAddr = __get_dma_pages(GFP_KERNEL, get_order(len));
|
|
|
|
if (hostAddr == 0)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
rv = do_mbcs_sram_dmawrite(soft, hostAddr, len, off);
|
|
|
|
if (rv < 0)
|
|
|
|
goto exit;
|
|
|
|
|
|
|
|
if (copy_to_user(buf, (void *)hostAddr, len))
|
|
|
|
rv = -EFAULT;
|
|
|
|
|
|
|
|
exit:
|
|
|
|
free_pages(hostAddr, get_order(len));
|
|
|
|
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
2007-07-19 15:47:53 +07:00
|
|
|
static ssize_t
|
2005-05-04 11:39:01 +07:00
|
|
|
mbcs_sram_write(struct file * fp, const char __user *buf, size_t len, loff_t * off)
|
2005-04-26 03:09:41 +07:00
|
|
|
{
|
|
|
|
struct cx_dev *cx_dev = fp->private_data;
|
|
|
|
struct mbcs_soft *soft = cx_dev->soft;
|
|
|
|
uint64_t hostAddr;
|
|
|
|
int rv = 0;
|
|
|
|
|
|
|
|
hostAddr = __get_dma_pages(GFP_KERNEL, get_order(len));
|
|
|
|
if (hostAddr == 0)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
if (copy_from_user((void *)hostAddr, buf, len)) {
|
|
|
|
rv = -EFAULT;
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
rv = do_mbcs_sram_dmaread(soft, hostAddr, len, off);
|
|
|
|
|
|
|
|
exit:
|
|
|
|
free_pages(hostAddr, get_order(len));
|
|
|
|
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
2007-07-19 15:47:53 +07:00
|
|
|
static loff_t mbcs_sram_llseek(struct file * filp, loff_t off, int whence)
|
2005-04-26 03:09:41 +07:00
|
|
|
{
|
|
|
|
loff_t newpos;
|
|
|
|
|
|
|
|
switch (whence) {
|
2006-10-01 13:27:33 +07:00
|
|
|
case SEEK_SET:
|
2005-04-26 03:09:41 +07:00
|
|
|
newpos = off;
|
|
|
|
break;
|
|
|
|
|
2006-10-01 13:27:33 +07:00
|
|
|
case SEEK_CUR:
|
2005-04-26 03:09:41 +07:00
|
|
|
newpos = filp->f_pos + off;
|
|
|
|
break;
|
|
|
|
|
2006-10-01 13:27:33 +07:00
|
|
|
case SEEK_END:
|
2005-04-26 03:09:41 +07:00
|
|
|
newpos = MBCS_SRAM_SIZE + off;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default: /* can't happen */
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (newpos < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
filp->f_pos = newpos;
|
|
|
|
|
|
|
|
return newpos;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint64_t mbcs_pioaddr(struct mbcs_soft *soft, uint64_t offset)
|
|
|
|
{
|
|
|
|
uint64_t mmr_base;
|
|
|
|
|
|
|
|
mmr_base = (uint64_t) (soft->mmr_base + offset);
|
|
|
|
|
|
|
|
return mmr_base;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mbcs_debug_pioaddr_set(struct mbcs_soft *soft)
|
|
|
|
{
|
|
|
|
soft->debug_addr = mbcs_pioaddr(soft, MBCS_DEBUG_START);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mbcs_gscr_pioaddr_set(struct mbcs_soft *soft)
|
|
|
|
{
|
|
|
|
soft->gscr_addr = mbcs_pioaddr(soft, MBCS_GSCR_START);
|
|
|
|
}
|
|
|
|
|
2007-07-19 15:47:53 +07:00
|
|
|
static int mbcs_gscr_mmap(struct file *fp, struct vm_area_struct *vma)
|
2005-04-26 03:09:41 +07:00
|
|
|
{
|
|
|
|
struct cx_dev *cx_dev = fp->private_data;
|
|
|
|
struct mbcs_soft *soft = cx_dev->soft;
|
|
|
|
|
|
|
|
if (vma->vm_pgoff != 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
|
|
|
|
|
|
|
|
/* Remap-pfn-range will mark the range VM_IO and VM_RESERVED */
|
|
|
|
if (remap_pfn_range(vma,
|
|
|
|
vma->vm_start,
|
|
|
|
__pa(soft->gscr_addr) >> PAGE_SHIFT,
|
|
|
|
PAGE_SIZE,
|
|
|
|
vma->vm_page_prot))
|
|
|
|
return -EAGAIN;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* mbcs_completion_intr_handler - Primary completion handler.
|
|
|
|
* @irq: irq
|
|
|
|
* @arg: soft struct for device
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
static irqreturn_t
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 20:55:46 +07:00
|
|
|
mbcs_completion_intr_handler(int irq, void *arg)
|
2005-04-26 03:09:41 +07:00
|
|
|
{
|
|
|
|
struct mbcs_soft *soft = (struct mbcs_soft *)arg;
|
|
|
|
void *mmr_base;
|
|
|
|
union cm_status cm_status;
|
|
|
|
union cm_control cm_control;
|
|
|
|
|
|
|
|
mmr_base = soft->mmr_base;
|
|
|
|
cm_status.cm_status_reg = MBCS_MMR_GET(mmr_base, MBCS_CM_STATUS);
|
|
|
|
|
|
|
|
if (cm_status.rd_dma_done) {
|
|
|
|
/* stop dma-read engine, clear status */
|
|
|
|
cm_control.cm_control_reg =
|
|
|
|
MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
|
|
|
|
cm_control.rd_dma_clr = 1;
|
|
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL,
|
|
|
|
cm_control.cm_control_reg);
|
|
|
|
atomic_set(&soft->dmaread_done, 1);
|
|
|
|
wake_up(&soft->dmaread_queue);
|
|
|
|
}
|
|
|
|
if (cm_status.wr_dma_done) {
|
|
|
|
/* stop dma-write engine, clear status */
|
|
|
|
cm_control.cm_control_reg =
|
|
|
|
MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
|
|
|
|
cm_control.wr_dma_clr = 1;
|
|
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL,
|
|
|
|
cm_control.cm_control_reg);
|
|
|
|
atomic_set(&soft->dmawrite_done, 1);
|
|
|
|
wake_up(&soft->dmawrite_queue);
|
|
|
|
}
|
|
|
|
if (cm_status.alg_done) {
|
|
|
|
/* clear status */
|
|
|
|
cm_control.cm_control_reg =
|
|
|
|
MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
|
|
|
|
cm_control.alg_done_clr = 1;
|
|
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL,
|
|
|
|
cm_control.cm_control_reg);
|
|
|
|
atomic_set(&soft->algo_done, 1);
|
|
|
|
wake_up(&soft->algo_queue);
|
|
|
|
}
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* mbcs_intr_alloc - Allocate interrupts.
|
|
|
|
* @dev: device pointer
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
static int mbcs_intr_alloc(struct cx_dev *dev)
|
|
|
|
{
|
|
|
|
struct sn_irq_info *sn_irq;
|
|
|
|
struct mbcs_soft *soft;
|
|
|
|
struct getdma *getdma;
|
|
|
|
struct putdma *putdma;
|
|
|
|
struct algoblock *algo;
|
|
|
|
|
|
|
|
soft = dev->soft;
|
|
|
|
getdma = &soft->getdma;
|
|
|
|
putdma = &soft->putdma;
|
|
|
|
algo = &soft->algo;
|
|
|
|
|
|
|
|
soft->get_sn_irq = NULL;
|
|
|
|
soft->put_sn_irq = NULL;
|
|
|
|
soft->algo_sn_irq = NULL;
|
|
|
|
|
|
|
|
sn_irq = tiocx_irq_alloc(dev->cx_id.nasid, TIOCX_CORELET, -1, -1, -1);
|
|
|
|
if (sn_irq == NULL)
|
|
|
|
return -EAGAIN;
|
|
|
|
soft->get_sn_irq = sn_irq;
|
|
|
|
getdma->intrHostDest = sn_irq->irq_xtalkaddr;
|
|
|
|
getdma->intrVector = sn_irq->irq_irq;
|
|
|
|
if (request_irq(sn_irq->irq_irq,
|
2006-07-02 09:29:33 +07:00
|
|
|
(void *)mbcs_completion_intr_handler, IRQF_SHARED,
|
2005-04-26 03:09:41 +07:00
|
|
|
"MBCS get intr", (void *)soft)) {
|
|
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
|
|
return -EAGAIN;
|
|
|
|
}
|
|
|
|
|
|
|
|
sn_irq = tiocx_irq_alloc(dev->cx_id.nasid, TIOCX_CORELET, -1, -1, -1);
|
|
|
|
if (sn_irq == NULL) {
|
|
|
|
free_irq(soft->get_sn_irq->irq_irq, soft);
|
|
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
|
|
return -EAGAIN;
|
|
|
|
}
|
|
|
|
soft->put_sn_irq = sn_irq;
|
|
|
|
putdma->intrHostDest = sn_irq->irq_xtalkaddr;
|
|
|
|
putdma->intrVector = sn_irq->irq_irq;
|
|
|
|
if (request_irq(sn_irq->irq_irq,
|
2006-07-02 09:29:33 +07:00
|
|
|
(void *)mbcs_completion_intr_handler, IRQF_SHARED,
|
2005-04-26 03:09:41 +07:00
|
|
|
"MBCS put intr", (void *)soft)) {
|
|
|
|
tiocx_irq_free(soft->put_sn_irq);
|
|
|
|
free_irq(soft->get_sn_irq->irq_irq, soft);
|
|
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
|
|
return -EAGAIN;
|
|
|
|
}
|
|
|
|
|
|
|
|
sn_irq = tiocx_irq_alloc(dev->cx_id.nasid, TIOCX_CORELET, -1, -1, -1);
|
|
|
|
if (sn_irq == NULL) {
|
|
|
|
free_irq(soft->put_sn_irq->irq_irq, soft);
|
|
|
|
tiocx_irq_free(soft->put_sn_irq);
|
|
|
|
free_irq(soft->get_sn_irq->irq_irq, soft);
|
|
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
|
|
return -EAGAIN;
|
|
|
|
}
|
|
|
|
soft->algo_sn_irq = sn_irq;
|
|
|
|
algo->intrHostDest = sn_irq->irq_xtalkaddr;
|
|
|
|
algo->intrVector = sn_irq->irq_irq;
|
|
|
|
if (request_irq(sn_irq->irq_irq,
|
2006-07-02 09:29:33 +07:00
|
|
|
(void *)mbcs_completion_intr_handler, IRQF_SHARED,
|
2005-04-26 03:09:41 +07:00
|
|
|
"MBCS algo intr", (void *)soft)) {
|
|
|
|
tiocx_irq_free(soft->algo_sn_irq);
|
|
|
|
free_irq(soft->put_sn_irq->irq_irq, soft);
|
|
|
|
tiocx_irq_free(soft->put_sn_irq);
|
|
|
|
free_irq(soft->get_sn_irq->irq_irq, soft);
|
|
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
|
|
return -EAGAIN;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* mbcs_intr_dealloc - Remove interrupts.
|
|
|
|
* @dev: device pointer
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
static void mbcs_intr_dealloc(struct cx_dev *dev)
|
|
|
|
{
|
|
|
|
struct mbcs_soft *soft;
|
|
|
|
|
|
|
|
soft = dev->soft;
|
|
|
|
|
|
|
|
free_irq(soft->get_sn_irq->irq_irq, soft);
|
|
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
|
|
free_irq(soft->put_sn_irq->irq_irq, soft);
|
|
|
|
tiocx_irq_free(soft->put_sn_irq);
|
|
|
|
free_irq(soft->algo_sn_irq->irq_irq, soft);
|
|
|
|
tiocx_irq_free(soft->algo_sn_irq);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int mbcs_hw_init(struct mbcs_soft *soft)
|
|
|
|
{
|
|
|
|
void *mmr_base = soft->mmr_base;
|
|
|
|
union cm_control cm_control;
|
|
|
|
union cm_req_timeout cm_req_timeout;
|
|
|
|
uint64_t err_stat;
|
|
|
|
|
|
|
|
cm_req_timeout.cm_req_timeout_reg =
|
|
|
|
MBCS_MMR_GET(mmr_base, MBCS_CM_REQ_TOUT);
|
|
|
|
|
|
|
|
cm_req_timeout.time_out = MBCS_CM_CONTROL_REQ_TOUT_MASK;
|
|
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_REQ_TOUT,
|
|
|
|
cm_req_timeout.cm_req_timeout_reg);
|
|
|
|
|
|
|
|
mbcs_gscr_pioaddr_set(soft);
|
|
|
|
mbcs_debug_pioaddr_set(soft);
|
|
|
|
|
|
|
|
/* clear errors */
|
|
|
|
err_stat = MBCS_MMR_GET(mmr_base, MBCS_CM_ERR_STAT);
|
|
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_CLR_ERR_STAT, err_stat);
|
|
|
|
MBCS_MMR_ZERO(mmr_base, MBCS_CM_ERROR_DETAIL1);
|
|
|
|
|
|
|
|
/* enable interrupts */
|
|
|
|
/* turn off 2^23 (INT_EN_PIO_REQ_ADDR_INV) */
|
|
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_ERR_INT_EN, 0x3ffffff7e00ffUL);
|
|
|
|
|
|
|
|
/* arm status regs and clear engines */
|
|
|
|
cm_control.cm_control_reg = MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
|
|
|
|
cm_control.rearm_stat_regs = 1;
|
|
|
|
cm_control.alg_clr = 1;
|
|
|
|
cm_control.wr_dma_clr = 1;
|
|
|
|
cm_control.rd_dma_clr = 1;
|
|
|
|
|
|
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL, cm_control.cm_control_reg);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-05-17 17:41:12 +07:00
|
|
|
static ssize_t show_algo(struct device *dev, struct device_attribute *attr, char *buf)
|
2005-04-26 03:09:41 +07:00
|
|
|
{
|
|
|
|
struct cx_dev *cx_dev = to_cx_dev(dev);
|
|
|
|
struct mbcs_soft *soft = cx_dev->soft;
|
|
|
|
uint64_t debug0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* By convention, the first debug register contains the
|
|
|
|
* algorithm number and revision.
|
|
|
|
*/
|
|
|
|
debug0 = *(uint64_t *) soft->debug_addr;
|
|
|
|
|
2009-09-05 06:58:05 +07:00
|
|
|
return sprintf(buf, "0x%x 0x%x\n",
|
|
|
|
upper_32_bits(debug0), lower_32_bits(debug0));
|
2005-04-26 03:09:41 +07:00
|
|
|
}
|
|
|
|
|
2005-05-17 17:41:12 +07:00
|
|
|
static ssize_t store_algo(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
|
2005-04-26 03:09:41 +07:00
|
|
|
{
|
|
|
|
int n;
|
|
|
|
struct cx_dev *cx_dev = to_cx_dev(dev);
|
|
|
|
struct mbcs_soft *soft = cx_dev->soft;
|
|
|
|
|
|
|
|
if (count <= 0)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
n = simple_strtoul(buf, NULL, 0);
|
|
|
|
|
|
|
|
if (n == 1) {
|
|
|
|
mbcs_algo_start(soft);
|
|
|
|
if (wait_event_interruptible(soft->algo_queue,
|
|
|
|
atomic_read(&soft->algo_done)))
|
|
|
|
return -ERESTARTSYS;
|
|
|
|
}
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
DEVICE_ATTR(algo, 0644, show_algo, store_algo);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* mbcs_probe - Initialize for device
|
|
|
|
* @dev: device pointer
|
|
|
|
* @device_id: id table pointer
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
static int mbcs_probe(struct cx_dev *dev, const struct cx_device_id *id)
|
|
|
|
{
|
|
|
|
struct mbcs_soft *soft;
|
|
|
|
|
|
|
|
dev->soft = NULL;
|
|
|
|
|
2005-09-07 05:18:35 +07:00
|
|
|
soft = kzalloc(sizeof(struct mbcs_soft), GFP_KERNEL);
|
2005-04-26 03:09:41 +07:00
|
|
|
if (soft == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
soft->nasid = dev->cx_id.nasid;
|
|
|
|
list_add(&soft->list, &soft_list);
|
|
|
|
soft->mmr_base = (void *)tiocx_swin_base(dev->cx_id.nasid);
|
|
|
|
dev->soft = soft;
|
|
|
|
soft->cxdev = dev;
|
|
|
|
|
|
|
|
init_waitqueue_head(&soft->dmawrite_queue);
|
|
|
|
init_waitqueue_head(&soft->dmaread_queue);
|
|
|
|
init_waitqueue_head(&soft->algo_queue);
|
|
|
|
|
2008-02-07 15:15:24 +07:00
|
|
|
mutex_init(&soft->dmawritelock);
|
2008-02-07 15:15:25 +07:00
|
|
|
mutex_init(&soft->dmareadlock);
|
2008-02-07 15:15:24 +07:00
|
|
|
mutex_init(&soft->algolock);
|
2005-04-26 03:09:41 +07:00
|
|
|
|
|
|
|
mbcs_getdma_init(&soft->getdma);
|
|
|
|
mbcs_putdma_init(&soft->putdma);
|
|
|
|
mbcs_algo_init(&soft->algo);
|
|
|
|
|
|
|
|
mbcs_hw_init(soft);
|
|
|
|
|
|
|
|
/* Allocate interrupts */
|
|
|
|
mbcs_intr_alloc(dev);
|
|
|
|
|
|
|
|
device_create_file(&dev->dev, &dev_attr_algo);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mbcs_remove(struct cx_dev *dev)
|
|
|
|
{
|
|
|
|
if (dev->soft) {
|
|
|
|
mbcs_intr_dealloc(dev);
|
|
|
|
kfree(dev->soft);
|
|
|
|
}
|
|
|
|
|
|
|
|
device_remove_file(&dev->dev, &dev_attr_algo);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-07-19 15:47:53 +07:00
|
|
|
static const struct cx_device_id __devinitdata mbcs_id_table[] = {
|
2005-04-26 03:09:41 +07:00
|
|
|
{
|
|
|
|
.part_num = MBCS_PART_NUM,
|
|
|
|
.mfg_num = MBCS_MFG_NUM,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.part_num = MBCS_PART_NUM_ALG0,
|
|
|
|
.mfg_num = MBCS_MFG_NUM,
|
|
|
|
},
|
|
|
|
{0, 0}
|
|
|
|
};
|
|
|
|
|
|
|
|
MODULE_DEVICE_TABLE(cx, mbcs_id_table);
|
|
|
|
|
2007-07-19 15:47:53 +07:00
|
|
|
static struct cx_drv mbcs_driver = {
|
2005-04-26 03:09:41 +07:00
|
|
|
.name = DEVICE_NAME,
|
|
|
|
.id_table = mbcs_id_table,
|
|
|
|
.probe = mbcs_probe,
|
|
|
|
.remove = mbcs_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void __exit mbcs_exit(void)
|
|
|
|
{
|
2007-07-19 15:47:50 +07:00
|
|
|
unregister_chrdev(mbcs_major, DEVICE_NAME);
|
2005-04-26 03:09:41 +07:00
|
|
|
cx_driver_unregister(&mbcs_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init mbcs_init(void)
|
|
|
|
{
|
|
|
|
int rv;
|
|
|
|
|
2005-09-29 05:05:19 +07:00
|
|
|
if (!ia64_platform_is("sn2"))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2005-04-26 03:09:41 +07:00
|
|
|
// Put driver into chrdevs[]. Get major number.
|
|
|
|
rv = register_chrdev(mbcs_major, DEVICE_NAME, &mbcs_ops);
|
|
|
|
if (rv < 0) {
|
|
|
|
DBG(KERN_ALERT "mbcs_init: can't get major number. %d\n", rv);
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
mbcs_major = rv;
|
|
|
|
|
|
|
|
return cx_driver_register(&mbcs_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(mbcs_init);
|
|
|
|
module_exit(mbcs_exit);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Bruce Losure <blosure@sgi.com>");
|
|
|
|
MODULE_DESCRIPTION("Driver for MOATB Core Services");
|
|
|
|
MODULE_LICENSE("GPL");
|