2012-04-22 00:07:08 +07:00
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/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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2013-02-04 22:09:16 +07:00
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/include/ "imx6q.dtsi"
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2012-04-22 00:07:08 +07:00
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/ {
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model = "Freescale i.MX6Q SABRE Smart Device Board";
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compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
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memory {
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reg = <0x10000000 0x40000000>;
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};
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2012-11-12 15:26:18 +07:00
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gpio-keys {
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compatible = "gpio-keys";
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volume-up {
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label = "Volume Up";
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gpios = <&gpio1 4 0>;
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linux,code = <115>; /* KEY_VOLUMEUP */
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio1 5 0>;
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linux,code = <114>; /* KEY_VOLUMEDOWN */
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};
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};
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2012-04-22 00:07:08 +07:00
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};
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2012-12-31 10:32:48 +07:00
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_1>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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hog {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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1004 0x80000000 /* MX6Q_PAD_GPIO_4__GPIO_1_4 */
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1012 0x80000000 /* MX6Q_PAD_GPIO_5__GPIO_1_5 */
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1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */
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1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */
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1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */
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1426 0x80000000 /* MX6Q_PAD_NANDF_D3__GPIO_2_3 */
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>;
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};
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet_1>;
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phy-mode = "rgmii";
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2_1>;
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cd-gpios = <&gpio2 2 0>;
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wp-gpios = <&gpio2 3 0>;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3_1>;
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cd-gpios = <&gpio2 0 0>;
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wp-gpios = <&gpio2 1 0>;
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status = "okay";
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};
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