2012-02-26 18:12:43 +07:00
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/*
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* at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
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*
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* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* Licensed under GPLv2 only.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91SAM9263 family SoC";
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compatible = "atmel,at91sam9263";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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gpio4 = &pioE;
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tcb0 = &tcb0;
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2012-09-12 13:42:16 +07:00
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i2c0 = &i2c0;
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2012-02-26 18:12:43 +07:00
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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memory {
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reg = <0x20000000 0x08000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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2012-06-20 21:13:30 +07:00
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#interrupt-cells = <3>;
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2012-02-26 18:12:43 +07:00
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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2012-04-09 18:36:36 +07:00
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atmel,external-irqs = <30 31>;
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2012-02-26 18:12:43 +07:00
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};
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc";
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reg = <0xfffffc00 0x100>;
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};
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ramc: ramc@ffffe200 {
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compatible = "atmel,at91sam9260-sdramc";
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reg = <0xffffe200 0x200
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0xffffe800 0x200>;
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};
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pit: timer@fffffd30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffd30 0xf>;
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2012-06-20 21:13:30 +07:00
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interrupts = <1 4 7>;
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2012-02-26 18:12:43 +07:00
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};
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tcb0: timer@fff7c000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfff7c000 0x100>;
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2012-06-20 21:13:30 +07:00
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interrupts = <19 4 0>;
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2012-02-26 18:12:43 +07:00
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};
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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};
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shdwc@fffffd10 {
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compatible = "atmel,at91sam9260-shdwc";
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reg = <0xfffffd10 0x10>;
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};
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2012-07-04 16:20:46 +07:00
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pinctrl@fffff200 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
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ranges = <0xfffff200 0xfffff200 0xa00>;
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2012-07-05 15:56:09 +07:00
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atmel,mux-mask = <
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/* A B */
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0xfffffffb 0xffffe07f /* pioA */
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0x0007ffff 0x39072fff /* pioB */
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0xffffffff 0x3ffffff8 /* pioC */
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0xfffffbff 0xffffffff /* pioD */
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0xffe00fff 0xfbfcff00 /* pioE */
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>;
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/* shared pinctrl settings */
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2012-07-05 15:56:09 +07:00
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<2 30 0x1 0x0 /* PC30 periph A */
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2 31 0x1 0x1>; /* PC31 periph with pullup */
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};
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};
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<0 26 0x1 0x1 /* PA26 periph A with pullup */
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0 27 0x1 0x0>; /* PA27 periph A */
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};
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pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
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atmel,pins =
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<0 28 0x1 0x0 /* PA28 periph A */
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0 29 0x1 0x0>; /* PA29 periph A */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<3 0 0x1 0x1 /* PD0 periph A with pullup */
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3 1 0x1 0x0>; /* PD1 periph A */
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};
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pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
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atmel,pins =
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<3 7 0x2 0x0 /* PD7 periph B */
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3 8 0x2 0x0>; /* PD8 periph B */
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};
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};
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uart2 {
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pinctrl_uart2: uart2-0 {
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atmel,pins =
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<3 2 0x1 0x1 /* PD2 periph A with pullup */
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3 3 0x1 0x0>; /* PD3 periph A */
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};
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pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
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atmel,pins =
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<3 5 0x2 0x0 /* PD5 periph B */
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4 6 0x2 0x0>; /* PD6 periph B */
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};
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};
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2012-07-05 15:56:09 +07:00
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2012-07-12 22:36:52 +07:00
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nand {
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pinctrl_nand: nand-0 {
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atmel,pins =
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<0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/
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3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
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};
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};
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2012-10-23 09:19:11 +07:00
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macb {
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pinctrl_macb_rmii: macb_rmii-0 {
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atmel,pins =
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<2 25 0x2 0x0 /* PC25 periph B */
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4 21 0x1 0x0 /* PE21 periph A */
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4 23 0x1 0x0 /* PE23 periph A */
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4 24 0x1 0x0 /* PE24 periph A */
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4 25 0x1 0x0 /* PE25 periph A */
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4 26 0x1 0x0 /* PE26 periph A */
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4 27 0x1 0x0 /* PE27 periph A */
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4 28 0x1 0x0 /* PE28 periph A */
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4 29 0x1 0x0 /* PE29 periph A */
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4 30 0x1 0x0>; /* PE30 periph A */
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};
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pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
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atmel,pins =
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<2 20 0x2 0x0 /* PC20 periph B */
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2 21 0x2 0x0 /* PC21 periph B */
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2 22 0x2 0x0 /* PC22 periph B */
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2 23 0x2 0x0 /* PC23 periph B */
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2 24 0x2 0x0 /* PC24 periph B */
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2 25 0x2 0x0 /* PC25 periph B */
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2 27 0x2 0x0 /* PC27 periph B */
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4 22 0x2 0x0>; /* PE22 periph B */
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};
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};
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2012-07-04 16:20:46 +07:00
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pioA: gpio@fffff200 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff200 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioB: gpio@fffff400 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioC: gpio@fffff600 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff600 0x200>;
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interrupts = <4 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioD: gpio@fffff800 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff800 0x200>;
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interrupts = <4 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioE: gpio@fffffa00 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffffa00 0x200>;
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interrupts = <4 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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2012-07-05 15:56:09 +07:00
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};
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2012-02-26 18:12:43 +07:00
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};
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dbgu: serial@ffffee00 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xffffee00 0x200>;
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2012-06-20 21:13:30 +07:00
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interrupts = <1 4 7>;
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2012-07-05 15:56:09 +07:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dbgu>;
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2012-02-26 18:12:43 +07:00
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status = "disabled";
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};
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usart0: serial@fff8c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfff8c000 0x200>;
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2012-06-20 21:13:30 +07:00
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interrupts = <7 4 5>;
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2012-02-26 18:12:43 +07:00
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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2012-07-05 15:56:09 +07:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0>;
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2012-02-26 18:12:43 +07:00
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status = "disabled";
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};
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usart1: serial@fff90000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfff90000 0x200>;
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2012-06-20 21:13:30 +07:00
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interrupts = <8 4 5>;
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2012-02-26 18:12:43 +07:00
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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2012-07-05 15:56:09 +07:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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2012-02-26 18:12:43 +07:00
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status = "disabled";
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};
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usart2: serial@fff94000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfff94000 0x200>;
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2012-06-20 21:13:30 +07:00
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interrupts = <9 4 5>;
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2012-02-26 18:12:43 +07:00
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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2012-07-05 15:56:09 +07:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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2012-02-26 18:12:43 +07:00
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status = "disabled";
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};
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macb0: ethernet@fffbc000 {
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compatible = "cdns,at32ap7000-macb", "cdns,macb";
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reg = <0xfffbc000 0x100>;
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2012-06-20 21:13:30 +07:00
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interrupts = <21 4 3>;
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2012-10-23 09:19:11 +07:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb_rmii>;
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2012-02-26 18:12:43 +07:00
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status = "disabled";
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};
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usb1: gadget@fff78000 {
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compatible = "atmel,at91rm9200-udc";
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reg = <0xfff78000 0x4000>;
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2012-06-20 21:13:30 +07:00
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interrupts = <24 4 2>;
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2012-02-26 18:12:43 +07:00
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status = "disabled";
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};
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2012-09-12 13:42:16 +07:00
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i2c0: i2c@fff88000 {
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compatible = "atmel,at91sam9263-i2c";
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reg = <0xfff88000 0x100>;
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interrupts = <13 4 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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2012-02-26 18:12:43 +07:00
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};
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nand0: nand@40000000 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x10000000
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0xffffe000 0x200
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>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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2012-07-12 22:36:52 +07:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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2012-02-26 18:12:43 +07:00
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gpios = <&pioA 22 0
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&pioD 15 0
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0
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>;
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status = "disabled";
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};
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usb0: ohci@00a00000 {
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compatible = "atmel,at91rm9200-ohci", "usb-ohci";
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reg = <0x00a00000 0x100000>;
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2012-06-20 21:13:30 +07:00
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interrupts = <29 4 2>;
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2012-02-26 18:12:43 +07:00
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status = "disabled";
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};
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};
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i2c@0 {
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compatible = "i2c-gpio";
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gpios = <&pioB 4 0 /* sda */
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&pioB 5 0 /* scl */
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>;
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i2c-gpio,sda-open-drain;
|
|
|
|
i2c-gpio,scl-open-drain;
|
|
|
|
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
};
|