2015-09-07 21:14:58 +07:00
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/*
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* rcar_du_vsp.h -- R-Car Display Unit VSP-Based Compositor
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*
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* Copyright (C) 2015 Renesas Electronics Corporation
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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2018-04-30 19:02:04 +07:00
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#include <drm/drm_gem_framebuffer_helper.h>
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2015-09-07 21:14:58 +07:00
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#include <drm/drm_plane_helper.h>
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2017-06-26 17:12:01 +07:00
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#include <linux/bitops.h>
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2017-05-17 06:20:07 +07:00
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#include <linux/dma-mapping.h>
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2015-09-07 21:14:58 +07:00
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#include <linux/of_platform.h>
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2017-05-17 06:20:07 +07:00
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#include <linux/scatterlist.h>
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2015-09-07 21:14:58 +07:00
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#include <linux/videodev2.h>
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#include <media/vsp1.h>
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#include "rcar_du_drv.h"
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#include "rcar_du_kms.h"
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#include "rcar_du_vsp.h"
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2017-12-01 18:47:19 +07:00
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static void rcar_du_vsp_complete(void *private, bool completed, u32 crc)
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2017-03-04 09:01:19 +07:00
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{
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struct rcar_du_crtc *crtc = private;
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2017-06-30 19:14:11 +07:00
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if (crtc->vblank_enable)
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drm_crtc_handle_vblank(&crtc->crtc);
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if (completed)
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rcar_du_crtc_finish_page_flip(crtc);
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2017-12-01 18:59:55 +07:00
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drm_crtc_add_crc_entry(&crtc->crtc, false, 0, &crc);
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2017-03-04 09:01:19 +07:00
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}
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2015-09-07 21:14:58 +07:00
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void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
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{
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const struct drm_display_mode *mode = &crtc->crtc.state->adjusted_mode;
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2015-09-07 21:34:26 +07:00
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struct rcar_du_device *rcdu = crtc->group->dev;
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2017-03-03 16:31:48 +07:00
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struct vsp1_du_lif_config cfg = {
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.width = mode->hdisplay,
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.height = mode->vdisplay,
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2017-03-04 09:01:19 +07:00
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.callback = rcar_du_vsp_complete,
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.callback_data = crtc,
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2017-03-03 16:31:48 +07:00
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};
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2015-09-07 21:14:58 +07:00
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struct rcar_du_plane_state state = {
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.state = {
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2018-04-11 14:39:27 +07:00
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.alpha = DRM_BLEND_ALPHA_OPAQUE,
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2015-09-07 21:14:58 +07:00
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.crtc = &crtc->crtc,
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2017-08-15 22:52:04 +07:00
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.dst.x1 = 0,
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.dst.y1 = 0,
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.dst.x2 = mode->hdisplay,
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.dst.y2 = mode->vdisplay,
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.src.x1 = 0,
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.src.y1 = 0,
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.src.x2 = mode->hdisplay << 16,
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.src.y2 = mode->vdisplay << 16,
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2016-07-22 19:28:27 +07:00
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.zpos = 0,
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2015-09-07 21:14:58 +07:00
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},
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.format = rcar_du_format_info(DRM_FORMAT_ARGB8888),
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.source = RCAR_DU_PLANE_VSPD1,
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.colorkey = 0,
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};
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2015-09-07 21:34:26 +07:00
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if (rcdu->info->gen >= 3)
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state.hwindex = (crtc->index % 2) ? 2 : 0;
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else
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state.hwindex = crtc->index % 2;
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2015-09-07 21:14:58 +07:00
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__rcar_du_plane_setup(crtc->group, &state);
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2017-07-11 05:13:20 +07:00
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/*
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* Ensure that the plane source configuration takes effect by requesting
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2015-09-07 21:14:58 +07:00
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* a restart of the group. See rcar_du_plane_atomic_update() for a more
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* detailed explanation.
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*
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* TODO: Check whether this is still needed on Gen3.
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*/
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crtc->group->need_restart = true;
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2017-06-26 17:12:01 +07:00
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vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
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2015-09-07 21:14:58 +07:00
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}
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void rcar_du_vsp_disable(struct rcar_du_crtc *crtc)
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{
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2017-06-26 17:12:01 +07:00
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vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, NULL);
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2015-09-07 21:14:58 +07:00
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}
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void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc)
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{
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2017-06-26 17:12:01 +07:00
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vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe);
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2015-09-07 21:14:58 +07:00
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}
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void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
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{
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2017-12-01 18:47:19 +07:00
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struct vsp1_du_atomic_pipe_config cfg = { { 0, } };
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2017-12-01 18:59:55 +07:00
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struct rcar_du_crtc_state *state;
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state = to_rcar_crtc_state(crtc->crtc.state);
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cfg.crc = state->crc;
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2017-12-01 18:47:19 +07:00
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vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
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2015-09-07 21:14:58 +07:00
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}
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/* Keep the two tables in sync. */
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static const u32 formats_kms[] = {
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DRM_FORMAT_RGB332,
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DRM_FORMAT_ARGB4444,
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DRM_FORMAT_XRGB4444,
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DRM_FORMAT_ARGB1555,
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DRM_FORMAT_XRGB1555,
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DRM_FORMAT_RGB565,
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DRM_FORMAT_BGR888,
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DRM_FORMAT_RGB888,
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DRM_FORMAT_BGRA8888,
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DRM_FORMAT_BGRX8888,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_UYVY,
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DRM_FORMAT_VYUY,
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DRM_FORMAT_YUYV,
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DRM_FORMAT_YVYU,
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DRM_FORMAT_NV12,
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DRM_FORMAT_NV21,
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DRM_FORMAT_NV16,
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DRM_FORMAT_NV61,
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2015-11-12 07:03:47 +07:00
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DRM_FORMAT_YUV420,
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DRM_FORMAT_YVU420,
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DRM_FORMAT_YUV422,
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DRM_FORMAT_YVU422,
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DRM_FORMAT_YUV444,
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DRM_FORMAT_YVU444,
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2015-09-07 21:14:58 +07:00
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};
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static const u32 formats_v4l2[] = {
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V4L2_PIX_FMT_RGB332,
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V4L2_PIX_FMT_ARGB444,
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V4L2_PIX_FMT_XRGB444,
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V4L2_PIX_FMT_ARGB555,
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V4L2_PIX_FMT_XRGB555,
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V4L2_PIX_FMT_RGB565,
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V4L2_PIX_FMT_RGB24,
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V4L2_PIX_FMT_BGR24,
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V4L2_PIX_FMT_ARGB32,
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V4L2_PIX_FMT_XRGB32,
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V4L2_PIX_FMT_ABGR32,
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V4L2_PIX_FMT_XBGR32,
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V4L2_PIX_FMT_UYVY,
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V4L2_PIX_FMT_VYUY,
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V4L2_PIX_FMT_YUYV,
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V4L2_PIX_FMT_YVYU,
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V4L2_PIX_FMT_NV12M,
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V4L2_PIX_FMT_NV21M,
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V4L2_PIX_FMT_NV16M,
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V4L2_PIX_FMT_NV61M,
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2015-11-12 07:03:47 +07:00
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V4L2_PIX_FMT_YUV420M,
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V4L2_PIX_FMT_YVU420M,
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V4L2_PIX_FMT_YUV422M,
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V4L2_PIX_FMT_YVU422M,
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V4L2_PIX_FMT_YUV444M,
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V4L2_PIX_FMT_YVU444M,
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2015-09-07 21:14:58 +07:00
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};
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static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
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{
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struct rcar_du_vsp_plane_state *state =
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to_rcar_vsp_plane_state(plane->plane.state);
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2017-06-26 17:12:01 +07:00
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struct rcar_du_crtc *crtc = to_rcar_crtc(state->state.crtc);
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2015-09-07 21:14:58 +07:00
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struct drm_framebuffer *fb = plane->plane.state->fb;
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2016-03-24 15:15:59 +07:00
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struct vsp1_du_atomic_config cfg = {
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.pixelformat = 0,
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.pitch = fb->pitches[0],
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2018-04-11 14:39:27 +07:00
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.alpha = state->state.alpha >> 8,
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2016-07-22 19:28:27 +07:00
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.zpos = state->state.zpos,
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2016-03-24 15:15:59 +07:00
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};
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2015-09-07 21:14:58 +07:00
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unsigned int i;
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2017-08-15 22:52:04 +07:00
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cfg.src.left = state->state.src.x1 >> 16;
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cfg.src.top = state->state.src.y1 >> 16;
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cfg.src.width = drm_rect_width(&state->state.src) >> 16;
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cfg.src.height = drm_rect_height(&state->state.src) >> 16;
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2015-09-07 21:14:58 +07:00
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2017-08-15 22:52:04 +07:00
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cfg.dst.left = state->state.dst.x1;
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cfg.dst.top = state->state.dst.y1;
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cfg.dst.width = drm_rect_width(&state->state.dst);
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cfg.dst.height = drm_rect_height(&state->state.dst);
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2015-09-07 21:14:58 +07:00
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2017-05-17 06:20:07 +07:00
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for (i = 0; i < state->format->planes; ++i)
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cfg.mem[i] = sg_dma_address(state->sg_tables[i].sgl)
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+ fb->offsets[i];
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2015-09-07 21:14:58 +07:00
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for (i = 0; i < ARRAY_SIZE(formats_kms); ++i) {
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if (formats_kms[i] == state->format->fourcc) {
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2016-03-24 15:15:59 +07:00
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cfg.pixelformat = formats_v4l2[i];
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2015-09-07 21:14:58 +07:00
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break;
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}
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}
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2017-06-26 17:12:01 +07:00
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vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe,
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plane->index, &cfg);
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2015-09-07 21:14:58 +07:00
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}
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2017-05-17 06:20:07 +07:00
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static int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state);
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struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp;
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struct rcar_du_device *rcdu = vsp->dev;
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unsigned int i;
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int ret;
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2017-08-15 22:52:04 +07:00
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/*
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* There's no need to prepare (and unprepare) the framebuffer when the
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* plane is not visible, as it will not be displayed.
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*/
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if (!state->visible)
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2017-05-17 06:20:07 +07:00
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return 0;
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for (i = 0; i < rstate->format->planes; ++i) {
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struct drm_gem_cma_object *gem =
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drm_fb_cma_get_gem_obj(state->fb, i);
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struct sg_table *sgt = &rstate->sg_tables[i];
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ret = dma_get_sgtable(rcdu->dev, sgt, gem->vaddr, gem->paddr,
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gem->base.size);
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if (ret)
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goto fail;
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ret = vsp1_du_map_sg(vsp->vsp, sgt);
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if (!ret) {
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sg_free_table(sgt);
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ret = -ENOMEM;
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goto fail;
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}
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}
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2018-04-30 19:02:04 +07:00
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ret = drm_gem_fb_prepare_fb(plane, state);
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if (ret)
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goto fail;
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2017-05-17 06:20:07 +07:00
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return 0;
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fail:
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while (i--) {
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struct sg_table *sgt = &rstate->sg_tables[i];
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vsp1_du_unmap_sg(vsp->vsp, sgt);
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sg_free_table(sgt);
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}
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return ret;
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}
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static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state);
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struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp;
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unsigned int i;
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2017-08-15 22:52:04 +07:00
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if (!state->visible)
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2017-05-17 06:20:07 +07:00
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return;
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for (i = 0; i < rstate->format->planes; ++i) {
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struct sg_table *sgt = &rstate->sg_tables[i];
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vsp1_du_unmap_sg(vsp->vsp, sgt);
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sg_free_table(sgt);
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}
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}
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2015-09-07 21:14:58 +07:00
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static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state);
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2017-08-15 22:45:21 +07:00
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return __rcar_du_plane_atomic_check(plane, state, &rstate->format);
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2015-09-07 21:14:58 +07:00
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}
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static void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane,
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struct drm_plane_state *old_state)
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{
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struct rcar_du_vsp_plane *rplane = to_rcar_vsp_plane(plane);
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2017-06-26 17:12:01 +07:00
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struct rcar_du_crtc *crtc = to_rcar_crtc(old_state->crtc);
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2015-09-07 21:14:58 +07:00
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|
|
2017-08-15 22:52:04 +07:00
|
|
|
if (plane->state->visible)
|
2015-09-07 21:14:58 +07:00
|
|
|
rcar_du_vsp_plane_setup(rplane);
|
|
|
|
else
|
2017-06-26 17:12:01 +07:00
|
|
|
vsp1_du_atomic_update(rplane->vsp->vsp, crtc->vsp_pipe,
|
|
|
|
rplane->index, NULL);
|
2015-09-07 21:14:58 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct drm_plane_helper_funcs rcar_du_vsp_plane_helper_funcs = {
|
2017-05-17 06:20:07 +07:00
|
|
|
.prepare_fb = rcar_du_vsp_plane_prepare_fb,
|
|
|
|
.cleanup_fb = rcar_du_vsp_plane_cleanup_fb,
|
2015-09-07 21:14:58 +07:00
|
|
|
.atomic_check = rcar_du_vsp_plane_atomic_check,
|
|
|
|
.atomic_update = rcar_du_vsp_plane_atomic_update,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct drm_plane_state *
|
|
|
|
rcar_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane)
|
|
|
|
{
|
|
|
|
struct rcar_du_vsp_plane_state *copy;
|
|
|
|
|
|
|
|
if (WARN_ON(!plane->state))
|
|
|
|
return NULL;
|
|
|
|
|
2018-01-18 03:18:41 +07:00
|
|
|
copy = kzalloc(sizeof(*copy), GFP_KERNEL);
|
2015-09-07 21:14:58 +07:00
|
|
|
if (copy == NULL)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
__drm_atomic_helper_plane_duplicate_state(plane, ©->state);
|
|
|
|
|
|
|
|
return ©->state;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void rcar_du_vsp_plane_atomic_destroy_state(struct drm_plane *plane,
|
|
|
|
struct drm_plane_state *state)
|
|
|
|
{
|
2016-05-09 21:34:10 +07:00
|
|
|
__drm_atomic_helper_plane_destroy_state(state);
|
2015-09-07 21:14:58 +07:00
|
|
|
kfree(to_rcar_vsp_plane_state(state));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void rcar_du_vsp_plane_reset(struct drm_plane *plane)
|
|
|
|
{
|
|
|
|
struct rcar_du_vsp_plane_state *state;
|
|
|
|
|
|
|
|
if (plane->state) {
|
|
|
|
rcar_du_vsp_plane_atomic_destroy_state(plane, plane->state);
|
|
|
|
plane->state = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
state = kzalloc(sizeof(*state), GFP_KERNEL);
|
|
|
|
if (state == NULL)
|
|
|
|
return;
|
|
|
|
|
2018-08-04 23:15:27 +07:00
|
|
|
__drm_atomic_helper_plane_reset(plane, &state->state);
|
2016-07-22 19:28:27 +07:00
|
|
|
state->state.zpos = plane->type == DRM_PLANE_TYPE_PRIMARY ? 0 : 1;
|
2015-09-07 21:14:58 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct drm_plane_funcs rcar_du_vsp_plane_funcs = {
|
|
|
|
.update_plane = drm_atomic_helper_update_plane,
|
|
|
|
.disable_plane = drm_atomic_helper_disable_plane,
|
|
|
|
.reset = rcar_du_vsp_plane_reset,
|
|
|
|
.destroy = drm_plane_cleanup,
|
|
|
|
.atomic_duplicate_state = rcar_du_vsp_plane_atomic_duplicate_state,
|
|
|
|
.atomic_destroy_state = rcar_du_vsp_plane_atomic_destroy_state,
|
|
|
|
};
|
|
|
|
|
2017-06-26 17:12:01 +07:00
|
|
|
int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
|
|
|
|
unsigned int crtcs)
|
2015-09-07 21:14:58 +07:00
|
|
|
{
|
|
|
|
struct rcar_du_device *rcdu = vsp->dev;
|
|
|
|
struct platform_device *pdev;
|
2017-06-26 17:12:01 +07:00
|
|
|
unsigned int num_crtcs = hweight32(crtcs);
|
2015-09-07 21:14:58 +07:00
|
|
|
unsigned int i;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Find the VSP device and initialize it. */
|
|
|
|
pdev = of_find_device_by_node(np);
|
|
|
|
if (!pdev)
|
|
|
|
return -ENXIO;
|
|
|
|
|
|
|
|
vsp->vsp = &pdev->dev;
|
|
|
|
|
|
|
|
ret = vsp1_du_init(vsp->vsp);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2017-07-11 05:13:20 +07:00
|
|
|
/*
|
|
|
|
* The VSP2D (Gen3) has 5 RPFs, but the VSP1D (Gen2) is limited to
|
2015-09-07 21:34:26 +07:00
|
|
|
* 4 RPFs.
|
2015-09-07 21:14:58 +07:00
|
|
|
*/
|
2015-09-07 21:34:26 +07:00
|
|
|
vsp->num_planes = rcdu->info->gen >= 3 ? 5 : 4;
|
2015-09-07 21:14:58 +07:00
|
|
|
|
|
|
|
vsp->planes = devm_kcalloc(rcdu->dev, vsp->num_planes,
|
|
|
|
sizeof(*vsp->planes), GFP_KERNEL);
|
|
|
|
if (!vsp->planes)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
for (i = 0; i < vsp->num_planes; ++i) {
|
2017-06-26 17:12:01 +07:00
|
|
|
enum drm_plane_type type = i < num_crtcs
|
|
|
|
? DRM_PLANE_TYPE_PRIMARY
|
|
|
|
: DRM_PLANE_TYPE_OVERLAY;
|
2015-09-07 21:14:58 +07:00
|
|
|
struct rcar_du_vsp_plane *plane = &vsp->planes[i];
|
|
|
|
|
|
|
|
plane->vsp = vsp;
|
|
|
|
plane->index = i;
|
|
|
|
|
2017-06-26 17:12:01 +07:00
|
|
|
ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs,
|
2015-09-07 21:14:58 +07:00
|
|
|
&rcar_du_vsp_plane_funcs,
|
|
|
|
formats_kms,
|
2017-07-24 10:46:38 +07:00
|
|
|
ARRAY_SIZE(formats_kms),
|
|
|
|
NULL, type, NULL);
|
2015-09-07 21:14:58 +07:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
drm_plane_helper_add(&plane->plane,
|
|
|
|
&rcar_du_vsp_plane_helper_funcs);
|
|
|
|
|
|
|
|
if (type == DRM_PLANE_TYPE_PRIMARY)
|
|
|
|
continue;
|
|
|
|
|
2018-04-11 14:39:27 +07:00
|
|
|
drm_plane_create_alpha_property(&plane->plane);
|
2016-07-22 19:28:27 +07:00
|
|
|
drm_plane_create_zpos_property(&plane->plane, 1, 1,
|
|
|
|
vsp->num_planes - 1);
|
2015-09-07 21:14:58 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|