linux_dsm_epyc7002/drivers/mtd/hyperbus/Kconfig

menuconfig MTD_HYPERBUS
	tristate "HyperBus support"
	select MTD_CFI
	select MTD_MAP_BANK_WIDTH_2
	select MTD_CFI_AMDSTD
	select MTD_COMPLEX_MAPPINGS
	help
	  This is the framework for the HyperBus which can be used by
	  the HyperBus Controller driver to communicate with
	  HyperFlash. See Cypress HyperBus specification for more
	  details
mtd: Add support for HyperBus memory devices Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate Bus interface between a host system master and one or more slave interfaces. HyperBus is used to connect microprocessor, microcontroller, or ASIC devices with random access NOR flash memory (called HyperFlash) or self refresh DRAM (called HyperRAM). Its a 8-bit data bus (DQ[7:0]) with Read-Write Data Strobe (RWDS) signal and either Single-ended clock(3.0V parts) or Differential clock (1.8V parts). It uses ChipSelect lines to select b/w multiple slaves. At bus level, it follows a separate protocol described in HyperBus specification[1]. HyperFlash follows CFI AMD/Fujitsu Extended Command Set (0x0002) similar to that of existing parallel NORs. Since HyperBus is x8 DDR bus, its equivalent to x16 parallel NOR flash with respect to bits per clock cycle. But HyperBus operates at >166MHz frequencies. HyperRAM provides direct random read/write access to flash memory array. But, HyperBus memory controllers seem to abstract implementation details and expose a simple MMIO interface to access connected flash. Add support for registering HyperFlash devices with MTD framework. MTD maps framework along with CFI chip support framework are used to support communicating with flash. Framework is modelled along the lines of spi-nor framework. HyperBus memory controller (HBMC) drivers calls hyperbus_register_device() to register a single HyperFlash device. HyperFlash core parses MMIO access information from DT, sets up the map_info struct, probes CFI flash and registers it with MTD framework. Some HBMC masters need calibration/training sequence[3] to be carried out, in order for DLL inside the controller to lock, by reading a known string/pattern. This is done by repeatedly reading CFI Query Identification String. Calibration needs to be done before trying to detect flash as part of CFI flash probe. HyperRAM is not supported at the moment. HyperBus specification can be found at[1] HyperFlash datasheet can be found at[2] [1] https://www.cypress.com/file/213356/download [2] https://www.cypress.com/file/213346/download [3] http://www.ti.com/lit/ug/spruid7b/spruid7b.pdf Table 12-5741. HyperFlash Access Sequence Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> 2019-06-25 14:57:44 +07:00			`menuconfig MTD_HYPERBUS`
			`tristate "HyperBus support"`
			`select MTD_CFI`
			`select MTD_MAP_BANK_WIDTH_2`
			`select MTD_CFI_AMDSTD`
			`select MTD_COMPLEX_MAPPINGS`
			`help`
			`This is the framework for the HyperBus which can be used by`
			`the HyperBus Controller driver to communicate with`
			`HyperFlash. See Cypress HyperBus specification for more`
			`details`