2016-10-02 01:59:57 +07:00
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/* QLogic qed NIC Driver
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2017-01-01 18:57:00 +07:00
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* Copyright (c) 2015-2017 QLogic Corporation
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2016-10-02 01:59:57 +07:00
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and /or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef _QED_ROCE_H
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#define _QED_ROCE_H
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#include <linux/types.h>
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#include <linux/bitops.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/qed/qed_if.h>
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#include <linux/qed/qed_roce_if.h>
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#include "qed.h"
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#include "qed_dev_api.h"
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#include "qed_hsi.h"
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2016-10-02 02:00:01 +07:00
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#include "qed_ll2.h"
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2016-10-02 01:59:57 +07:00
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#define QED_RDMA_MAX_FMR (RDMA_MAX_TIDS)
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#define QED_RDMA_MAX_P_KEY (1)
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#define QED_RDMA_MAX_WQE (0x7FFF)
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#define QED_RDMA_MAX_SRQ_WQE_ELEM (0x7FFF)
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#define QED_RDMA_PAGE_SIZE_CAPS (0xFFFFF000)
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#define QED_RDMA_ACK_DELAY (15)
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#define QED_RDMA_MAX_MR_SIZE (0x10000000000ULL)
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#define QED_RDMA_MAX_CQS (RDMA_MAX_CQS)
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#define QED_RDMA_MAX_MRS (RDMA_MAX_TIDS)
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/* Add 1 for header element */
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#define QED_RDMA_MAX_SRQ_ELEM_PER_WQE (RDMA_MAX_SGE_PER_RQ_WQE + 1)
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#define QED_RDMA_MAX_SGE_PER_SRQ_WQE (RDMA_MAX_SGE_PER_RQ_WQE)
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#define QED_RDMA_SRQ_WQE_ELEM_SIZE (16)
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#define QED_RDMA_MAX_SRQS (32 * 1024)
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#define QED_RDMA_MAX_CQE_32_BIT (0x7FFFFFFF - 1)
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#define QED_RDMA_MAX_CQE_16_BIT (0x7FFF - 1)
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enum qed_rdma_toggle_bit {
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QED_RDMA_TOGGLE_BIT_CLEAR = 0,
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QED_RDMA_TOGGLE_BIT_SET = 1
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};
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2017-04-30 15:49:08 +07:00
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#define QED_RDMA_MAX_BMAP_NAME (10)
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2016-10-02 01:59:57 +07:00
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struct qed_bmap {
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unsigned long *bitmap;
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u32 max_count;
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2017-04-30 15:49:08 +07:00
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char name[QED_RDMA_MAX_BMAP_NAME];
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2016-10-02 01:59:57 +07:00
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};
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struct qed_rdma_info {
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/* spin lock to protect bitmaps */
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spinlock_t lock;
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struct qed_bmap cq_map;
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struct qed_bmap pd_map;
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struct qed_bmap tid_map;
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struct qed_bmap qp_map;
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struct qed_bmap srq_map;
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struct qed_bmap cid_map;
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2017-03-11 23:39:18 +07:00
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struct qed_bmap real_cid_map;
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2016-10-02 01:59:57 +07:00
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struct qed_bmap dpi_map;
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struct qed_bmap toggle_bits;
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struct qed_rdma_events events;
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struct qed_rdma_device *dev;
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struct qed_rdma_port *port;
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u32 last_tid;
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u8 num_cnqs;
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u32 num_qps;
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u32 num_mrs;
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u16 queue_zone_base;
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2017-03-11 23:39:18 +07:00
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u16 max_queue_zones;
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2016-10-02 01:59:57 +07:00
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enum protocol_type proto;
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};
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2016-10-02 01:59:59 +07:00
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struct qed_rdma_qp {
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struct regpair qp_handle;
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struct regpair qp_handle_async;
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u32 qpid;
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u16 icid;
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enum qed_roce_qp_state cur_state;
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bool use_srq;
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bool signal_all;
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bool fmr_and_reserved_lkey;
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bool incoming_rdma_read_en;
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bool incoming_rdma_write_en;
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bool incoming_atomic_en;
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bool e2e_flow_control_en;
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u16 pd;
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u16 pkey;
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u32 dest_qp;
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u16 mtu;
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u16 srq_id;
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u8 traffic_class_tos;
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u8 hop_limit_ttl;
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u16 dpi;
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u32 flow_label;
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bool lb_indication;
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u16 vlan_id;
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u32 ack_timeout;
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u8 retry_cnt;
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u8 rnr_retry_cnt;
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u8 min_rnr_nak_timer;
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bool sqd_async;
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union qed_gid sgid;
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union qed_gid dgid;
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enum roce_mode roce_mode;
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u16 udp_src_port;
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u8 stats_queue;
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/* requeseter */
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u8 max_rd_atomic_req;
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u32 sq_psn;
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u16 sq_cq_id;
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u16 sq_num_pages;
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dma_addr_t sq_pbl_ptr;
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void *orq;
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dma_addr_t orq_phys_addr;
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u8 orq_num_pages;
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bool req_offloaded;
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/* responder */
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u8 max_rd_atomic_resp;
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u32 rq_psn;
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u16 rq_cq_id;
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u16 rq_num_pages;
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dma_addr_t rq_pbl_ptr;
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void *irq;
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dma_addr_t irq_phys_addr;
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u8 irq_num_pages;
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bool resp_offloaded;
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2017-03-11 23:39:18 +07:00
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u32 cq_prod;
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2016-10-02 01:59:59 +07:00
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u8 remote_mac_addr[6];
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u8 local_mac_addr[6];
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void *shared_queue;
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dma_addr_t shared_queue_phys_addr;
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};
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2016-10-14 02:57:02 +07:00
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#if IS_ENABLED(CONFIG_QED_RDMA)
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void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
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2017-03-11 23:39:18 +07:00
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void qed_roce_async_event(struct qed_hwfn *p_hwfn,
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u8 fw_event_code, union rdma_eqe_data *rdma_data);
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2016-10-14 02:57:02 +07:00
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void qed_ll2b_complete_tx_gsi_packet(struct qed_hwfn *p_hwfn,
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u8 connection_handle,
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void *cookie,
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dma_addr_t first_frag_addr,
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bool b_last_fragment, bool b_last_packet);
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void qed_ll2b_release_tx_gsi_packet(struct qed_hwfn *p_hwfn,
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u8 connection_handle,
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void *cookie,
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dma_addr_t first_frag_addr,
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bool b_last_fragment, bool b_last_packet);
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void qed_ll2b_complete_rx_gsi_packet(struct qed_hwfn *p_hwfn,
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u8 connection_handle,
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void *cookie,
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dma_addr_t rx_buf_addr,
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u16 data_length,
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u8 data_length_error,
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u16 parse_flags,
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u16 vlan,
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u32 src_mac_addr_hi,
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u16 src_mac_addr_lo, bool b_last_packet);
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2016-10-02 01:59:57 +07:00
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#else
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2016-10-14 02:57:02 +07:00
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static inline void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) {}
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2017-03-11 23:39:18 +07:00
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static inline void qed_roce_async_event(struct qed_hwfn *p_hwfn,
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u8 fw_event_code,
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union rdma_eqe_data *rdma_data) {}
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2016-10-14 02:57:02 +07:00
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static inline void qed_ll2b_complete_tx_gsi_packet(struct qed_hwfn *p_hwfn,
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u8 connection_handle,
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void *cookie,
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dma_addr_t first_frag_addr,
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bool b_last_fragment,
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bool b_last_packet) {}
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static inline void qed_ll2b_release_tx_gsi_packet(struct qed_hwfn *p_hwfn,
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u8 connection_handle,
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void *cookie,
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dma_addr_t first_frag_addr,
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bool b_last_fragment,
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bool b_last_packet) {}
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static inline void qed_ll2b_complete_rx_gsi_packet(struct qed_hwfn *p_hwfn,
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u8 connection_handle,
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void *cookie,
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dma_addr_t rx_buf_addr,
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u16 data_length,
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u8 data_length_error,
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u16 parse_flags,
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u16 vlan,
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u32 src_mac_addr_hi,
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u16 src_mac_addr_lo,
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bool b_last_packet) {}
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2016-10-02 01:59:57 +07:00
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#endif
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#endif
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