2019-06-04 15:11:33 +07:00
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// SPDX-License-Identifier: GPL-2.0-only
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2017-01-24 17:09:34 +07:00
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/*
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* Copyright (C) 2014-2017 Phytec Messtechnik GmbH
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* Author: Wadim Egorov <w.egorov@phytec.de>
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* Teresa Remmet <t.remmet@phytec.de>
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*/
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#include <dt-bindings/input/input.h>
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/ {
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model = "Phytec AM335x PCM-953";
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compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx";
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/* Power */
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regulators {
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vcc3v3: fixedregulator@1 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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};
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vcc1v8: fixedregulator@2 {
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compatible = "regulator-fixed";
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regulator-name = "vcc1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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};
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};
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/* User IO */
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user_leds: user_leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&user_leds_pins>;
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green {
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label = "green:user";
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gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "gpio";
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default-state = "on";
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};
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yellow {
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label = "yellow:user";
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gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "gpio";
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default-state = "on";
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};
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};
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user_buttons: user_buttons {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&user_buttons_pins>;
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button@0 {
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label = "home";
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linux,code = <KEY_HOME>;
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gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
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2017-02-10 19:29:07 +07:00
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wakeup-source;
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2017-01-24 17:09:34 +07:00
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};
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button@1 {
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label = "menu";
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linux,code = <KEY_MENU>;
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gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
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2017-02-10 19:29:07 +07:00
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wakeup-source;
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2017-01-24 17:09:34 +07:00
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};
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};
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};
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&am33xx_pinmux {
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user_buttons_pins: pinmux_user_buttons {
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pinctrl-single,pins = <
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2019-04-12 23:26:19 +07:00
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AM33XX_PADCONF(AM335X_PIN_EMU0, PIN_INPUT_PULLDOWN, MUX_MODE7) /* emu0.gpio3_7 */
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AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* emu1.gpio3_8 */
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2017-01-24 17:09:34 +07:00
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>;
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};
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user_leds_pins: pinmux_user_leds {
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pinctrl-single,pins = <
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2019-04-12 23:26:19 +07:00
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn1.gpio1_30 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn2.gpio1_31 */
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2017-01-24 17:09:34 +07:00
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>;
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};
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};
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/* CAN */
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&am33xx_pinmux {
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dcan1_pins: pinmux_dcan1 {
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pinctrl-single,pins = <
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2019-04-12 23:26:19 +07:00
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AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart1_rxd.dcan1_tx_mux2 */
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AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLUP, MUX_MODE2) /* uart1_txd.dcan1_rx_mux2 */
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2017-01-24 17:09:34 +07:00
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>;
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};
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};
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&dcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&dcan1_pins>;
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status = "okay";
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};
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/* Ethernet */
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&am33xx_pinmux {
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ethernet1_pins: pinmux_ethernet1 {
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pinctrl-single,pins = <
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2019-04-12 23:26:19 +07:00
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AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
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2017-01-24 17:09:34 +07:00
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>;
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};
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};
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&cpsw_emac1 {
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phy-handle = <&phy1>;
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phy-mode = "rgmii-id";
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dual_emac_res_vlan = <2>;
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status = "okay";
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};
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&davinci_mdio {
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phy1: ethernet-phy@2 {
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reg = <2>;
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/* Register 260 (104h) – RGMII Clock and Control Pad Skew */
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rxc-skew-ps = <1400>;
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rxdv-skew-ps = <0>;
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txc-skew-ps = <1400>;
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txen-skew-ps = <0>;
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/* Register 261 (105h) – RGMII RX Data Pad Skew */
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rxd3-skew-ps = <0>;
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rxd2-skew-ps = <0>;
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rxd1-skew-ps = <0>;
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rxd0-skew-ps = <0>;
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/* Register 262 (106h) – RGMII TX Data Pad Skew */
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txd3-skew-ps = <0>;
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txd2-skew-ps = <0>;
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txd1-skew-ps = <0>;
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txd0-skew-ps = <0>;
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};
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};
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&mac {
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slaves = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <ðernet0_pins ðernet1_pins>;
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dual_emac;
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};
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/* Misc */
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&cb_gpio_pins>;
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cb_gpio_pins: pinmux_cb_gpio {
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pinctrl-single,pins = <
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2019-04-12 23:26:19 +07:00
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AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* uart0_ctsn.gpio1_8 */
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AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* uart0_rtsn.gpio1_9 */
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2017-01-24 17:09:34 +07:00
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>;
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};
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};
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/* MMC */
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&am33xx_pinmux {
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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2019-04-12 23:26:19 +07:00
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
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2017-01-24 17:09:34 +07:00
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>;
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};
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};
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&mmc1 {
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vmmc-supply = <&vcc3v3>;
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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/* UARTs */
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&am33xx_pinmux {
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uart0_pins: pinmux_uart0 {
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pinctrl-single,pins = <
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2019-04-12 23:26:19 +07:00
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AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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2017-01-24 17:09:34 +07:00
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>;
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};
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uart1_pins: pinmux_uart1 {
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pinctrl-single,pins = <
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2019-04-12 23:26:19 +07:00
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AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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2017-01-24 17:09:34 +07:00
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>;
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};
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uart2_pins: pinmux_uart2 {
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pinctrl-single,pins = <
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2019-04-12 23:26:19 +07:00
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_tx_clk.uart2_rxd */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rx_clk.uart2_txd */
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2017-01-24 17:09:34 +07:00
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>;
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};
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uart3_pins: pinmux_uart3 {
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pinctrl-single,pins = <
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2019-04-12 23:26:19 +07:00
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_rxd3.uart3_rxd */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rxd2.uart3_txd */
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2017-01-24 17:09:34 +07:00
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>;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart3_pins>;
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status = "okay";
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};
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/* USB */
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&cppi41dma {
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status = "okay";
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};
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&usb_ctrl_mod {
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status = "okay";
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};
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&usb {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&usb0_phy {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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dr_mode = "host";
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|
|
};
|
|
|
|
|
|
|
|
|
|
&usb1_phy {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|