2014-07-25 14:01:02 +07:00
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Xilinx Zynq Platforms Device Tree Bindings
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2011-06-21 00:47:27 +07:00
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2014-07-25 14:01:02 +07:00
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Boards with Zynq-7000 SOC based on an ARM Cortex A9 processor
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shall have the following properties.
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2011-06-21 00:47:27 +07:00
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Required root node properties:
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2014-07-25 14:01:02 +07:00
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- compatible = "xlnx,zynq-7000";
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2018-02-23 21:19:28 +07:00
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2018-01-17 20:25:16 +07:00
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Additional compatible strings:
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2018-07-12 11:10:23 +07:00
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- Adapteva Parallella board
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"adapteva,parallella"
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2018-07-12 11:10:22 +07:00
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- Digilent Zybo Z7 board
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"digilent,zynq-zybo-z7"
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2018-07-12 11:10:21 +07:00
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- Xilinx CC108 internal board
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2018-01-17 20:25:16 +07:00
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"xlnx,zynq-cc108"
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2018-07-12 11:10:21 +07:00
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- Xilinx ZC770 internal board, with different FMC cards
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2018-01-17 20:58:44 +07:00
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"xlnx,zynq-zc770-xm010"
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2018-01-17 21:07:46 +07:00
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"xlnx,zynq-zc770-xm011"
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2018-01-17 21:12:16 +07:00
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"xlnx,zynq-zc770-xm012"
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2018-01-17 21:15:42 +07:00
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"xlnx,zynq-zc770-xm013"
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2018-01-17 20:58:44 +07:00
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2018-02-23 21:19:28 +07:00
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---------------------------------------------------------------
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Xilinx Zynq UltraScale+ MPSoC Platforms Device Tree Bindings
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Boards with ZynqMP SOC based on an ARM Cortex A53 processor
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shall have the following properties.
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Required root node properties:
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- compatible = "xlnx,zynqmp";
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2016-01-07 16:27:27 +07:00
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Additional compatible strings:
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2018-01-19 19:11:01 +07:00
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- Xilinx internal board zc1232
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"xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232"
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- Xilinx internal board zc1254
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"xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254"
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- Xilinx internal board zc1275
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"xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275"
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2018-01-19 19:15:44 +07:00
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- Xilinx internal board zc1751
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"xlnx,zynqmp-zc1751"
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2016-01-07 16:27:27 +07:00
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- Xilinx 96boards compatible board zcu100
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"xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100"
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2018-01-18 21:52:47 +07:00
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- Xilinx evaluation board zcu102
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"xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102"
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"xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102"
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"xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102"
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2018-01-18 22:10:05 +07:00
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- Xilinx evaluation board zcu104
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"xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104"
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2018-01-18 22:34:51 +07:00
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- Xilinx evaluation board zcu106
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"xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106"
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2018-01-19 19:03:56 +07:00
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- Xilinx evaluation board zcu111
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"xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111"
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