2005-10-10 19:50:37 +07:00
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/*
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*
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* Common boot and setup code.
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*
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* Copyright (C) 2001 PPC64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#undef DEBUG
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/reboot.h>
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#include <linux/delay.h>
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#include <linux/initrd.h>
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#include <linux/ide.h>
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#include <linux/seq_file.h>
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#include <linux/ioport.h>
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#include <linux/console.h>
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#include <linux/utsname.h>
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#include <linux/tty.h>
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#include <linux/root_dev.h>
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#include <linux/notifier.h>
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#include <linux/cpu.h>
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#include <linux/unistd.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/processor.h>
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#include <asm/pgtable.h>
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#include <asm/smp.h>
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#include <asm/elf.h>
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#include <asm/machdep.h>
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#include <asm/paca.h>
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#include <asm/time.h>
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#include <asm/cputable.h>
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#include <asm/sections.h>
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#include <asm/btext.h>
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#include <asm/nvram.h>
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#include <asm/setup.h>
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#include <asm/system.h>
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#include <asm/rtas.h>
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#include <asm/iommu.h>
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#include <asm/serial.h>
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#include <asm/cache.h>
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#include <asm/page.h>
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#include <asm/mmu.h>
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#include <asm/lmb.h>
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2005-11-02 09:51:41 +07:00
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#include <asm/iseries/it_lp_naca.h>
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2005-10-10 19:50:37 +07:00
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#include <asm/firmware.h>
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2005-10-28 19:53:37 +07:00
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#include <asm/xmon.h>
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2005-11-07 05:49:43 +07:00
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#include <asm/udbg.h>
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2005-11-11 20:06:06 +07:00
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#include <asm/kexec.h>
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2005-10-10 19:50:37 +07:00
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2005-11-09 07:01:06 +07:00
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#include "setup.h"
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2005-10-10 19:50:37 +07:00
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#ifdef DEBUG
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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/*
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* Here are some early debugging facilities. You can enable one
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* but your kernel will not boot on anything else if you do so
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*/
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/* This one is for use on LPAR machines that support an HVC console
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* on vterm 0
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*/
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extern void udbg_init_debug_lpar(void);
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/* This one is for use on Apple G5 machines
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*/
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extern void udbg_init_pmac_realmode(void);
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/* That's RTAS panel debug */
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extern void call_rtas_display_status_delay(unsigned char c);
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/* Here's maple real mode debug */
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extern void udbg_init_maple_realmode(void);
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#define EARLY_DEBUG_INIT() do {} while(0)
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#if 0
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#define EARLY_DEBUG_INIT() udbg_init_debug_lpar()
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#define EARLY_DEBUG_INIT() udbg_init_maple_realmode()
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#define EARLY_DEBUG_INIT() udbg_init_pmac_realmode()
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#define EARLY_DEBUG_INIT() \
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do { udbg_putc = call_rtas_display_status_delay; } while(0)
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#endif
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int have_of = 1;
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int boot_cpuid = 0;
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int boot_cpuid_phys = 0;
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dev_t boot_dev;
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u64 ppc64_pft_size;
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2005-12-09 08:40:17 +07:00
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/* Pick defaults since we might want to patch instructions
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* before we've read this from the device tree.
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*/
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struct ppc64_caches ppc64_caches = {
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.dline_size = 0x80,
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.log_dline_size = 7,
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.iline_size = 0x80,
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.log_iline_size = 7
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};
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2005-10-10 19:50:37 +07:00
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EXPORT_SYMBOL_GPL(ppc64_caches);
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/*
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* These are used in binfmt_elf.c to put aux entries on the stack
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* for each elf executable being started.
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*/
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int dcache_bsize;
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int icache_bsize;
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int ucache_bsize;
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/* The main machine-dep calls structure
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*/
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struct machdep_calls ppc_md;
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EXPORT_SYMBOL(ppc_md);
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#ifdef CONFIG_MAGIC_SYSRQ
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unsigned long SYSRQ_KEY;
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#endif /* CONFIG_MAGIC_SYSRQ */
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static int ppc64_panic_event(struct notifier_block *, unsigned long, void *);
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static struct notifier_block ppc64_panic_block = {
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.notifier_call = ppc64_panic_event,
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.priority = INT_MIN /* may not return; must be done last */
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};
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#ifdef CONFIG_SMP
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static int smt_enabled_cmdline;
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/* Look for ibm,smt-enabled OF option */
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static void check_smt_enabled(void)
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{
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struct device_node *dn;
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char *smt_option;
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/* Allow the command line to overrule the OF option */
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if (smt_enabled_cmdline)
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return;
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dn = of_find_node_by_path("/options");
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if (dn) {
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smt_option = (char *)get_property(dn, "ibm,smt-enabled", NULL);
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if (smt_option) {
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if (!strcmp(smt_option, "on"))
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smt_enabled_at_boot = 1;
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else if (!strcmp(smt_option, "off"))
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smt_enabled_at_boot = 0;
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}
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}
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}
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/* Look for smt-enabled= cmdline option */
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static int __init early_smt_enabled(char *p)
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{
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smt_enabled_cmdline = 1;
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if (!p)
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return 0;
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if (!strcmp(p, "on") || !strcmp(p, "1"))
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smt_enabled_at_boot = 1;
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else if (!strcmp(p, "off") || !strcmp(p, "0"))
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smt_enabled_at_boot = 0;
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return 0;
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}
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early_param("smt-enabled", early_smt_enabled);
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2005-11-05 06:33:55 +07:00
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#else
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#define check_smt_enabled()
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2005-10-10 19:50:37 +07:00
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#endif /* CONFIG_SMP */
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extern struct machdep_calls pSeries_md;
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extern struct machdep_calls pmac_md;
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extern struct machdep_calls maple_md;
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2005-11-01 08:08:37 +07:00
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extern struct machdep_calls cell_md;
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2005-10-10 19:50:37 +07:00
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extern struct machdep_calls iseries_md;
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/* Ultimately, stuff them in an elf section like initcalls... */
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static struct machdep_calls __initdata *machines[] = {
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#ifdef CONFIG_PPC_PSERIES
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&pSeries_md,
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#endif /* CONFIG_PPC_PSERIES */
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#ifdef CONFIG_PPC_PMAC
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&pmac_md,
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#endif /* CONFIG_PPC_PMAC */
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#ifdef CONFIG_PPC_MAPLE
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&maple_md,
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#endif /* CONFIG_PPC_MAPLE */
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2005-11-01 08:08:37 +07:00
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#ifdef CONFIG_PPC_CELL
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&cell_md,
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2005-10-10 19:50:37 +07:00
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#endif
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#ifdef CONFIG_PPC_ISERIES
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&iseries_md,
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#endif
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NULL
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};
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/*
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* Early initialization entry point. This is called by head.S
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* with MMU translation disabled. We rely on the "feature" of
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* the CPU that ignores the top 2 bits of the address in real
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* mode so we can access kernel globals normally provided we
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* only toy with things in the RMO region. From here, we do
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* some early parsing of the device-tree to setup out LMB
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* data structures, and allocate & initialize the hash table
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* and segment tables so we can start running with translation
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* enabled.
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*
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* It is this function which will call the probe() callback of
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* the various platform types and copy the matching one to the
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* global ppc_md structure. Your platform can eventually do
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* some very early initializations from the probe() routine, but
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* this is not recommended, be very careful as, for example, the
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* device-tree is not accessible via normal means at this point.
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*/
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void __init early_setup(unsigned long dt_ptr)
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{
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struct paca_struct *lpaca = get_paca();
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static struct machdep_calls **mach;
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/*
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* Enable early debugging if any specified (see top of
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* this file)
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*/
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EARLY_DEBUG_INIT();
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DBG(" -> early_setup()\n");
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/*
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* Do early initializations using the flattened device
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* tree, like retreiving the physical memory map or
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* calculating/retreiving the hash table size
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*/
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early_init_devtree(__va(dt_ptr));
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/*
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* Iterate all ppc_md structures until we find the proper
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* one for the current machine type
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*/
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2005-11-10 09:37:51 +07:00
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DBG("Probing machine type for platform %x...\n", _machine);
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2005-10-10 19:50:37 +07:00
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for (mach = machines; *mach; mach++) {
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2005-11-10 09:37:51 +07:00
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if ((*mach)->probe(_machine))
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2005-10-10 19:50:37 +07:00
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break;
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}
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/* What can we do if we didn't find ? */
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if (*mach == NULL) {
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DBG("No suitable machine found !\n");
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for (;;);
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}
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ppc_md = **mach;
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DBG("Found, Initializing memory management...\n");
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/*
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2005-11-07 07:06:55 +07:00
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* Initialize the MMU Hash table and create the linear mapping
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* of memory. Has to be done before stab/slb initialization as
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* this is currently where the page size encoding is obtained
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2005-10-10 19:50:37 +07:00
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*/
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2005-11-07 07:06:55 +07:00
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htab_initialize();
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2005-10-10 19:50:37 +07:00
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/*
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2005-11-07 07:06:55 +07:00
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* Initialize stab / SLB management except on iSeries
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2005-10-10 19:50:37 +07:00
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*/
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2005-11-07 07:06:55 +07:00
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if (!firmware_has_feature(FW_FEATURE_ISERIES)) {
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if (cpu_has_feature(CPU_FTR_SLB))
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slb_initialize();
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else
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stab_initialize(lpaca->stab_real);
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}
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2005-10-10 19:50:37 +07:00
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DBG(" <- early_setup()\n");
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}
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2005-11-10 09:37:51 +07:00
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#ifdef CONFIG_SMP
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void early_setup_secondary(void)
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{
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struct paca_struct *lpaca = get_paca();
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/* Mark enabled in PACA */
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lpaca->proc_enabled = 0;
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/* Initialize hash table for that CPU */
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htab_initialize_secondary();
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/* Initialize STAB/SLB. We use a virtual address as it works
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* in real mode on pSeries and we want a virutal address on
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* iSeries anyway
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*/
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if (cpu_has_feature(CPU_FTR_SLB))
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slb_initialize();
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else
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stab_initialize(lpaca->stab_addr);
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}
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#endif /* CONFIG_SMP */
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2005-10-10 19:50:37 +07:00
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2005-11-04 08:09:42 +07:00
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#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
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void smp_release_cpus(void)
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{
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extern unsigned long __secondary_hold_spinloop;
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DBG(" -> smp_release_cpus()\n");
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/* All secondary cpus are spinning on a common spinloop, release them
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* all now so they can start to spin on their individual paca
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* spinloops. For non SMP kernels, the secondary cpus never get out
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* of the common spinloop.
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* This is useless but harmless on iSeries, secondaries are already
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* waiting on their paca spinloops. */
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__secondary_hold_spinloop = 1;
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mb();
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DBG(" <- smp_release_cpus()\n");
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}
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2005-11-05 06:33:55 +07:00
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#else
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#define smp_release_cpus()
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2005-11-04 08:09:42 +07:00
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#endif /* CONFIG_SMP || CONFIG_KEXEC */
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2005-10-10 19:50:37 +07:00
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/*
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2005-11-10 09:37:51 +07:00
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* Initialize some remaining members of the ppc64_caches and systemcfg
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* structures
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2005-10-10 19:50:37 +07:00
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* (at least until we get rid of them completely). This is mostly some
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* cache informations about the CPU that will be used by cache flush
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* routines and/or provided to userland
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*/
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static void __init initialize_cache_info(void)
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{
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struct device_node *np;
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unsigned long num_cpus = 0;
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DBG(" -> initialize_cache_info()\n");
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for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
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num_cpus += 1;
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/* We're assuming *all* of the CPUs have the same
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|
|
* d-cache and i-cache sizes... -Peter
|
|
|
|
*/
|
|
|
|
|
|
|
|
if ( num_cpus == 1 ) {
|
|
|
|
u32 *sizep, *lsizep;
|
|
|
|
u32 size, lsize;
|
|
|
|
const char *dc, *ic;
|
|
|
|
|
|
|
|
/* Then read cache informations */
|
2005-11-10 09:37:51 +07:00
|
|
|
if (_machine == PLATFORM_POWERMAC) {
|
2005-10-10 19:50:37 +07:00
|
|
|
dc = "d-cache-block-size";
|
|
|
|
ic = "i-cache-block-size";
|
|
|
|
} else {
|
|
|
|
dc = "d-cache-line-size";
|
|
|
|
ic = "i-cache-line-size";
|
|
|
|
}
|
|
|
|
|
|
|
|
size = 0;
|
|
|
|
lsize = cur_cpu_spec->dcache_bsize;
|
|
|
|
sizep = (u32 *)get_property(np, "d-cache-size", NULL);
|
|
|
|
if (sizep != NULL)
|
|
|
|
size = *sizep;
|
|
|
|
lsizep = (u32 *) get_property(np, dc, NULL);
|
|
|
|
if (lsizep != NULL)
|
|
|
|
lsize = *lsizep;
|
|
|
|
if (sizep == 0 || lsizep == 0)
|
|
|
|
DBG("Argh, can't find dcache properties ! "
|
|
|
|
"sizep: %p, lsizep: %p\n", sizep, lsizep);
|
|
|
|
|
2005-11-11 17:15:21 +07:00
|
|
|
ppc64_caches.dsize = size;
|
|
|
|
ppc64_caches.dline_size = lsize;
|
2005-10-10 19:50:37 +07:00
|
|
|
ppc64_caches.log_dline_size = __ilog2(lsize);
|
|
|
|
ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
|
|
|
|
|
|
|
|
size = 0;
|
|
|
|
lsize = cur_cpu_spec->icache_bsize;
|
|
|
|
sizep = (u32 *)get_property(np, "i-cache-size", NULL);
|
|
|
|
if (sizep != NULL)
|
|
|
|
size = *sizep;
|
|
|
|
lsizep = (u32 *)get_property(np, ic, NULL);
|
|
|
|
if (lsizep != NULL)
|
|
|
|
lsize = *lsizep;
|
|
|
|
if (sizep == 0 || lsizep == 0)
|
|
|
|
DBG("Argh, can't find icache properties ! "
|
|
|
|
"sizep: %p, lsizep: %p\n", sizep, lsizep);
|
|
|
|
|
2005-11-11 17:15:21 +07:00
|
|
|
ppc64_caches.isize = size;
|
|
|
|
ppc64_caches.iline_size = lsize;
|
2005-10-10 19:50:37 +07:00
|
|
|
ppc64_caches.log_iline_size = __ilog2(lsize);
|
|
|
|
ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
DBG(" <- initialize_cache_info()\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Do some initial setup of the system. The parameters are those which
|
|
|
|
* were passed in from the bootloader.
|
|
|
|
*/
|
|
|
|
void __init setup_system(void)
|
|
|
|
{
|
|
|
|
DBG(" -> setup_system()\n");
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Unflatten the device-tree passed by prom_init or kexec
|
|
|
|
*/
|
|
|
|
unflatten_device_tree();
|
|
|
|
|
2005-11-11 20:06:06 +07:00
|
|
|
#ifdef CONFIG_KEXEC
|
|
|
|
kexec_setup(); /* requires unflattened device tree. */
|
|
|
|
#endif
|
|
|
|
|
2005-10-10 19:50:37 +07:00
|
|
|
/*
|
|
|
|
* Fill the ppc64_caches & systemcfg structures with informations
|
|
|
|
* retreived from the device-tree. Need to be called before
|
|
|
|
* finish_device_tree() since the later requires some of the
|
|
|
|
* informations filled up here to properly parse the interrupt
|
|
|
|
* tree.
|
|
|
|
* It also sets up the cache line sizes which allows to call
|
|
|
|
* routines like flush_icache_range (used by the hash init
|
|
|
|
* later on).
|
|
|
|
*/
|
|
|
|
initialize_cache_info();
|
|
|
|
|
|
|
|
#ifdef CONFIG_PPC_RTAS
|
|
|
|
/*
|
|
|
|
* Initialize RTAS if available
|
|
|
|
*/
|
|
|
|
rtas_initialize();
|
|
|
|
#endif /* CONFIG_PPC_RTAS */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Check if we have an initrd provided via the device-tree
|
|
|
|
*/
|
|
|
|
check_for_initrd();
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Do some platform specific early initializations, that includes
|
|
|
|
* setting up the hash table pointers. It also sets up some interrupt-mapping
|
|
|
|
* related options that will be used by finish_device_tree()
|
|
|
|
*/
|
|
|
|
ppc_md.init_early();
|
|
|
|
|
|
|
|
/*
|
|
|
|
* "Finish" the device-tree, that is do the actual parsing of
|
|
|
|
* some of the properties like the interrupt map
|
|
|
|
*/
|
|
|
|
finish_device_tree();
|
|
|
|
|
2005-10-20 18:00:20 +07:00
|
|
|
#ifdef CONFIG_BOOTX_TEXT
|
|
|
|
init_boot_display();
|
|
|
|
#endif
|
|
|
|
|
2005-10-10 19:50:37 +07:00
|
|
|
/*
|
|
|
|
* Initialize xmon
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_XMON_DEFAULT
|
|
|
|
xmon_init(1);
|
|
|
|
#endif
|
|
|
|
/*
|
|
|
|
* Register early console
|
|
|
|
*/
|
|
|
|
register_early_udbg_console();
|
|
|
|
|
|
|
|
/* Save unparsed command line copy for /proc/cmdline */
|
|
|
|
strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
|
|
|
|
|
|
|
|
parse_early_param();
|
|
|
|
|
2005-11-05 06:33:55 +07:00
|
|
|
check_smt_enabled();
|
|
|
|
smp_setup_cpu_maps();
|
2005-10-10 19:50:37 +07:00
|
|
|
|
|
|
|
/* Release secondary cpus out of their spinloops at 0x60 now that
|
|
|
|
* we can map physical -> logical CPU ids
|
|
|
|
*/
|
|
|
|
smp_release_cpus();
|
|
|
|
|
|
|
|
printk("Starting Linux PPC64 %s\n", system_utsname.version);
|
|
|
|
|
|
|
|
printk("-----------------------------------------------------\n");
|
|
|
|
printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size);
|
2005-11-11 17:15:21 +07:00
|
|
|
printk("ppc64_interrupt_controller = 0x%ld\n",
|
|
|
|
ppc64_interrupt_controller);
|
|
|
|
printk("platform = 0x%x\n", _machine);
|
|
|
|
printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size());
|
2005-10-10 19:50:37 +07:00
|
|
|
printk("ppc64_caches.dcache_line_size = 0x%x\n",
|
2005-11-11 17:15:21 +07:00
|
|
|
ppc64_caches.dline_size);
|
2005-10-10 19:50:37 +07:00
|
|
|
printk("ppc64_caches.icache_line_size = 0x%x\n",
|
2005-11-11 17:15:21 +07:00
|
|
|
ppc64_caches.iline_size);
|
2005-10-10 19:50:37 +07:00
|
|
|
printk("htab_address = 0x%p\n", htab_address);
|
|
|
|
printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
|
|
|
|
printk("-----------------------------------------------------\n");
|
|
|
|
|
|
|
|
mm_init_ppc64();
|
|
|
|
|
|
|
|
DBG(" <- setup_system()\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ppc64_panic_event(struct notifier_block *this,
|
|
|
|
unsigned long event, void *ptr)
|
|
|
|
{
|
|
|
|
ppc_md.panic((char *)ptr); /* May not return */
|
|
|
|
return NOTIFY_DONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_IRQSTACKS
|
|
|
|
static void __init irqstack_early_init(void)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* interrupt stacks must be under 256MB, we cannot afford to take
|
|
|
|
* SLB misses on them.
|
|
|
|
*/
|
|
|
|
for_each_cpu(i) {
|
2005-11-07 07:06:55 +07:00
|
|
|
softirq_ctx[i] = (struct thread_info *)
|
|
|
|
__va(lmb_alloc_base(THREAD_SIZE,
|
|
|
|
THREAD_SIZE, 0x10000000));
|
|
|
|
hardirq_ctx[i] = (struct thread_info *)
|
|
|
|
__va(lmb_alloc_base(THREAD_SIZE,
|
|
|
|
THREAD_SIZE, 0x10000000));
|
2005-10-10 19:50:37 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
#define irqstack_early_init()
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Stack space used when we detect a bad kernel stack pointer, and
|
|
|
|
* early in SMP boots before relocation is enabled.
|
|
|
|
*/
|
|
|
|
static void __init emergency_stack_init(void)
|
|
|
|
{
|
|
|
|
unsigned long limit;
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Emergency stacks must be under 256MB, we cannot afford to take
|
|
|
|
* SLB misses on them. The ABI also requires them to be 128-byte
|
|
|
|
* aligned.
|
|
|
|
*
|
|
|
|
* Since we use these as temporary stacks during secondary CPU
|
|
|
|
* bringup, we need to get at them in real mode. This means they
|
|
|
|
* must also be within the RMO region.
|
|
|
|
*/
|
|
|
|
limit = min(0x10000000UL, lmb.rmo_size);
|
|
|
|
|
|
|
|
for_each_cpu(i)
|
2005-11-07 07:06:55 +07:00
|
|
|
paca[i].emergency_sp =
|
|
|
|
__va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE;
|
2005-10-10 19:50:37 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Called into from start_kernel, after lock_kernel has been called.
|
|
|
|
* Initializes bootmem, which is unsed to manage page allocation until
|
|
|
|
* mem_init is called.
|
|
|
|
*/
|
|
|
|
void __init setup_arch(char **cmdline_p)
|
|
|
|
{
|
|
|
|
extern void do_init_bootmem(void);
|
|
|
|
|
|
|
|
ppc64_boot_msg(0x12, "Setup Arch");
|
|
|
|
|
|
|
|
*cmdline_p = cmd_line;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set cache line size based on type of cpu as a default.
|
|
|
|
* Systems with OF can look in the properties on the cpu node(s)
|
|
|
|
* for a possibly more accurate value.
|
|
|
|
*/
|
|
|
|
dcache_bsize = ppc64_caches.dline_size;
|
|
|
|
icache_bsize = ppc64_caches.iline_size;
|
|
|
|
|
|
|
|
/* reboot on panic */
|
|
|
|
panic_timeout = 180;
|
|
|
|
|
|
|
|
if (ppc_md.panic)
|
|
|
|
notifier_chain_register(&panic_notifier_list, &ppc64_panic_block);
|
|
|
|
|
|
|
|
init_mm.start_code = PAGE_OFFSET;
|
|
|
|
init_mm.end_code = (unsigned long) _etext;
|
|
|
|
init_mm.end_data = (unsigned long) _edata;
|
|
|
|
init_mm.brk = klimit;
|
|
|
|
|
|
|
|
irqstack_early_init();
|
|
|
|
emergency_stack_init();
|
|
|
|
|
|
|
|
stabs_alloc();
|
|
|
|
|
|
|
|
/* set up the bootmem stuff with available memory */
|
|
|
|
do_init_bootmem();
|
|
|
|
sparse_init();
|
|
|
|
|
2005-10-20 18:00:20 +07:00
|
|
|
#ifdef CONFIG_DUMMY_CONSOLE
|
|
|
|
conswitchp = &dummy_con;
|
|
|
|
#endif
|
|
|
|
|
2005-10-10 19:50:37 +07:00
|
|
|
ppc_md.setup_arch();
|
|
|
|
|
|
|
|
/* Use the default idle loop if the platform hasn't provided one. */
|
|
|
|
if (NULL == ppc_md.idle_loop) {
|
|
|
|
ppc_md.idle_loop = default_idle;
|
|
|
|
printk(KERN_INFO "Using default idle loop\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
paging_init();
|
|
|
|
ppc64_boot_msg(0x15, "Setup Done");
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* ToDo: do something useful if ppc_md is not yet setup. */
|
|
|
|
#define PPC64_LINUX_FUNCTION 0x0f000000
|
|
|
|
#define PPC64_IPL_MESSAGE 0xc0000000
|
|
|
|
#define PPC64_TERM_MESSAGE 0xb0000000
|
|
|
|
|
|
|
|
static void ppc64_do_msg(unsigned int src, const char *msg)
|
|
|
|
{
|
|
|
|
if (ppc_md.progress) {
|
|
|
|
char buf[128];
|
|
|
|
|
|
|
|
sprintf(buf, "%08X\n", src);
|
|
|
|
ppc_md.progress(buf, 0);
|
|
|
|
snprintf(buf, 128, "%s", msg);
|
|
|
|
ppc_md.progress(buf, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Print a boot progress message. */
|
|
|
|
void ppc64_boot_msg(unsigned int src, const char *msg)
|
|
|
|
{
|
|
|
|
ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
|
|
|
|
printk("[boot]%04x %s\n", src, msg);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Print a termination message (print only -- does not stop the kernel) */
|
|
|
|
void ppc64_terminate_msg(unsigned int src, const char *msg)
|
|
|
|
{
|
|
|
|
ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
|
|
|
|
printk("[terminate]%04x %s\n", src, msg);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef CONFIG_PPC_ISERIES
|
|
|
|
/*
|
|
|
|
* This function can be used by platforms to "find" legacy serial ports.
|
|
|
|
* It works for "serial" nodes under an "isa" node, and will try to
|
|
|
|
* respect the "ibm,aix-loc" property if any. It works with up to 8
|
|
|
|
* ports.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define MAX_LEGACY_SERIAL_PORTS 8
|
|
|
|
static struct plat_serial8250_port serial_ports[MAX_LEGACY_SERIAL_PORTS+1];
|
|
|
|
static unsigned int old_serial_count;
|
|
|
|
|
|
|
|
void __init generic_find_legacy_serial_ports(u64 *physport,
|
|
|
|
unsigned int *default_speed)
|
|
|
|
{
|
|
|
|
struct device_node *np;
|
|
|
|
u32 *sizeprop;
|
|
|
|
|
|
|
|
struct isa_reg_property {
|
|
|
|
u32 space;
|
|
|
|
u32 address;
|
|
|
|
u32 size;
|
|
|
|
};
|
|
|
|
struct pci_reg_property {
|
|
|
|
struct pci_address addr;
|
|
|
|
u32 size_hi;
|
|
|
|
u32 size_lo;
|
|
|
|
};
|
|
|
|
|
|
|
|
DBG(" -> generic_find_legacy_serial_port()\n");
|
|
|
|
|
|
|
|
*physport = 0;
|
|
|
|
if (default_speed)
|
|
|
|
*default_speed = 0;
|
|
|
|
|
|
|
|
np = of_find_node_by_path("/");
|
|
|
|
if (!np)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* First fill our array */
|
|
|
|
for (np = NULL; (np = of_find_node_by_type(np, "serial"));) {
|
|
|
|
struct device_node *isa, *pci;
|
|
|
|
struct isa_reg_property *reg;
|
|
|
|
unsigned long phys_size, addr_size, io_base;
|
|
|
|
u32 *rangesp;
|
|
|
|
u32 *interrupts, *clk, *spd;
|
|
|
|
char *typep;
|
|
|
|
int index, rlen, rentsize;
|
|
|
|
|
|
|
|
/* Ok, first check if it's under an "isa" parent */
|
|
|
|
isa = of_get_parent(np);
|
|
|
|
if (!isa || strcmp(isa->name, "isa")) {
|
|
|
|
DBG("%s: no isa parent found\n", np->full_name);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Now look for an "ibm,aix-loc" property that gives us ordering
|
|
|
|
* if any...
|
|
|
|
*/
|
|
|
|
typep = (char *)get_property(np, "ibm,aix-loc", NULL);
|
|
|
|
|
|
|
|
/* Get the ISA port number */
|
|
|
|
reg = (struct isa_reg_property *)get_property(np, "reg", NULL);
|
|
|
|
if (reg == NULL)
|
|
|
|
goto next_port;
|
|
|
|
/* We assume the interrupt number isn't translated ... */
|
|
|
|
interrupts = (u32 *)get_property(np, "interrupts", NULL);
|
|
|
|
/* get clock freq. if present */
|
|
|
|
clk = (u32 *)get_property(np, "clock-frequency", NULL);
|
|
|
|
/* get default speed if present */
|
|
|
|
spd = (u32 *)get_property(np, "current-speed", NULL);
|
|
|
|
/* Default to locate at end of array */
|
|
|
|
index = old_serial_count; /* end of the array by default */
|
|
|
|
|
|
|
|
/* If we have a location index, then use it */
|
|
|
|
if (typep && *typep == 'S') {
|
|
|
|
index = simple_strtol(typep+1, NULL, 0) - 1;
|
|
|
|
/* if index is out of range, use end of array instead */
|
|
|
|
if (index >= MAX_LEGACY_SERIAL_PORTS)
|
|
|
|
index = old_serial_count;
|
|
|
|
/* if our index is still out of range, that mean that
|
|
|
|
* array is full, we could scan for a free slot but that
|
|
|
|
* make little sense to bother, just skip the port
|
|
|
|
*/
|
|
|
|
if (index >= MAX_LEGACY_SERIAL_PORTS)
|
|
|
|
goto next_port;
|
|
|
|
if (index >= old_serial_count)
|
|
|
|
old_serial_count = index + 1;
|
|
|
|
/* Check if there is a port who already claimed our slot */
|
|
|
|
if (serial_ports[index].iobase != 0) {
|
|
|
|
/* if we still have some room, move it, else override */
|
|
|
|
if (old_serial_count < MAX_LEGACY_SERIAL_PORTS) {
|
|
|
|
DBG("Moved legacy port %d -> %d\n", index,
|
|
|
|
old_serial_count);
|
|
|
|
serial_ports[old_serial_count++] =
|
|
|
|
serial_ports[index];
|
|
|
|
} else {
|
|
|
|
DBG("Replacing legacy port %d\n", index);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (index >= MAX_LEGACY_SERIAL_PORTS)
|
|
|
|
goto next_port;
|
|
|
|
if (index >= old_serial_count)
|
|
|
|
old_serial_count = index + 1;
|
|
|
|
|
|
|
|
/* Now fill the entry */
|
|
|
|
memset(&serial_ports[index], 0, sizeof(struct plat_serial8250_port));
|
|
|
|
serial_ports[index].uartclk = clk ? *clk : BASE_BAUD * 16;
|
|
|
|
serial_ports[index].iobase = reg->address;
|
|
|
|
serial_ports[index].irq = interrupts ? interrupts[0] : 0;
|
|
|
|
serial_ports[index].flags = ASYNC_BOOT_AUTOCONF;
|
|
|
|
|
|
|
|
DBG("Added legacy port, index: %d, port: %x, irq: %d, clk: %d\n",
|
|
|
|
index,
|
|
|
|
serial_ports[index].iobase,
|
|
|
|
serial_ports[index].irq,
|
|
|
|
serial_ports[index].uartclk);
|
|
|
|
|
|
|
|
/* Get phys address of IO reg for port 1 */
|
|
|
|
if (index != 0)
|
|
|
|
goto next_port;
|
|
|
|
|
|
|
|
pci = of_get_parent(isa);
|
|
|
|
if (!pci) {
|
|
|
|
DBG("%s: no pci parent found\n", np->full_name);
|
|
|
|
goto next_port;
|
|
|
|
}
|
|
|
|
|
|
|
|
rangesp = (u32 *)get_property(pci, "ranges", &rlen);
|
|
|
|
if (rangesp == NULL) {
|
|
|
|
of_node_put(pci);
|
|
|
|
goto next_port;
|
|
|
|
}
|
|
|
|
rlen /= 4;
|
|
|
|
|
|
|
|
/* we need the #size-cells of the PCI bridge node itself */
|
|
|
|
phys_size = 1;
|
|
|
|
sizeprop = (u32 *)get_property(pci, "#size-cells", NULL);
|
|
|
|
if (sizeprop != NULL)
|
|
|
|
phys_size = *sizeprop;
|
|
|
|
/* we need the parent #addr-cells */
|
|
|
|
addr_size = prom_n_addr_cells(pci);
|
|
|
|
rentsize = 3 + addr_size + phys_size;
|
|
|
|
io_base = 0;
|
|
|
|
for (;rlen >= rentsize; rlen -= rentsize,rangesp += rentsize) {
|
|
|
|
if (((rangesp[0] >> 24) & 0x3) != 1)
|
|
|
|
continue; /* not IO space */
|
|
|
|
io_base = rangesp[3];
|
|
|
|
if (addr_size == 2)
|
|
|
|
io_base = (io_base << 32) | rangesp[4];
|
|
|
|
}
|
|
|
|
if (io_base != 0) {
|
|
|
|
*physport = io_base + reg->address;
|
|
|
|
if (default_speed && spd)
|
|
|
|
*default_speed = *spd;
|
|
|
|
}
|
|
|
|
of_node_put(pci);
|
|
|
|
next_port:
|
|
|
|
of_node_put(isa);
|
|
|
|
}
|
|
|
|
|
|
|
|
DBG(" <- generic_find_legacy_serial_port()\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_device serial_device = {
|
|
|
|
.name = "serial8250",
|
|
|
|
.id = PLAT8250_DEV_PLATFORM,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = serial_ports,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init serial_dev_init(void)
|
|
|
|
{
|
|
|
|
return platform_device_register(&serial_device);
|
|
|
|
}
|
|
|
|
arch_initcall(serial_dev_init);
|
|
|
|
|
|
|
|
#endif /* CONFIG_PPC_ISERIES */
|
|
|
|
|
|
|
|
int check_legacy_ioport(unsigned long base_port)
|
|
|
|
{
|
|
|
|
if (ppc_md.check_legacy_ioport == NULL)
|
|
|
|
return 0;
|
|
|
|
return ppc_md.check_legacy_ioport(base_port);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(check_legacy_ioport);
|
|
|
|
|
|
|
|
void cpu_die(void)
|
|
|
|
{
|
|
|
|
if (ppc_md.cpu_die)
|
|
|
|
ppc_md.cpu_die();
|
|
|
|
}
|