2006-09-16 05:42:24 +07:00
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/* linux/arch/arm/mach-s3c2410/dma.c
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2005-04-17 05:20:36 +07:00
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*
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2007-02-12 00:31:01 +07:00
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* Copyright (c) 2006 Simtec Electronics
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2005-04-17 05:20:36 +07:00
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* Ben Dooks <ben@simtec.co.uk>
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*
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2007-02-12 00:31:01 +07:00
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* S3C2410 DMA selection
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2005-04-17 05:20:36 +07:00
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*
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2006-09-16 05:42:24 +07:00
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* http://armlinux.simtec.co.uk/
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2005-04-17 05:20:36 +07:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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2006-09-16 05:42:24 +07:00
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*/
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2005-04-17 05:20:36 +07:00
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2007-02-12 00:31:01 +07:00
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#include <linux/kernel.h>
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2005-04-17 05:20:36 +07:00
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#include <linux/init.h>
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2011-12-22 07:01:38 +07:00
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#include <linux/device.h>
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2007-02-12 00:31:01 +07:00
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#include <linux/serial_core.h>
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2005-04-17 05:20:36 +07:00
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2009-03-19 22:02:38 +07:00
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#include <mach/map.h>
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2008-08-05 22:14:15 +07:00
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#include <mach/dma.h>
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2007-02-12 00:31:01 +07:00
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2008-10-08 04:26:09 +07:00
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#include <plat/cpu.h>
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2010-02-21 06:01:33 +07:00
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#include <plat/dma-s3c24xx.h>
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2007-02-12 00:31:01 +07:00
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2008-10-08 04:26:09 +07:00
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#include <plat/regs-serial.h>
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2008-08-05 22:14:15 +07:00
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#include <mach/regs-gpio.h>
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2008-10-30 17:14:36 +07:00
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#include <plat/regs-ac97.h>
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2009-03-19 22:02:35 +07:00
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#include <plat/regs-dma.h>
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2008-08-05 22:14:15 +07:00
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#include <mach/regs-mem.h>
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#include <mach/regs-lcd.h>
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#include <mach/regs-sdi.h>
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2009-03-04 07:49:26 +07:00
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#include <plat/regs-iis.h>
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2008-10-30 17:14:38 +07:00
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#include <plat/regs-spi.h>
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2007-02-12 00:31:01 +07:00
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static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
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[DMACH_XD0] = {
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.name = "xdreq0",
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.channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
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},
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[DMACH_XD1] = {
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.name = "xdreq1",
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.channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
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},
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[DMACH_SDI] = {
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.name = "sdi",
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.channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
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.channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
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.channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
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},
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[DMACH_SPI0] = {
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.name = "spi0",
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.channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
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},
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[DMACH_SPI1] = {
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.name = "spi1",
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.channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
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},
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[DMACH_UART0] = {
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.name = "uart0",
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.channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
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},
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[DMACH_UART1] = {
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.name = "uart1",
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.channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
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},
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[DMACH_UART2] = {
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.name = "uart2",
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.channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
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},
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[DMACH_TIMER] = {
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.name = "timer",
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.channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
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.channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
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.channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
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},
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[DMACH_I2S_IN] = {
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.name = "i2s-sdi",
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.channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
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.channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
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},
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[DMACH_I2S_OUT] = {
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.name = "i2s-sdo",
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.channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
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},
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[DMACH_USB_EP1] = {
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.name = "usb-ep1",
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.channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
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},
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[DMACH_USB_EP2] = {
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.name = "usb-ep2",
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.channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
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},
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[DMACH_USB_EP3] = {
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.name = "usb-ep3",
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.channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
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},
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[DMACH_USB_EP4] = {
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.name = "usb-ep4",
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.channels[3] =S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
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},
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2005-04-17 05:20:36 +07:00
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};
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2007-02-12 00:31:01 +07:00
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static void s3c2410_dma_select(struct s3c2410_dma_chan *chan,
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struct s3c24xx_dma_map *map)
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{
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chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
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2005-04-17 05:20:36 +07:00
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}
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2007-02-12 00:31:01 +07:00
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static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel = {
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.select = s3c2410_dma_select,
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.dcon_mask = 7 << 24,
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.map = s3c2410_dma_mappings,
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.map_size = ARRAY_SIZE(s3c2410_dma_mappings),
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};
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2005-04-17 05:20:36 +07:00
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2007-02-13 19:12:16 +07:00
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static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
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.channels = {
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[DMACH_SDI] = {
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.list = {
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[0] = 3 | DMA_CH_VALID,
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[1] = 2 | DMA_CH_VALID,
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[2] = 0 | DMA_CH_VALID,
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},
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},
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[DMACH_I2S_IN] = {
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.list = {
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[0] = 1 | DMA_CH_VALID,
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[1] = 2 | DMA_CH_VALID,
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},
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},
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},
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};
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2012-01-27 13:35:25 +07:00
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static int __init s3c2410_dma_add(struct device *dev,
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struct subsys_interface *sif)
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{
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2007-02-17 21:37:14 +07:00
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s3c2410_dma_init();
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2007-02-13 19:12:16 +07:00
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s3c24xx_dma_order_set(&s3c2410_dma_order);
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2007-02-12 00:31:01 +07:00
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return s3c24xx_dma_init_map(&s3c2410_dma_sel);
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2005-04-17 05:20:36 +07:00
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}
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2007-02-12 00:31:01 +07:00
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#if defined(CONFIG_CPU_S3C2410)
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2011-12-22 07:01:38 +07:00
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static struct subsys_interface s3c2410_dma_interface = {
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.name = "s3c2410_dma",
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.subsys = &s3c2410_subsys,
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.add_dev = s3c2410_dma_add,
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2007-02-12 00:31:01 +07:00
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};
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2005-04-17 05:20:36 +07:00
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2007-02-17 21:37:14 +07:00
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static int __init s3c2410_dma_drvinit(void)
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2006-08-18 21:32:10 +07:00
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{
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2012-01-27 13:35:25 +07:00
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return subsys_interface_register(&s3c2410_dma_interface);
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2006-08-18 21:32:10 +07:00
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}
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2007-02-17 21:37:14 +07:00
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arch_initcall(s3c2410_dma_drvinit);
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2009-07-31 05:23:38 +07:00
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2011-12-22 07:01:38 +07:00
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static struct subsys_interface s3c2410a_dma_interface = {
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.name = "s3c2410a_dma",
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.subsys = &s3c2410a_subsys,
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.add_dev = s3c2410_dma_add,
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2009-07-31 05:23:38 +07:00
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};
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static int __init s3c2410a_dma_drvinit(void)
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{
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2011-12-22 07:01:38 +07:00
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return subsys_interface_register(&s3c2410a_dma_interface);
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2009-07-31 05:23:38 +07:00
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}
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arch_initcall(s3c2410a_dma_drvinit);
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2006-08-18 21:32:10 +07:00
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#endif
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2007-02-12 00:31:01 +07:00
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#if defined(CONFIG_CPU_S3C2442)
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/* S3C2442 DMA contains the same selection table as the S3C2410 */
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2011-12-22 07:01:38 +07:00
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static struct subsys_interface s3c2442_dma_interface = {
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.name = "s3c2442_dma",
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.subsys = &s3c2442_subsys,
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.add_dev = s3c2410_dma_add,
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2005-04-17 05:20:36 +07:00
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};
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2007-02-17 21:37:14 +07:00
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static int __init s3c2442_dma_drvinit(void)
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2006-09-16 05:42:24 +07:00
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{
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2011-12-22 07:01:38 +07:00
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return subsys_interface_register(&s3c2442_dma_interface);
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2006-09-16 05:42:24 +07:00
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}
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2007-02-17 21:37:14 +07:00
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arch_initcall(s3c2442_dma_drvinit);
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2007-02-12 00:31:01 +07:00
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#endif
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2006-09-16 05:42:24 +07:00
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