2012-03-19 03:17:53 +07:00
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/*
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net: netcp: ale: update to support unknown vlan controls for NU switch
In NU Ethernet switch used on some of the Keystone SoCs, there is
separate UNKNOWNVLAN register for membership, unreg mcast flood, reg
mcast flood and force untag egress bits in ALE. So control for these
fields require different address offset, shift and size of field.
As this ALE has the same version number as ALE in CPSW found on other
SoCs, customization based on version number is not possible. So
use a configuration parameter, nu_switch_ale, to identify the ALE
ALE found in NU Switch. Different treatment is needed for NU Switch
ALE due to difference in the ale table bits, separate unknown vlan
registers etc. The register information available in ale_controls,
needs to be updated to support the netcp NU switch h/w. So it is not
constant array any more since it needs to be updated based
on ALE type. The header of the file is also updated to indicate it
supports N port switch ALE, not just 3 port. The version mask is
3 bits in NU Switch ALE vs 8 bits on other ALE types.
While at it, change the debug print to info print so that ALE
version gets displayed in boot log.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-01-07 03:37:44 +07:00
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* Texas Instruments N-Port Ethernet Switch Address Lookup Engine APIs
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2012-03-19 03:17:53 +07:00
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*
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* Copyright (C) 2012 Texas Instruments
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __TI_CPSW_ALE_H__
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#define __TI_CPSW_ALE_H__
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struct cpsw_ale_params {
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struct device *dev;
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void __iomem *ale_regs;
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unsigned long ale_ageout; /* in secs */
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unsigned long ale_entries;
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unsigned long ale_ports;
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net: netcp: ale: update to support unknown vlan controls for NU switch
In NU Ethernet switch used on some of the Keystone SoCs, there is
separate UNKNOWNVLAN register for membership, unreg mcast flood, reg
mcast flood and force untag egress bits in ALE. So control for these
fields require different address offset, shift and size of field.
As this ALE has the same version number as ALE in CPSW found on other
SoCs, customization based on version number is not possible. So
use a configuration parameter, nu_switch_ale, to identify the ALE
ALE found in NU Switch. Different treatment is needed for NU Switch
ALE due to difference in the ale table bits, separate unknown vlan
registers etc. The register information available in ale_controls,
needs to be updated to support the netcp NU switch h/w. So it is not
constant array any more since it needs to be updated based
on ALE type. The header of the file is also updated to indicate it
supports N port switch ALE, not just 3 port. The version mask is
3 bits in NU Switch ALE vs 8 bits on other ALE types.
While at it, change the debug print to info print so that ALE
version gets displayed in boot log.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-01-07 03:37:44 +07:00
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/* NU Switch has specific handling as number of bits in ALE entries
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* are different than other versions of ALE. Also there are specific
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* registers for unknown vlan specific fields. So use nu_switch_ale
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* to identify this hardware.
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*/
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bool nu_switch_ale;
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/* mask bit used in NU Switch ALE is 3 bits instead of 8 bits. So
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* pass it from caller.
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*/
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u32 major_ver_mask;
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2012-03-19 03:17:53 +07:00
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};
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struct cpsw_ale {
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struct cpsw_ale_params params;
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struct timer_list timer;
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unsigned long ageout;
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2014-11-01 00:38:52 +07:00
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int allmulti;
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net: netcp: ale: update to support unknown vlan controls for NU switch
In NU Ethernet switch used on some of the Keystone SoCs, there is
separate UNKNOWNVLAN register for membership, unreg mcast flood, reg
mcast flood and force untag egress bits in ALE. So control for these
fields require different address offset, shift and size of field.
As this ALE has the same version number as ALE in CPSW found on other
SoCs, customization based on version number is not possible. So
use a configuration parameter, nu_switch_ale, to identify the ALE
ALE found in NU Switch. Different treatment is needed for NU Switch
ALE due to difference in the ale table bits, separate unknown vlan
registers etc. The register information available in ale_controls,
needs to be updated to support the netcp NU switch h/w. So it is not
constant array any more since it needs to be updated based
on ALE type. The header of the file is also updated to indicate it
supports N port switch ALE, not just 3 port. The version mask is
3 bits in NU Switch ALE vs 8 bits on other ALE types.
While at it, change the debug print to info print so that ALE
version gets displayed in boot log.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-01-07 03:37:44 +07:00
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u32 version;
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2017-01-07 03:37:46 +07:00
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/* These bits are different on NetCP NU Switch ALE */
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u32 port_mask_bits;
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u32 port_num_bits;
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u32 vlan_field_bits;
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2012-03-19 03:17:53 +07:00
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};
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enum cpsw_ale_control {
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/* global */
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ALE_ENABLE,
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ALE_CLEAR,
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ALE_AGEOUT,
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2014-01-23 01:33:12 +07:00
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ALE_P0_UNI_FLOOD,
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2012-03-19 03:17:53 +07:00
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ALE_VLAN_NOLEARN,
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ALE_NO_PORT_VLAN,
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ALE_OUI_DENY,
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ALE_BYPASS,
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ALE_RATE_LIMIT_TX,
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ALE_VLAN_AWARE,
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ALE_AUTH_ENABLE,
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ALE_RATE_LIMIT,
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/* port controls */
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ALE_PORT_STATE,
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ALE_PORT_DROP_UNTAGGED,
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ALE_PORT_DROP_UNKNOWN_VLAN,
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ALE_PORT_NOLEARN,
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2014-01-23 01:33:12 +07:00
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ALE_PORT_NO_SA_UPDATE,
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2012-03-19 03:17:53 +07:00
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ALE_PORT_UNKNOWN_VLAN_MEMBER,
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ALE_PORT_UNKNOWN_MCAST_FLOOD,
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ALE_PORT_UNKNOWN_REG_MCAST_FLOOD,
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ALE_PORT_UNTAGGED_EGRESS,
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ALE_PORT_BCAST_LIMIT,
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ALE_PORT_MCAST_LIMIT,
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ALE_NUM_CONTROLS,
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};
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enum cpsw_ale_port_state {
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ALE_PORT_STATE_DISABLE = 0x00,
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ALE_PORT_STATE_BLOCK = 0x01,
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ALE_PORT_STATE_LEARN = 0x02,
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ALE_PORT_STATE_FORWARD = 0x03,
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};
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/* ALE unicast entry flags - passed into cpsw_ale_add_ucast() */
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2013-02-05 15:26:47 +07:00
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#define ALE_SECURE BIT(0)
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#define ALE_BLOCKED BIT(1)
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#define ALE_SUPER BIT(2)
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#define ALE_VLAN BIT(3)
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2012-03-19 03:17:53 +07:00
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2013-02-05 15:26:48 +07:00
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#define ALE_PORT_HOST BIT(0)
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#define ALE_PORT_1 BIT(1)
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#define ALE_PORT_2 BIT(2)
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2012-03-19 03:17:53 +07:00
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#define ALE_MCAST_FWD 0
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#define ALE_MCAST_BLOCK_LEARN_FWD 1
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#define ALE_MCAST_FWD_LEARN 2
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#define ALE_MCAST_FWD_2 3
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2014-07-23 00:55:07 +07:00
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#define ALE_ENTRY_BITS 68
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#define ALE_ENTRY_WORDS DIV_ROUND_UP(ALE_ENTRY_BITS, 32)
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2012-03-19 03:17:53 +07:00
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struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params);
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void cpsw_ale_start(struct cpsw_ale *ale);
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void cpsw_ale_stop(struct cpsw_ale *ale);
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2015-01-13 19:05:49 +07:00
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int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask, int vid);
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2013-02-05 15:26:47 +07:00
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int cpsw_ale_add_ucast(struct cpsw_ale *ale, u8 *addr, int port,
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int flags, u16 vid);
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int cpsw_ale_del_ucast(struct cpsw_ale *ale, u8 *addr, int port,
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int flags, u16 vid);
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2012-03-19 03:17:53 +07:00
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int cpsw_ale_add_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
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2013-02-05 15:26:47 +07:00
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int flags, u16 vid, int mcast_state);
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int cpsw_ale_del_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
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int flags, u16 vid);
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int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag,
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int reg_mcast, int unreg_mcast);
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int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port);
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2014-11-01 00:38:52 +07:00
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void cpsw_ale_set_allmulti(struct cpsw_ale *ale, int allmulti);
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2012-03-19 03:17:53 +07:00
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int cpsw_ale_control_get(struct cpsw_ale *ale, int port, int control);
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int cpsw_ale_control_set(struct cpsw_ale *ale, int port,
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int control, int value);
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2014-07-23 00:55:07 +07:00
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void cpsw_ale_dump(struct cpsw_ale *ale, u32 *data);
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2012-03-19 03:17:53 +07:00
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#endif
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