2019-05-28 23:57:06 +07:00
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// SPDX-License-Identifier: GPL-2.0-only
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2011-11-02 15:40:02 +07:00
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/*
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* AD5421 Digital to analog converters driver
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*
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* Copyright 2011 Analog Devices Inc.
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*/
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/spi/spi.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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2012-04-25 21:54:58 +07:00
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/events.h>
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2012-06-04 16:36:28 +07:00
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#include <linux/iio/dac/ad5421.h>
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2011-11-02 15:40:02 +07:00
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#define AD5421_REG_DAC_DATA 0x1
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#define AD5421_REG_CTRL 0x2
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#define AD5421_REG_OFFSET 0x3
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#define AD5421_REG_GAIN 0x4
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/* load dac and fault shared the same register number. Writing to it will cause
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* a dac load command, reading from it will return the fault status register */
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#define AD5421_REG_LOAD_DAC 0x5
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#define AD5421_REG_FAULT 0x5
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#define AD5421_REG_FORCE_ALARM_CURRENT 0x6
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#define AD5421_REG_RESET 0x7
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#define AD5421_REG_START_CONVERSION 0x8
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#define AD5421_REG_NOOP 0x9
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#define AD5421_CTRL_WATCHDOG_DISABLE BIT(12)
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#define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11)
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#define AD5421_CTRL_MIN_CURRENT BIT(9)
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#define AD5421_CTRL_ADC_SOURCE_TEMP BIT(8)
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#define AD5421_CTRL_ADC_ENABLE BIT(7)
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#define AD5421_CTRL_PWR_DOWN_INT_VREF BIT(6)
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#define AD5421_FAULT_SPI BIT(15)
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#define AD5421_FAULT_PEC BIT(14)
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#define AD5421_FAULT_OVER_CURRENT BIT(13)
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#define AD5421_FAULT_UNDER_CURRENT BIT(12)
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#define AD5421_FAULT_TEMP_OVER_140 BIT(11)
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#define AD5421_FAULT_TEMP_OVER_100 BIT(10)
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#define AD5421_FAULT_UNDER_VOLTAGE_6V BIT(9)
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#define AD5421_FAULT_UNDER_VOLTAGE_12V BIT(8)
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/* These bits will cause the fault pin to go high */
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#define AD5421_FAULT_TRIGGER_IRQ \
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(AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
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AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
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/**
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* struct ad5421_state - driver instance specific data
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* @spi: spi_device
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* @ctrl: control register cache
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* @current_range: current range which the device is configured for
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* @data: spi transfer buffers
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* @fault_mask: software masking of events
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*/
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struct ad5421_state {
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struct spi_device *spi;
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unsigned int ctrl;
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enum ad5421_current_range current_range;
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unsigned int fault_mask;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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*/
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union {
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2013-11-25 19:41:00 +07:00
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__be32 d32;
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2011-11-02 15:40:02 +07:00
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u8 d8[4];
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} data[2] ____cacheline_aligned;
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};
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2013-10-07 21:11:00 +07:00
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static const struct iio_event_spec ad5421_current_event[] = {
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{
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.type = IIO_EV_TYPE_THRESH,
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.dir = IIO_EV_DIR_RISING,
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.mask_separate = BIT(IIO_EV_INFO_VALUE) |
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BIT(IIO_EV_INFO_ENABLE),
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}, {
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.type = IIO_EV_TYPE_THRESH,
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.dir = IIO_EV_DIR_FALLING,
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.mask_separate = BIT(IIO_EV_INFO_VALUE) |
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BIT(IIO_EV_INFO_ENABLE),
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},
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};
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static const struct iio_event_spec ad5421_temp_event[] = {
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{
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.type = IIO_EV_TYPE_THRESH,
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.dir = IIO_EV_DIR_RISING,
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.mask_separate = BIT(IIO_EV_INFO_VALUE) |
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BIT(IIO_EV_INFO_ENABLE),
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},
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};
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2011-11-02 15:40:02 +07:00
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static const struct iio_chan_spec ad5421_channels[] = {
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{
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.type = IIO_CURRENT,
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.indexed = 1,
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.output = 1,
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.channel = 0,
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2013-02-28 02:10:22 +07:00
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_CALIBSCALE) |
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BIT(IIO_CHAN_INFO_CALIBBIAS),
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
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BIT(IIO_CHAN_INFO_OFFSET),
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2013-12-12 01:45:00 +07:00
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.scan_type = {
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.sign = 'u',
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.realbits = 16,
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.storagebits = 16,
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},
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2013-10-07 21:11:00 +07:00
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.event_spec = ad5421_current_event,
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.num_event_specs = ARRAY_SIZE(ad5421_current_event),
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2011-11-02 15:40:02 +07:00
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},
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{
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.type = IIO_TEMP,
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.channel = -1,
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2013-10-07 21:11:00 +07:00
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.event_spec = ad5421_temp_event,
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.num_event_specs = ARRAY_SIZE(ad5421_temp_event),
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2011-11-02 15:40:02 +07:00
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},
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};
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static int ad5421_write_unlocked(struct iio_dev *indio_dev,
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unsigned int reg, unsigned int val)
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{
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struct ad5421_state *st = iio_priv(indio_dev);
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st->data[0].d32 = cpu_to_be32((reg << 16) | val);
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return spi_write(st->spi, &st->data[0].d8[1], 3);
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}
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static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
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unsigned int val)
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{
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int ret;
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mutex_lock(&indio_dev->mlock);
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ret = ad5421_write_unlocked(indio_dev, reg, val);
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mutex_unlock(&indio_dev->mlock);
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return ret;
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}
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static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
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{
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struct ad5421_state *st = iio_priv(indio_dev);
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int ret;
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struct spi_transfer t[] = {
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{
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.tx_buf = &st->data[0].d8[1],
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.len = 3,
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.cs_change = 1,
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}, {
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.rx_buf = &st->data[1].d8[1],
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.len = 3,
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},
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};
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mutex_lock(&indio_dev->mlock);
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st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
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2013-01-10 00:31:00 +07:00
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ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
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2011-11-02 15:40:02 +07:00
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if (ret >= 0)
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ret = be32_to_cpu(st->data[1].d32) & 0xffff;
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mutex_unlock(&indio_dev->mlock);
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return ret;
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}
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static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
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unsigned int clr)
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{
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struct ad5421_state *st = iio_priv(indio_dev);
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unsigned int ret;
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mutex_lock(&indio_dev->mlock);
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st->ctrl &= ~clr;
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st->ctrl |= set;
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ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
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mutex_unlock(&indio_dev->mlock);
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return ret;
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}
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static irqreturn_t ad5421_fault_handler(int irq, void *data)
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{
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struct iio_dev *indio_dev = data;
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struct ad5421_state *st = iio_priv(indio_dev);
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unsigned int fault;
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unsigned int old_fault = 0;
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unsigned int events;
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fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
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if (!fault)
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return IRQ_NONE;
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/* If we had a fault, this might mean that the DAC has lost its state
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* and has been reset. Make sure that the control register actually
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* contains what we expect it to contain. Otherwise the watchdog might
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* be enabled and we get watchdog timeout faults, which will render the
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* DAC unusable. */
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ad5421_update_ctrl(indio_dev, 0, 0);
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/* The fault pin stays high as long as a fault condition is present and
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* it is not possible to mask fault conditions. For certain fault
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* conditions for example like over-temperature it takes some time
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* until the fault condition disappears. If we would exit the interrupt
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* handler immediately after handling the event it would be entered
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* again instantly. Thus we fall back to polling in case we detect that
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* a interrupt condition is still present.
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*/
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do {
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/* 0xffff is a invalid value for the register and will only be
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* read if there has been a communication error */
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if (fault == 0xffff)
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fault = 0;
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/* we are only interested in new events */
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events = (old_fault ^ fault) & fault;
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events &= st->fault_mask;
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if (events & AD5421_FAULT_OVER_CURRENT) {
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iio_push_event(indio_dev,
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IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
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0,
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IIO_EV_TYPE_THRESH,
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IIO_EV_DIR_RISING),
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2016-03-10 01:05:49 +07:00
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iio_get_time_ns(indio_dev));
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2011-11-02 15:40:02 +07:00
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}
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if (events & AD5421_FAULT_UNDER_CURRENT) {
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iio_push_event(indio_dev,
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IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
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0,
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IIO_EV_TYPE_THRESH,
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IIO_EV_DIR_FALLING),
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2016-03-10 01:05:49 +07:00
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iio_get_time_ns(indio_dev));
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2011-11-02 15:40:02 +07:00
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}
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if (events & AD5421_FAULT_TEMP_OVER_140) {
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iio_push_event(indio_dev,
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IIO_UNMOD_EVENT_CODE(IIO_TEMP,
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0,
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IIO_EV_TYPE_MAG,
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IIO_EV_DIR_RISING),
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2016-03-10 01:05:49 +07:00
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iio_get_time_ns(indio_dev));
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2011-11-02 15:40:02 +07:00
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}
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old_fault = fault;
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fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
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/* still active? go to sleep for some time */
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if (fault & AD5421_FAULT_TRIGGER_IRQ)
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msleep(1000);
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} while (fault & AD5421_FAULT_TRIGGER_IRQ);
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return IRQ_HANDLED;
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}
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static void ad5421_get_current_min_max(struct ad5421_state *st,
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unsigned int *min, unsigned int *max)
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{
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/* The current range is configured using external pins, which are
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* usually hard-wired and not run-time switchable. */
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switch (st->current_range) {
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case AD5421_CURRENT_RANGE_4mA_20mA:
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*min = 4000;
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*max = 20000;
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break;
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case AD5421_CURRENT_RANGE_3mA8_21mA:
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*min = 3800;
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*max = 21000;
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break;
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case AD5421_CURRENT_RANGE_3mA2_24mA:
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*min = 3200;
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*max = 24000;
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break;
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default:
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*min = 0;
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*max = 1;
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break;
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}
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}
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static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
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{
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unsigned int min, max;
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ad5421_get_current_min_max(st, &min, &max);
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return (min * (1 << 16)) / (max - min);
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}
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static int ad5421_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val, int *val2, long m)
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{
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struct ad5421_state *st = iio_priv(indio_dev);
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2013-09-28 16:31:00 +07:00
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unsigned int min, max;
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2011-11-02 15:40:02 +07:00
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int ret;
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if (chan->type != IIO_CURRENT)
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return -EINVAL;
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switch (m) {
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2012-04-15 23:41:19 +07:00
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case IIO_CHAN_INFO_RAW:
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2011-11-02 15:40:02 +07:00
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ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
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if (ret < 0)
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return ret;
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*val = ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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2013-09-28 16:31:00 +07:00
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ad5421_get_current_min_max(st, &min, &max);
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*val = max - min;
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*val2 = (1 << 16) * 1000;
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return IIO_VAL_FRACTIONAL;
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2011-11-02 15:40:02 +07:00
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case IIO_CHAN_INFO_OFFSET:
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*val = ad5421_get_offset(st);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_CALIBBIAS:
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ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
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if (ret < 0)
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return ret;
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*val = ret - 32768;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_CALIBSCALE:
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ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
*val = ret;
|
|
|
|
return IIO_VAL_INT;
|
|
|
|
}
|
|
|
|
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ad5421_write_raw(struct iio_dev *indio_dev,
|
|
|
|
struct iio_chan_spec const *chan, int val, int val2, long mask)
|
|
|
|
{
|
|
|
|
const unsigned int max_val = 1 << 16;
|
|
|
|
|
|
|
|
switch (mask) {
|
2012-04-15 23:41:19 +07:00
|
|
|
case IIO_CHAN_INFO_RAW:
|
2011-11-02 15:40:02 +07:00
|
|
|
if (val >= max_val || val < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
|
|
|
|
case IIO_CHAN_INFO_CALIBBIAS:
|
|
|
|
val += 32768;
|
|
|
|
if (val >= max_val || val < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
|
|
|
|
case IIO_CHAN_INFO_CALIBSCALE:
|
|
|
|
if (val >= max_val || val < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ad5421_write_event_config(struct iio_dev *indio_dev,
|
2013-10-07 21:11:00 +07:00
|
|
|
const struct iio_chan_spec *chan, enum iio_event_type type,
|
|
|
|
enum iio_event_direction dir, int state)
|
2011-11-02 15:40:02 +07:00
|
|
|
{
|
|
|
|
struct ad5421_state *st = iio_priv(indio_dev);
|
|
|
|
unsigned int mask;
|
|
|
|
|
2013-10-07 21:11:00 +07:00
|
|
|
switch (chan->type) {
|
2011-11-02 15:40:02 +07:00
|
|
|
case IIO_CURRENT:
|
2013-10-07 21:11:00 +07:00
|
|
|
if (dir == IIO_EV_DIR_RISING)
|
2011-11-02 15:40:02 +07:00
|
|
|
mask = AD5421_FAULT_OVER_CURRENT;
|
|
|
|
else
|
|
|
|
mask = AD5421_FAULT_UNDER_CURRENT;
|
|
|
|
break;
|
|
|
|
case IIO_TEMP:
|
|
|
|
mask = AD5421_FAULT_TEMP_OVER_140;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_lock(&indio_dev->mlock);
|
|
|
|
if (state)
|
|
|
|
st->fault_mask |= mask;
|
|
|
|
else
|
|
|
|
st->fault_mask &= ~mask;
|
|
|
|
mutex_unlock(&indio_dev->mlock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ad5421_read_event_config(struct iio_dev *indio_dev,
|
2013-10-07 21:11:00 +07:00
|
|
|
const struct iio_chan_spec *chan, enum iio_event_type type,
|
|
|
|
enum iio_event_direction dir)
|
2011-11-02 15:40:02 +07:00
|
|
|
{
|
|
|
|
struct ad5421_state *st = iio_priv(indio_dev);
|
|
|
|
unsigned int mask;
|
|
|
|
|
2013-10-07 21:11:00 +07:00
|
|
|
switch (chan->type) {
|
2011-11-02 15:40:02 +07:00
|
|
|
case IIO_CURRENT:
|
2013-10-07 21:11:00 +07:00
|
|
|
if (dir == IIO_EV_DIR_RISING)
|
2011-11-02 15:40:02 +07:00
|
|
|
mask = AD5421_FAULT_OVER_CURRENT;
|
|
|
|
else
|
|
|
|
mask = AD5421_FAULT_UNDER_CURRENT;
|
|
|
|
break;
|
|
|
|
case IIO_TEMP:
|
|
|
|
mask = AD5421_FAULT_TEMP_OVER_140;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (bool)(st->fault_mask & mask);
|
|
|
|
}
|
|
|
|
|
2013-10-07 21:11:00 +07:00
|
|
|
static int ad5421_read_event_value(struct iio_dev *indio_dev,
|
|
|
|
const struct iio_chan_spec *chan, enum iio_event_type type,
|
|
|
|
enum iio_event_direction dir, enum iio_event_info info, int *val,
|
|
|
|
int *val2)
|
2011-11-02 15:40:02 +07:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2013-10-07 21:11:00 +07:00
|
|
|
switch (chan->type) {
|
2011-11-02 15:40:02 +07:00
|
|
|
case IIO_CURRENT:
|
|
|
|
ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
*val = ret;
|
|
|
|
break;
|
|
|
|
case IIO_TEMP:
|
|
|
|
*val = 140000;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-10-07 21:11:00 +07:00
|
|
|
return IIO_VAL_INT;
|
2011-11-02 15:40:02 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct iio_info ad5421_info = {
|
|
|
|
.read_raw = ad5421_read_raw,
|
|
|
|
.write_raw = ad5421_write_raw,
|
2013-12-07 17:45:00 +07:00
|
|
|
.read_event_config = ad5421_read_event_config,
|
|
|
|
.write_event_config = ad5421_write_event_config,
|
|
|
|
.read_event_value = ad5421_read_event_value,
|
2011-11-02 15:40:02 +07:00
|
|
|
};
|
|
|
|
|
2012-12-22 04:21:43 +07:00
|
|
|
static int ad5421_probe(struct spi_device *spi)
|
2011-11-02 15:40:02 +07:00
|
|
|
{
|
|
|
|
struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
|
|
|
|
struct iio_dev *indio_dev;
|
|
|
|
struct ad5421_state *st;
|
|
|
|
int ret;
|
|
|
|
|
2013-08-19 18:38:00 +07:00
|
|
|
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
|
2011-11-02 15:40:02 +07:00
|
|
|
if (indio_dev == NULL) {
|
|
|
|
dev_err(&spi->dev, "Failed to allocate iio device\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
st = iio_priv(indio_dev);
|
|
|
|
spi_set_drvdata(spi, indio_dev);
|
|
|
|
|
|
|
|
st->spi = spi;
|
|
|
|
|
|
|
|
indio_dev->dev.parent = &spi->dev;
|
|
|
|
indio_dev->name = "ad5421";
|
|
|
|
indio_dev->info = &ad5421_info;
|
|
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
|
|
indio_dev->channels = ad5421_channels;
|
|
|
|
indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
|
|
|
|
|
|
|
|
st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
|
|
|
|
AD5421_CTRL_AUTO_FAULT_READBACK;
|
|
|
|
|
|
|
|
if (pdata) {
|
|
|
|
st->current_range = pdata->current_range;
|
|
|
|
if (pdata->external_vref)
|
|
|
|
st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
|
|
|
|
} else {
|
|
|
|
st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* write initial ctrl register value */
|
|
|
|
ad5421_update_ctrl(indio_dev, 0, 0);
|
|
|
|
|
|
|
|
if (spi->irq) {
|
2013-08-19 18:38:00 +07:00
|
|
|
ret = devm_request_threaded_irq(&spi->dev, spi->irq,
|
2011-11-02 15:40:02 +07:00
|
|
|
NULL,
|
|
|
|
ad5421_fault_handler,
|
|
|
|
IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
|
|
|
|
"ad5421 fault",
|
|
|
|
indio_dev);
|
|
|
|
if (ret)
|
2013-08-19 18:38:00 +07:00
|
|
|
return ret;
|
2011-11-02 15:40:02 +07:00
|
|
|
}
|
|
|
|
|
2013-10-29 18:39:00 +07:00
|
|
|
return devm_iio_device_register(&spi->dev, indio_dev);
|
2011-11-02 15:40:02 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static struct spi_driver ad5421_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "ad5421",
|
|
|
|
},
|
|
|
|
.probe = ad5421_probe,
|
|
|
|
};
|
2012-02-21 01:42:38 +07:00
|
|
|
module_spi_driver(ad5421_driver);
|
2011-11-02 15:40:02 +07:00
|
|
|
|
|
|
|
MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
|
|
|
|
MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
|
|
MODULE_ALIAS("spi:ad5421");
|