2019-05-20 14:19:02 +07:00
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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2009-12-03 07:57:10 +07:00
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/*
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Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
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2009-12-15 19:04:59 +07:00
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Copyright (C) Manu Abraham (abraham.manu@gmail.com)
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2009-12-03 07:57:10 +07:00
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*/
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#ifndef __MB86A16_PRIV_H
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#define __MB86A16_PRIV_H
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#define MB86A16_TSOUT 0x00
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#define MB86A16_TSOUT_HIZSEL (0x01 << 5)
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#define MB86A16_TSOUT_HIZCNTI (0x01 << 4)
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#define MB86A16_TSOUT_MODE (0x01 << 3)
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#define MB86A16_TSOUT_ORDER (0x01 << 2)
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#define MB86A16_TSOUT_ERROR (0x01 << 1)
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#define Mb86A16_TSOUT_EDGE (0x01 << 0)
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#define MB86A16_FEC 0x01
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#define MB86A16_FEC_FSYNC (0x01 << 5)
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#define MB86A16_FEC_PCKB8 (0x01 << 4)
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#define MB86A16_FEC_DVDS (0x01 << 3)
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#define MB86A16_FEC_EREN (0x01 << 2)
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#define Mb86A16_FEC_RSEN (0x01 << 1)
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#define MB86A16_FEC_DIEN (0x01 << 0)
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#define MB86A16_AGC 0x02
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#define MB86A16_AGC_AGMD (0x01 << 6)
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#define MB86A16_AGC_AGCW (0x0f << 2)
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#define MB86A16_AGC_AGCP (0x01 << 1)
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#define MB86A16_AGC_AGCR (0x01 << 0)
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#define MB86A16_SRATE1 0x03
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#define MB86A16_SRATE1_DECI (0x07 << 2)
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#define MB86A16_SRATE1_CSEL (0x01 << 1)
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#define MB86A16_SRATE1_RSEL (0x01 << 0)
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#define MB86A16_SRATE2 0x04
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#define MB86A16_SRATE2_STOFSL (0xff << 0)
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#define MB86A16_SRATE3 0x05
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#define MB86A16_SRATE2_STOFSH (0xff << 0)
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#define MB86A16_VITERBI 0x06
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#define MB86A16_FRAMESYNC 0x07
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#define MB86A16_CRLFILTCOEF1 0x08
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#define MB86A16_CRLFILTCOEF2 0x09
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#define MB86A16_STRFILTCOEF1 0x0a
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#define MB86A16_STRFILTCOEF2 0x0b
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#define MB86A16_RESET 0x0c
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#define MB86A16_STATUS 0x0d
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#define MB86A16_AFCML 0x0e
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#define MB86A16_AFCMH 0x0f
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#define MB86A16_BERMON 0x10
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#define MB86A16_BERTAB 0x11
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#define MB86A16_BERLSB 0x12
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#define MB86A16_BERMID 0x13
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#define MB86A16_BERMSB 0x14
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#define MB86A16_AGCM 0x15
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#define MB86A16_DCC1 0x16
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#define MB86A16_DCC1_DISTA (0x01 << 7)
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#define MB86A16_DCC1_PRTY (0x01 << 6)
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#define MB86A16_DCC1_CTOE (0x01 << 5)
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#define MB86A16_DCC1_TBEN (0x01 << 4)
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#define MB86A16_DCC1_TBO (0x01 << 3)
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#define MB86A16_DCC1_NUM (0x07 << 0)
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#define MB86A16_DCC2 0x17
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#define MB86A16_DCC2_DCBST (0x01 << 0)
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#define MB86A16_DCC3 0x18
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#define MB86A16_DCC3_CODE0 (0xff << 0)
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#define MB86A16_DCC4 0x19
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#define MB86A16_DCC4_CODE1 (0xff << 0)
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#define MB86A16_DCC5 0x1a
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#define MB86A16_DCC5_CODE2 (0xff << 0)
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#define MB86A16_DCC6 0x1b
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#define MB86A16_DCC6_CODE3 (0xff << 0)
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#define MB86A16_DCC7 0x1c
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#define MB86A16_DCC7_CODE4 (0xff << 0)
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#define MB86A16_DCC8 0x1d
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#define MB86A16_DCC8_CODE5 (0xff << 0)
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#define MB86A16_DCCOUT 0x1e
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#define MB86A16_DCCOUT_DISEN (0x01 << 0)
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#define MB86A16_TONEOUT1 0x1f
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#define MB86A16_TONE_TDIVL (0xff << 0)
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#define MB86A16_TONEOUT2 0x20
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#define MB86A16_TONE_TMD (0x03 << 2)
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#define MB86A16_TONE_TDIVH (0x03 << 0)
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#define MB86A16_FREQ1 0x21
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#define MB86A16_FREQ2 0x22
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#define MB86A16_FREQ3 0x23
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#define MB86A16_FREQ4 0x24
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#define MB86A16_FREQSET 0x25
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#define MB86A16_CNM 0x26
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#define MB86A16_PORT0 0x27
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#define MB86A16_PORT1 0x28
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#define MB86A16_DRCFILT 0x29
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#define MB86A16_AFC 0x2a
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#define MB86A16_AFCEXL 0x2b
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#define MB86A16_AFCEXH 0x2c
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#define MB86A16_DAGC 0x2d
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#define MB86A16_SEQMODE 0x32
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#define MB86A16_S0S1T 0x33
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#define MB86A16_S2S3T 0x34
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#define MB86A16_S4S5T 0x35
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#define MB86A16_CNTMR 0x36
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#define MB86A16_SIG1 0x37
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#define MB86A16_SIG2 0x38
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#define MB86A16_VIMAG 0x39
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#define MB86A16_VISET1 0x3a
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#define MB86A16_VISET2 0x3b
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#define MB86A16_VISET3 0x3c
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#define MB86A16_FAGCS1 0x3d
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#define MB86A16_FAGCS2 0x3e
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#define MB86A16_FAGCS3 0x3f
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#define MB86A16_FAGCS4 0x40
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#define MB86A16_FAGCS5 0x41
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#define MB86A16_FAGCS6 0x42
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#define MB86A16_CRM 0x43
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#define MB86A16_STRM 0x44
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#define MB86A16_DAGCML 0x45
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#define MB86A16_DAGCMH 0x46
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#define MB86A16_QPSKTST 0x49
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#define MB86A16_DISTMON 0x52
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#define MB86A16_VERSION 0x7f
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2009-12-15 18:47:21 +07:00
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#endif /* __MB86A16_PRIV_H */
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