2018-09-29 02:13:25 +07:00
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// SPDX-License-Identifier: GPL-2.0+
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2013-10-10 21:18:45 +07:00
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/*
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* i.MX IPUv3 DP Overlay Planes
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*
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* Copyright (C) 2013 Philipp Zabel, Pengutronix
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*/
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#include <drm/drmP.h>
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2016-07-08 16:40:59 +07:00
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#include <drm/drm_atomic.h>
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2016-07-08 16:40:56 +07:00
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#include <drm/drm_atomic_helper.h>
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2013-10-10 21:18:45 +07:00
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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2017-08-13 20:31:53 +07:00
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#include <drm/drm_gem_framebuffer_helper.h>
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2016-07-08 16:40:55 +07:00
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#include <drm/drm_plane_helper.h>
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2013-10-10 21:18:45 +07:00
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2013-09-30 21:13:39 +07:00
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#include "video/imx-ipu-v3.h"
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2018-02-14 02:11:35 +07:00
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#include "imx-drm.h"
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2013-10-10 21:18:45 +07:00
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#include "ipuv3-plane.h"
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2017-03-08 18:13:21 +07:00
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struct ipu_plane_state {
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struct drm_plane_state base;
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bool use_pre;
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};
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static inline struct ipu_plane_state *
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to_ipu_plane_state(struct drm_plane_state *p)
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{
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return container_of(p, struct ipu_plane_state, base);
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}
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2016-07-06 20:47:11 +07:00
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static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
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{
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return container_of(p, struct ipu_plane, base);
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}
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2013-10-10 21:18:45 +07:00
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static const uint32_t ipu_plane_formats[] = {
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2014-12-12 19:40:38 +07:00
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DRM_FORMAT_ARGB1555,
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2013-10-10 21:18:45 +07:00
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DRM_FORMAT_XRGB1555,
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2014-12-12 19:40:38 +07:00
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DRM_FORMAT_ABGR1555,
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2013-10-10 21:18:45 +07:00
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DRM_FORMAT_XBGR1555,
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2014-12-12 19:40:38 +07:00
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DRM_FORMAT_RGBA5551,
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DRM_FORMAT_BGRA5551,
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2015-08-04 22:22:06 +07:00
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DRM_FORMAT_ARGB4444,
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2013-10-10 21:18:45 +07:00
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XBGR8888,
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2015-04-16 20:56:40 +07:00
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DRM_FORMAT_RGBA8888,
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DRM_FORMAT_RGBX8888,
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DRM_FORMAT_BGRA8888,
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2017-06-28 16:31:34 +07:00
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DRM_FORMAT_BGRX8888,
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2016-02-12 20:35:55 +07:00
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DRM_FORMAT_UYVY,
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DRM_FORMAT_VYUY,
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2013-10-10 21:18:45 +07:00
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DRM_FORMAT_YUYV,
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DRM_FORMAT_YVYU,
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DRM_FORMAT_YUV420,
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DRM_FORMAT_YVU420,
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2016-10-18 17:31:40 +07:00
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DRM_FORMAT_YUV422,
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DRM_FORMAT_YVU422,
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DRM_FORMAT_YUV444,
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DRM_FORMAT_YVU444,
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DRM_FORMAT_NV12,
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DRM_FORMAT_NV16,
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2015-11-24 22:29:22 +07:00
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DRM_FORMAT_RGB565,
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2016-07-22 17:02:45 +07:00
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DRM_FORMAT_RGB565_A8,
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DRM_FORMAT_BGR565_A8,
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DRM_FORMAT_RGB888_A8,
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DRM_FORMAT_BGR888_A8,
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DRM_FORMAT_RGBX8888_A8,
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DRM_FORMAT_BGRX8888_A8,
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2013-10-10 21:18:45 +07:00
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};
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2017-11-10 23:10:01 +07:00
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static const uint64_t ipu_format_modifiers[] = {
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DRM_FORMAT_MOD_LINEAR,
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DRM_FORMAT_MOD_INVALID
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};
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static const uint64_t pre_format_modifiers[] = {
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DRM_FORMAT_MOD_LINEAR,
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DRM_FORMAT_MOD_VIVANTE_TILED,
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DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
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DRM_FORMAT_MOD_INVALID
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};
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2013-10-10 21:18:45 +07:00
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int ipu_plane_irq(struct ipu_plane *ipu_plane)
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{
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return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
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IPU_IRQ_EOF);
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}
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2016-07-08 16:40:55 +07:00
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static inline unsigned long
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2016-07-22 17:01:11 +07:00
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drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
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2013-10-10 21:18:45 +07:00
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{
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2016-07-08 16:40:55 +07:00
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struct drm_framebuffer *fb = state->fb;
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struct drm_gem_cma_object *cma_obj;
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2016-10-19 15:50:26 +07:00
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int x = state->src.x1 >> 16;
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int y = state->src.y1 >> 16;
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2013-10-10 21:18:45 +07:00
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2016-07-22 17:01:11 +07:00
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cma_obj = drm_fb_cma_get_gem_obj(fb, plane);
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2016-07-08 16:40:55 +07:00
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BUG_ON(!cma_obj);
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2013-10-10 21:18:45 +07:00
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2016-07-22 17:01:11 +07:00
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return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y +
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fb->format->cpp[plane] * x;
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2016-07-08 16:40:55 +07:00
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}
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2016-07-08 16:40:53 +07:00
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2016-07-08 16:40:55 +07:00
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static inline unsigned long
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drm_plane_state_to_ubo(struct drm_plane_state *state)
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{
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struct drm_framebuffer *fb = state->fb;
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struct drm_gem_cma_object *cma_obj;
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2016-07-22 17:01:11 +07:00
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unsigned long eba = drm_plane_state_to_eba(state, 0);
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2016-10-19 15:50:26 +07:00
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int x = state->src.x1 >> 16;
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int y = state->src.y1 >> 16;
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2013-10-10 21:18:45 +07:00
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2016-07-08 16:40:55 +07:00
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cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
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BUG_ON(!cma_obj);
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2014-10-08 22:19:15 +07:00
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2016-12-15 04:32:55 +07:00
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x /= drm_format_horz_chroma_subsampling(fb->format->format);
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y /= drm_format_vert_chroma_subsampling(fb->format->format);
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2016-10-18 17:26:19 +07:00
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return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
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2016-12-15 04:30:57 +07:00
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fb->format->cpp[1] * x - eba;
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2016-07-08 16:40:55 +07:00
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}
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2014-10-08 22:19:15 +07:00
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2016-07-08 16:40:55 +07:00
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static inline unsigned long
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drm_plane_state_to_vbo(struct drm_plane_state *state)
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{
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struct drm_framebuffer *fb = state->fb;
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struct drm_gem_cma_object *cma_obj;
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2016-07-22 17:01:11 +07:00
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unsigned long eba = drm_plane_state_to_eba(state, 0);
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2016-10-19 15:50:26 +07:00
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int x = state->src.x1 >> 16;
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int y = state->src.y1 >> 16;
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2016-07-08 16:40:55 +07:00
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cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
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BUG_ON(!cma_obj);
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2016-12-15 04:32:55 +07:00
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x /= drm_format_horz_chroma_subsampling(fb->format->format);
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y /= drm_format_vert_chroma_subsampling(fb->format->format);
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2016-10-18 17:26:19 +07:00
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return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
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2016-12-15 04:30:57 +07:00
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fb->format->cpp[2] * x - eba;
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2016-07-08 16:40:55 +07:00
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}
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2013-10-10 21:18:45 +07:00
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void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
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{
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if (!IS_ERR_OR_NULL(ipu_plane->dp))
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ipu_dp_put(ipu_plane->dp);
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if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
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ipu_dmfc_put(ipu_plane->dmfc);
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if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
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ipu_idmac_put(ipu_plane->ipu_ch);
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2016-07-22 17:02:45 +07:00
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if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
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ipu_idmac_put(ipu_plane->alpha_ch);
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2013-10-10 21:18:45 +07:00
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}
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int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
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{
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int ret;
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2016-07-22 17:02:45 +07:00
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int alpha_ch;
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2013-10-10 21:18:45 +07:00
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ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
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if (IS_ERR(ipu_plane->ipu_ch)) {
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ret = PTR_ERR(ipu_plane->ipu_ch);
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DRM_ERROR("failed to get idmac channel: %d\n", ret);
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return ret;
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}
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2016-07-22 17:02:45 +07:00
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alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
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if (alpha_ch >= 0) {
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ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
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if (IS_ERR(ipu_plane->alpha_ch)) {
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ret = PTR_ERR(ipu_plane->alpha_ch);
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DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
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alpha_ch, ret);
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return ret;
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}
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}
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2013-10-10 21:18:45 +07:00
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ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
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if (IS_ERR(ipu_plane->dmfc)) {
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ret = PTR_ERR(ipu_plane->dmfc);
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DRM_ERROR("failed to get dmfc: ret %d\n", ret);
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goto err_out;
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}
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if (ipu_plane->dp_flow >= 0) {
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ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
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if (IS_ERR(ipu_plane->dp)) {
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ret = PTR_ERR(ipu_plane->dp);
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DRM_ERROR("failed to get dp flow: %d\n", ret);
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goto err_out;
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}
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}
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return 0;
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err_out:
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ipu_plane_put_resources(ipu_plane);
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return ret;
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}
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2016-07-22 17:02:45 +07:00
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static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
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{
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switch (ipu_plane->base.state->fb->format->format) {
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case DRM_FORMAT_RGB565_A8:
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case DRM_FORMAT_BGR565_A8:
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case DRM_FORMAT_RGB888_A8:
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case DRM_FORMAT_BGR888_A8:
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case DRM_FORMAT_RGBX8888_A8:
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case DRM_FORMAT_BGRX8888_A8:
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return true;
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default:
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return false;
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}
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}
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2016-07-08 16:40:55 +07:00
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static void ipu_plane_enable(struct ipu_plane *ipu_plane)
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2013-10-10 21:18:45 +07:00
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{
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2014-04-15 04:53:20 +07:00
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if (ipu_plane->dp)
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ipu_dp_enable(ipu_plane->ipu);
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2013-10-10 21:18:45 +07:00
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ipu_dmfc_enable_channel(ipu_plane->dmfc);
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ipu_idmac_enable_channel(ipu_plane->ipu_ch);
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2016-07-22 17:02:45 +07:00
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if (ipu_plane_separate_alpha(ipu_plane))
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ipu_idmac_enable_channel(ipu_plane->alpha_ch);
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2013-10-10 21:18:45 +07:00
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if (ipu_plane->dp)
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ipu_dp_enable_channel(ipu_plane->dp);
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}
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2017-02-25 00:31:05 +07:00
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void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
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2013-10-10 21:18:45 +07:00
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{
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2017-02-25 00:38:08 +07:00
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int ret;
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2016-08-11 16:18:50 +07:00
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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2017-02-25 00:38:08 +07:00
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ret = ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
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if (ret == -ETIMEDOUT) {
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DRM_ERROR("[PLANE:%d] IDMAC timeout\n",
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ipu_plane->base.base.id);
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}
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2013-10-10 21:18:45 +07:00
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2017-02-25 00:31:05 +07:00
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if (ipu_plane->dp && disable_dp_channel)
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ipu_dp_disable_channel(ipu_plane->dp, false);
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2013-10-10 21:18:45 +07:00
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ipu_idmac_disable_channel(ipu_plane->ipu_ch);
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2016-07-22 17:02:45 +07:00
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if (ipu_plane->alpha_ch)
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ipu_idmac_disable_channel(ipu_plane->alpha_ch);
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2013-10-10 21:18:45 +07:00
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ipu_dmfc_disable_channel(ipu_plane->dmfc);
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2014-04-15 04:53:20 +07:00
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if (ipu_plane->dp)
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ipu_dp_disable(ipu_plane->ipu);
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2017-03-08 18:13:21 +07:00
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if (ipu_prg_present(ipu_plane->ipu))
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ipu_prg_channel_disable(ipu_plane->ipu_ch);
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2017-02-25 00:31:05 +07:00
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}
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2013-10-10 21:18:45 +07:00
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2017-02-25 00:31:05 +07:00
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void ipu_plane_disable_deferred(struct drm_plane *plane)
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{
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struct ipu_plane *ipu_plane = to_ipu_plane(plane);
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if (ipu_plane->disabling) {
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ipu_plane->disabling = false;
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ipu_plane_disable(ipu_plane, false);
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}
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2013-10-10 21:18:45 +07:00
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}
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2017-02-25 00:31:05 +07:00
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EXPORT_SYMBOL_GPL(ipu_plane_disable_deferred);
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2013-10-10 21:18:45 +07:00
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2016-07-08 16:40:55 +07:00
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static void ipu_plane_destroy(struct drm_plane *plane)
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2013-10-10 21:18:45 +07:00
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{
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struct ipu_plane *ipu_plane = to_ipu_plane(plane);
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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2016-07-08 16:40:55 +07:00
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drm_plane_cleanup(plane);
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kfree(ipu_plane);
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}
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2013-10-10 21:18:45 +07:00
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2018-02-14 02:11:34 +07:00
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static void ipu_plane_state_reset(struct drm_plane *plane)
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2017-03-08 18:13:21 +07:00
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{
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struct ipu_plane_state *ipu_state;
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if (plane->state) {
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|
|
ipu_state = to_ipu_plane_state(plane->state);
|
|
|
|
__drm_atomic_helper_plane_destroy_state(plane->state);
|
|
|
|
kfree(ipu_state);
|
2018-08-04 23:15:26 +07:00
|
|
|
plane->state = NULL;
|
2017-03-08 18:13:21 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
|
|
|
|
|
2018-08-04 23:15:26 +07:00
|
|
|
if (ipu_state)
|
|
|
|
__drm_atomic_helper_plane_reset(plane, &ipu_state->base);
|
2017-03-08 18:13:21 +07:00
|
|
|
}
|
|
|
|
|
2018-02-14 02:11:34 +07:00
|
|
|
static struct drm_plane_state *
|
|
|
|
ipu_plane_duplicate_state(struct drm_plane *plane)
|
2017-03-08 18:13:21 +07:00
|
|
|
{
|
|
|
|
struct ipu_plane_state *state;
|
|
|
|
|
|
|
|
if (WARN_ON(!plane->state))
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
state = kmalloc(sizeof(*state), GFP_KERNEL);
|
|
|
|
if (state)
|
|
|
|
__drm_atomic_helper_plane_duplicate_state(plane, &state->base);
|
|
|
|
|
|
|
|
return &state->base;
|
|
|
|
}
|
|
|
|
|
2018-02-14 02:11:34 +07:00
|
|
|
static void ipu_plane_destroy_state(struct drm_plane *plane,
|
|
|
|
struct drm_plane_state *state)
|
2017-03-08 18:13:21 +07:00
|
|
|
{
|
|
|
|
struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
|
|
|
|
|
|
|
|
__drm_atomic_helper_plane_destroy_state(state);
|
|
|
|
kfree(ipu_state);
|
|
|
|
}
|
|
|
|
|
2017-11-10 23:10:01 +07:00
|
|
|
static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
|
|
|
|
uint32_t format, uint64_t modifier)
|
|
|
|
{
|
|
|
|
struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
|
|
|
|
|
|
|
|
/* linear is supported for all planes and formats */
|
|
|
|
if (modifier == DRM_FORMAT_MOD_LINEAR)
|
|
|
|
return true;
|
|
|
|
|
|
|
|
/* without a PRG there are no supported modifiers */
|
|
|
|
if (!ipu_prg_present(ipu))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
return ipu_prg_format_supported(ipu, format, modifier);
|
|
|
|
}
|
|
|
|
|
2016-07-08 16:40:55 +07:00
|
|
|
static const struct drm_plane_funcs ipu_plane_funcs = {
|
2016-07-08 16:40:59 +07:00
|
|
|
.update_plane = drm_atomic_helper_update_plane,
|
|
|
|
.disable_plane = drm_atomic_helper_disable_plane,
|
2016-07-08 16:40:55 +07:00
|
|
|
.destroy = ipu_plane_destroy,
|
2017-03-08 18:13:21 +07:00
|
|
|
.reset = ipu_plane_state_reset,
|
|
|
|
.atomic_duplicate_state = ipu_plane_duplicate_state,
|
|
|
|
.atomic_destroy_state = ipu_plane_destroy_state,
|
2017-11-10 23:10:01 +07:00
|
|
|
.format_mod_supported = ipu_plane_format_mod_supported,
|
2016-07-08 16:40:55 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
static int ipu_plane_atomic_check(struct drm_plane *plane,
|
|
|
|
struct drm_plane_state *state)
|
|
|
|
{
|
|
|
|
struct drm_plane_state *old_state = plane->state;
|
|
|
|
struct drm_crtc_state *crtc_state;
|
|
|
|
struct device *dev = plane->dev->dev;
|
|
|
|
struct drm_framebuffer *fb = state->fb;
|
|
|
|
struct drm_framebuffer *old_fb = old_state->fb;
|
2016-07-22 17:02:45 +07:00
|
|
|
unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
|
2016-10-19 15:50:26 +07:00
|
|
|
bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
|
2016-10-18 17:30:36 +07:00
|
|
|
int hsub, vsub;
|
2016-10-19 15:50:26 +07:00
|
|
|
int ret;
|
2016-07-08 16:40:55 +07:00
|
|
|
|
|
|
|
/* Ok to disable */
|
|
|
|
if (!fb)
|
2016-07-08 16:40:59 +07:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (!state->crtc)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
crtc_state =
|
|
|
|
drm_atomic_get_existing_crtc_state(state->state, state->crtc);
|
|
|
|
if (WARN_ON(!crtc_state))
|
|
|
|
return -EINVAL;
|
2016-07-08 16:40:55 +07:00
|
|
|
|
2018-01-24 00:08:57 +07:00
|
|
|
ret = drm_atomic_helper_check_plane_state(state, crtc_state,
|
2017-11-02 03:16:19 +07:00
|
|
|
DRM_PLANE_HELPER_NO_SCALING,
|
|
|
|
DRM_PLANE_HELPER_NO_SCALING,
|
|
|
|
can_position, true);
|
2016-10-19 15:50:26 +07:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2016-07-08 16:40:55 +07:00
|
|
|
/* CRTC should be enabled */
|
2016-07-08 16:40:59 +07:00
|
|
|
if (!crtc_state->enable)
|
2016-07-08 16:40:55 +07:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
switch (plane->type) {
|
|
|
|
case DRM_PLANE_TYPE_PRIMARY:
|
|
|
|
/* full plane minimum width is 13 pixels */
|
2016-10-19 15:50:26 +07:00
|
|
|
if (drm_rect_width(&state->dst) < 13)
|
2016-07-08 16:40:55 +07:00
|
|
|
return -EINVAL;
|
|
|
|
break;
|
|
|
|
case DRM_PLANE_TYPE_OVERLAY:
|
|
|
|
break;
|
|
|
|
default:
|
2016-10-19 15:50:26 +07:00
|
|
|
dev_warn(dev, "Unsupported plane type %d\n", plane->type);
|
2016-07-08 16:40:55 +07:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2016-10-19 15:50:26 +07:00
|
|
|
if (drm_rect_height(&state->dst) < 2)
|
2016-07-08 16:40:55 +07:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/*
|
2016-08-26 14:30:44 +07:00
|
|
|
* We support resizing active plane or changing its format by
|
|
|
|
* forcing CRTC mode change in plane's ->atomic_check callback
|
|
|
|
* and disabling all affected active planes in CRTC's ->atomic_disable
|
|
|
|
* callback. The planes will be reenabled in plane's ->atomic_update
|
|
|
|
* callback.
|
2016-07-08 16:40:55 +07:00
|
|
|
*/
|
2016-10-19 15:50:26 +07:00
|
|
|
if (old_fb &&
|
|
|
|
(drm_rect_width(&state->dst) != drm_rect_width(&old_state->dst) ||
|
|
|
|
drm_rect_height(&state->dst) != drm_rect_height(&old_state->dst) ||
|
|
|
|
fb->format != old_fb->format))
|
2016-08-26 14:30:44 +07:00
|
|
|
crtc_state->mode_changed = true;
|
2016-07-08 16:40:55 +07:00
|
|
|
|
2016-07-22 17:01:11 +07:00
|
|
|
eba = drm_plane_state_to_eba(state, 0);
|
2016-07-08 16:40:55 +07:00
|
|
|
|
|
|
|
if (eba & 0x7)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (old_fb && fb->pitches[0] != old_fb->pitches[0])
|
2016-08-26 14:30:44 +07:00
|
|
|
crtc_state->mode_changed = true;
|
2016-07-08 16:40:55 +07:00
|
|
|
|
2016-12-15 04:32:55 +07:00
|
|
|
switch (fb->format->format) {
|
2016-07-08 16:40:55 +07:00
|
|
|
case DRM_FORMAT_YUV420:
|
|
|
|
case DRM_FORMAT_YVU420:
|
2016-10-18 17:31:40 +07:00
|
|
|
case DRM_FORMAT_YUV422:
|
|
|
|
case DRM_FORMAT_YVU422:
|
|
|
|
case DRM_FORMAT_YUV444:
|
|
|
|
case DRM_FORMAT_YVU444:
|
2016-07-08 16:40:55 +07:00
|
|
|
/*
|
|
|
|
* Multiplanar formats have to meet the following restrictions:
|
|
|
|
* - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
|
|
|
|
* - EBA, UBO and VBO are a multiple of 8
|
|
|
|
* - UBO and VBO are unsigned and not larger than 0xfffff8
|
|
|
|
* - Only EBA may be changed while scanout is active
|
|
|
|
* - The strides of U and V planes must be identical.
|
|
|
|
*/
|
|
|
|
vbo = drm_plane_state_to_vbo(state);
|
|
|
|
|
2016-10-18 17:31:40 +07:00
|
|
|
if (vbo & 0x7 || vbo > 0xfffff8)
|
2016-07-08 16:40:55 +07:00
|
|
|
return -EINVAL;
|
|
|
|
|
2016-11-19 02:53:10 +07:00
|
|
|
if (old_fb && (fb->format == old_fb->format)) {
|
2016-07-08 16:40:55 +07:00
|
|
|
old_vbo = drm_plane_state_to_vbo(old_state);
|
2016-10-18 17:31:40 +07:00
|
|
|
if (vbo != old_vbo)
|
2016-10-18 17:13:15 +07:00
|
|
|
crtc_state->mode_changed = true;
|
2016-07-08 16:40:55 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
if (fb->pitches[1] != fb->pitches[2])
|
|
|
|
return -EINVAL;
|
|
|
|
|
2016-10-18 17:31:40 +07:00
|
|
|
/* fall-through */
|
|
|
|
case DRM_FORMAT_NV12:
|
|
|
|
case DRM_FORMAT_NV16:
|
|
|
|
ubo = drm_plane_state_to_ubo(state);
|
|
|
|
|
|
|
|
if (ubo & 0x7 || ubo > 0xfffff8)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2016-11-19 02:53:10 +07:00
|
|
|
if (old_fb && (fb->format == old_fb->format)) {
|
2016-10-18 17:31:40 +07:00
|
|
|
old_ubo = drm_plane_state_to_ubo(old_state);
|
|
|
|
if (ubo != old_ubo)
|
|
|
|
crtc_state->mode_changed = true;
|
|
|
|
}
|
|
|
|
|
2016-07-08 16:40:55 +07:00
|
|
|
if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (old_fb && old_fb->pitches[1] != fb->pitches[1])
|
2016-08-26 14:30:44 +07:00
|
|
|
crtc_state->mode_changed = true;
|
2016-10-18 17:30:36 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* The x/y offsets must be even in case of horizontal/vertical
|
|
|
|
* chroma subsampling.
|
|
|
|
*/
|
2016-12-15 04:32:55 +07:00
|
|
|
hsub = drm_format_horz_chroma_subsampling(fb->format->format);
|
|
|
|
vsub = drm_format_vert_chroma_subsampling(fb->format->format);
|
2016-10-19 15:50:26 +07:00
|
|
|
if (((state->src.x1 >> 16) & (hsub - 1)) ||
|
|
|
|
((state->src.y1 >> 16) & (vsub - 1)))
|
2016-10-18 17:30:36 +07:00
|
|
|
return -EINVAL;
|
2016-07-22 17:02:45 +07:00
|
|
|
break;
|
|
|
|
case DRM_FORMAT_RGB565_A8:
|
|
|
|
case DRM_FORMAT_BGR565_A8:
|
|
|
|
case DRM_FORMAT_RGB888_A8:
|
|
|
|
case DRM_FORMAT_BGR888_A8:
|
|
|
|
case DRM_FORMAT_RGBX8888_A8:
|
|
|
|
case DRM_FORMAT_BGRX8888_A8:
|
|
|
|
alpha_eba = drm_plane_state_to_eba(state, 1);
|
|
|
|
if (alpha_eba & 0x7)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (old_fb && old_fb->pitches[1] != fb->pitches[1])
|
|
|
|
crtc_state->mode_changed = true;
|
|
|
|
break;
|
2016-07-08 16:40:55 +07:00
|
|
|
}
|
2013-10-10 21:18:45 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-07-08 16:40:55 +07:00
|
|
|
static void ipu_plane_atomic_disable(struct drm_plane *plane,
|
|
|
|
struct drm_plane_state *old_state)
|
|
|
|
{
|
2017-02-25 00:31:05 +07:00
|
|
|
struct ipu_plane *ipu_plane = to_ipu_plane(plane);
|
|
|
|
|
|
|
|
if (ipu_plane->dp)
|
|
|
|
ipu_dp_disable_channel(ipu_plane->dp, true);
|
|
|
|
ipu_plane->disabling = true;
|
2016-07-08 16:40:55 +07:00
|
|
|
}
|
|
|
|
|
2017-03-08 18:13:21 +07:00
|
|
|
static int ipu_chan_assign_axi_id(int ipu_chan)
|
|
|
|
{
|
|
|
|
switch (ipu_chan) {
|
|
|
|
case IPUV3_CHANNEL_MEM_BG_SYNC:
|
|
|
|
return 1;
|
|
|
|
case IPUV3_CHANNEL_MEM_FG_SYNC:
|
|
|
|
return 2;
|
|
|
|
case IPUV3_CHANNEL_MEM_DC_SYNC:
|
|
|
|
return 3;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-05-19 21:05:51 +07:00
|
|
|
static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
|
|
|
|
u8 *burstsize, u8 *num_bursts)
|
|
|
|
{
|
|
|
|
const unsigned int width_bytes = width * cpp;
|
|
|
|
unsigned int npb, bursts;
|
|
|
|
|
|
|
|
/* Maximum number of pixels per burst without overshooting stride */
|
|
|
|
for (npb = 64 / cpp; npb > 0; --npb) {
|
|
|
|
if (round_up(width_bytes, npb * cpp) <= stride)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
*burstsize = npb;
|
|
|
|
|
|
|
|
/* Maximum number of consecutive bursts without overshooting stride */
|
|
|
|
for (bursts = 8; bursts > 1; bursts /= 2) {
|
|
|
|
if (round_up(width_bytes, npb * cpp * bursts) <= stride)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
*num_bursts = bursts;
|
|
|
|
}
|
|
|
|
|
2016-07-08 16:40:55 +07:00
|
|
|
static void ipu_plane_atomic_update(struct drm_plane *plane,
|
|
|
|
struct drm_plane_state *old_state)
|
2013-10-10 21:18:45 +07:00
|
|
|
{
|
|
|
|
struct ipu_plane *ipu_plane = to_ipu_plane(plane);
|
2016-07-08 16:40:55 +07:00
|
|
|
struct drm_plane_state *state = plane->state;
|
2017-03-08 18:13:21 +07:00
|
|
|
struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
|
2016-10-18 16:40:25 +07:00
|
|
|
struct drm_crtc_state *crtc_state = state->crtc->state;
|
|
|
|
struct drm_framebuffer *fb = state->fb;
|
2016-10-20 20:37:52 +07:00
|
|
|
struct drm_rect *dst = &state->dst;
|
2016-10-18 16:40:25 +07:00
|
|
|
unsigned long eba, ubo, vbo;
|
2016-07-22 17:02:45 +07:00
|
|
|
unsigned long alpha_eba = 0;
|
2016-07-08 16:40:55 +07:00
|
|
|
enum ipu_color_space ics;
|
2017-03-08 18:13:21 +07:00
|
|
|
unsigned int axi_id = 0;
|
2017-05-19 21:05:51 +07:00
|
|
|
const struct drm_format_info *info;
|
|
|
|
u8 burstsize, num_bursts;
|
|
|
|
u32 width, height;
|
2016-10-18 16:40:25 +07:00
|
|
|
int active;
|
2013-10-10 21:18:45 +07:00
|
|
|
|
2016-10-20 20:37:52 +07:00
|
|
|
if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
|
|
|
|
ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
|
|
|
|
|
2016-07-22 17:01:11 +07:00
|
|
|
eba = drm_plane_state_to_eba(state, 0);
|
2016-08-26 14:30:43 +07:00
|
|
|
|
2017-03-08 18:13:21 +07:00
|
|
|
/*
|
|
|
|
* Configure PRG channel and attached PRE, this changes the EBA to an
|
|
|
|
* internal SRAM location.
|
|
|
|
*/
|
|
|
|
if (ipu_state->use_pre) {
|
|
|
|
axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
|
|
|
|
ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
|
|
|
|
drm_rect_width(&state->src) >> 16,
|
|
|
|
drm_rect_height(&state->src) >> 16,
|
2017-11-10 23:09:59 +07:00
|
|
|
fb->pitches[0], fb->format->format,
|
2017-11-10 23:10:00 +07:00
|
|
|
fb->modifier, &eba);
|
2017-03-08 18:13:21 +07:00
|
|
|
}
|
|
|
|
|
2016-10-18 16:40:25 +07:00
|
|
|
if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
|
2017-03-08 18:13:21 +07:00
|
|
|
/* nothing to do if PRE is used */
|
|
|
|
if (ipu_state->use_pre)
|
|
|
|
return;
|
2016-10-18 16:40:25 +07:00
|
|
|
active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
|
|
|
|
ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
|
|
|
|
ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
|
2016-07-22 17:02:45 +07:00
|
|
|
if (ipu_plane_separate_alpha(ipu_plane)) {
|
|
|
|
active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
|
|
|
|
ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
|
|
|
|
alpha_eba);
|
|
|
|
ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
|
|
|
|
}
|
2016-10-18 16:40:25 +07:00
|
|
|
return;
|
2016-07-08 16:40:55 +07:00
|
|
|
}
|
2013-10-10 21:18:45 +07:00
|
|
|
|
2016-08-05 16:55:18 +07:00
|
|
|
ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
|
2016-07-08 16:40:55 +07:00
|
|
|
switch (ipu_plane->dp_flow) {
|
|
|
|
case IPU_DP_FLOW_SYNC_BG:
|
2016-08-05 16:55:18 +07:00
|
|
|
ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);
|
2016-07-08 16:40:55 +07:00
|
|
|
ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
|
|
|
|
break;
|
|
|
|
case IPU_DP_FLOW_SYNC_FG:
|
|
|
|
ipu_dp_setup_channel(ipu_plane->dp, ics,
|
|
|
|
IPUV3_COLORSPACE_UNKNOWN);
|
|
|
|
/* Enable local alpha on partial plane */
|
2017-05-19 22:47:33 +07:00
|
|
|
switch (fb->format->format) {
|
2016-07-08 16:40:55 +07:00
|
|
|
case DRM_FORMAT_ARGB1555:
|
|
|
|
case DRM_FORMAT_ABGR1555:
|
|
|
|
case DRM_FORMAT_RGBA5551:
|
|
|
|
case DRM_FORMAT_BGRA5551:
|
|
|
|
case DRM_FORMAT_ARGB4444:
|
|
|
|
case DRM_FORMAT_ARGB8888:
|
|
|
|
case DRM_FORMAT_ABGR8888:
|
|
|
|
case DRM_FORMAT_RGBA8888:
|
|
|
|
case DRM_FORMAT_BGRA8888:
|
2016-07-22 17:02:45 +07:00
|
|
|
case DRM_FORMAT_RGB565_A8:
|
|
|
|
case DRM_FORMAT_BGR565_A8:
|
|
|
|
case DRM_FORMAT_RGB888_A8:
|
|
|
|
case DRM_FORMAT_BGR888_A8:
|
|
|
|
case DRM_FORMAT_RGBX8888_A8:
|
|
|
|
case DRM_FORMAT_BGRX8888_A8:
|
2016-07-08 16:40:55 +07:00
|
|
|
ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
|
|
|
|
break;
|
|
|
|
default:
|
2016-10-18 22:09:30 +07:00
|
|
|
ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
|
2016-07-08 16:40:55 +07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-10-20 20:37:52 +07:00
|
|
|
ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
|
2016-07-08 16:40:55 +07:00
|
|
|
|
2017-05-19 21:05:51 +07:00
|
|
|
width = drm_rect_width(&state->src) >> 16;
|
|
|
|
height = drm_rect_height(&state->src) >> 16;
|
|
|
|
info = drm_format_info(fb->format->format);
|
|
|
|
ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
|
|
|
|
&burstsize, &num_bursts);
|
|
|
|
|
2016-07-08 16:40:55 +07:00
|
|
|
ipu_cpmem_zero(ipu_plane->ipu_ch);
|
2017-05-19 21:05:51 +07:00
|
|
|
ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
|
2017-05-19 22:47:33 +07:00
|
|
|
ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
|
2017-05-19 21:05:51 +07:00
|
|
|
ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
|
2016-07-08 16:40:55 +07:00
|
|
|
ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
|
|
|
|
ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
|
2017-05-19 22:47:33 +07:00
|
|
|
ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
|
2017-03-08 18:13:21 +07:00
|
|
|
ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
|
2017-05-19 21:05:51 +07:00
|
|
|
|
2016-12-15 04:32:55 +07:00
|
|
|
switch (fb->format->format) {
|
2016-10-18 16:40:25 +07:00
|
|
|
case DRM_FORMAT_YUV420:
|
|
|
|
case DRM_FORMAT_YVU420:
|
2016-10-18 17:31:40 +07:00
|
|
|
case DRM_FORMAT_YUV422:
|
|
|
|
case DRM_FORMAT_YVU422:
|
|
|
|
case DRM_FORMAT_YUV444:
|
|
|
|
case DRM_FORMAT_YVU444:
|
2016-10-18 16:40:25 +07:00
|
|
|
ubo = drm_plane_state_to_ubo(state);
|
|
|
|
vbo = drm_plane_state_to_vbo(state);
|
2016-12-15 04:32:55 +07:00
|
|
|
if (fb->format->format == DRM_FORMAT_YVU420 ||
|
|
|
|
fb->format->format == DRM_FORMAT_YVU422 ||
|
|
|
|
fb->format->format == DRM_FORMAT_YVU444)
|
2016-10-18 17:31:40 +07:00
|
|
|
swap(ubo, vbo);
|
2016-10-18 16:40:25 +07:00
|
|
|
|
2016-10-18 17:31:40 +07:00
|
|
|
ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
|
|
|
|
fb->pitches[1], ubo, vbo);
|
2016-10-18 16:40:25 +07:00
|
|
|
|
|
|
|
dev_dbg(ipu_plane->base.dev->dev,
|
|
|
|
"phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
|
2016-10-19 15:50:26 +07:00
|
|
|
state->src.x1 >> 16, state->src.y1 >> 16);
|
2016-10-18 16:40:25 +07:00
|
|
|
break;
|
2016-10-18 17:31:40 +07:00
|
|
|
case DRM_FORMAT_NV12:
|
|
|
|
case DRM_FORMAT_NV16:
|
|
|
|
ubo = drm_plane_state_to_ubo(state);
|
|
|
|
|
|
|
|
ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
|
|
|
|
fb->pitches[1], ubo, ubo);
|
|
|
|
|
|
|
|
dev_dbg(ipu_plane->base.dev->dev,
|
|
|
|
"phy = %lu %lu, x = %d, y = %d", eba, ubo,
|
2016-10-19 15:50:26 +07:00
|
|
|
state->src.x1 >> 16, state->src.y1 >> 16);
|
2016-10-18 17:31:40 +07:00
|
|
|
break;
|
2016-07-22 17:02:45 +07:00
|
|
|
case DRM_FORMAT_RGB565_A8:
|
|
|
|
case DRM_FORMAT_BGR565_A8:
|
|
|
|
case DRM_FORMAT_RGB888_A8:
|
|
|
|
case DRM_FORMAT_BGR888_A8:
|
|
|
|
case DRM_FORMAT_RGBX8888_A8:
|
|
|
|
case DRM_FORMAT_BGRX8888_A8:
|
|
|
|
alpha_eba = drm_plane_state_to_eba(state, 1);
|
2017-05-19 21:05:51 +07:00
|
|
|
num_bursts = 0;
|
2016-07-22 17:02:45 +07:00
|
|
|
|
|
|
|
dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
|
|
|
|
eba, alpha_eba, state->src.x1 >> 16, state->src.y1 >> 16);
|
|
|
|
|
|
|
|
ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
|
|
|
|
|
|
|
|
ipu_cpmem_zero(ipu_plane->alpha_ch);
|
|
|
|
ipu_cpmem_set_resolution(ipu_plane->alpha_ch,
|
|
|
|
drm_rect_width(&state->src) >> 16,
|
|
|
|
drm_rect_height(&state->src) >> 16);
|
|
|
|
ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
|
|
|
|
ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
|
|
|
|
ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
|
2017-05-19 22:47:33 +07:00
|
|
|
ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
|
2016-07-22 17:02:45 +07:00
|
|
|
ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
|
|
|
|
ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
|
|
|
|
ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
|
|
|
|
break;
|
2016-10-18 16:40:25 +07:00
|
|
|
default:
|
|
|
|
dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
|
2016-10-19 15:50:26 +07:00
|
|
|
eba, state->src.x1 >> 16, state->src.y1 >> 16);
|
2016-10-18 16:40:25 +07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
|
|
|
|
ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
|
2017-05-19 21:05:51 +07:00
|
|
|
ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
|
2016-07-08 16:40:55 +07:00
|
|
|
ipu_plane_enable(ipu_plane);
|
2013-10-10 21:18:45 +07:00
|
|
|
}
|
|
|
|
|
2016-07-08 16:40:55 +07:00
|
|
|
static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
|
2017-08-13 20:31:53 +07:00
|
|
|
.prepare_fb = drm_gem_fb_prepare_fb,
|
2016-07-08 16:40:55 +07:00
|
|
|
.atomic_check = ipu_plane_atomic_check,
|
|
|
|
.atomic_disable = ipu_plane_atomic_disable,
|
|
|
|
.atomic_update = ipu_plane_atomic_update,
|
2013-10-10 21:18:45 +07:00
|
|
|
};
|
|
|
|
|
2017-03-08 18:13:21 +07:00
|
|
|
int ipu_planes_assign_pre(struct drm_device *dev,
|
|
|
|
struct drm_atomic_state *state)
|
|
|
|
{
|
2017-11-10 23:10:00 +07:00
|
|
|
struct drm_crtc_state *old_crtc_state, *crtc_state;
|
2017-03-08 18:13:21 +07:00
|
|
|
struct drm_plane_state *plane_state;
|
2017-11-10 23:10:00 +07:00
|
|
|
struct ipu_plane_state *ipu_state;
|
|
|
|
struct ipu_plane *ipu_plane;
|
2017-03-08 18:13:21 +07:00
|
|
|
struct drm_plane *plane;
|
2017-11-10 23:10:00 +07:00
|
|
|
struct drm_crtc *crtc;
|
2017-03-08 18:13:21 +07:00
|
|
|
int available_pres = ipu_prg_max_active_channels();
|
2017-11-10 23:10:00 +07:00
|
|
|
int ret, i;
|
2017-03-08 18:13:21 +07:00
|
|
|
|
2017-11-10 23:10:00 +07:00
|
|
|
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
|
|
|
|
ret = drm_atomic_add_affected_planes(state, crtc);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
2017-03-08 18:13:21 +07:00
|
|
|
|
2017-11-10 23:10:00 +07:00
|
|
|
/*
|
|
|
|
* We are going over the planes in 2 passes: first we assign PREs to
|
|
|
|
* planes with a tiling modifier, which need the PREs to resolve into
|
|
|
|
* linear. Any failure to assign a PRE there is fatal. In the second
|
|
|
|
* pass we try to assign PREs to linear FBs, to improve memory access
|
|
|
|
* patterns for them. Failure at this point is non-fatal, as we can
|
|
|
|
* scan out linear FBs without a PRE.
|
|
|
|
*/
|
2017-07-12 15:13:40 +07:00
|
|
|
for_each_new_plane_in_state(state, plane, plane_state, i) {
|
2017-11-10 23:10:00 +07:00
|
|
|
ipu_state = to_ipu_plane_state(plane_state);
|
|
|
|
ipu_plane = to_ipu_plane(plane);
|
|
|
|
|
|
|
|
if (!plane_state->fb) {
|
|
|
|
ipu_state->use_pre = false;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
|
|
|
|
plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!ipu_prg_format_supported(ipu_plane->ipu,
|
|
|
|
plane_state->fb->format->format,
|
|
|
|
plane_state->fb->modifier))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
ipu_state->use_pre = true;
|
|
|
|
available_pres--;
|
|
|
|
}
|
|
|
|
|
|
|
|
for_each_new_plane_in_state(state, plane, plane_state, i) {
|
|
|
|
ipu_state = to_ipu_plane_state(plane_state);
|
|
|
|
ipu_plane = to_ipu_plane(plane);
|
|
|
|
|
|
|
|
if (!plane_state->fb) {
|
|
|
|
ipu_state->use_pre = false;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
|
|
|
|
plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/* make sure that modifier is initialized */
|
|
|
|
plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
|
2017-03-08 18:13:21 +07:00
|
|
|
|
|
|
|
if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
|
|
|
|
ipu_prg_format_supported(ipu_plane->ipu,
|
|
|
|
plane_state->fb->format->format,
|
|
|
|
plane_state->fb->modifier)) {
|
|
|
|
ipu_state->use_pre = true;
|
|
|
|
available_pres--;
|
|
|
|
} else {
|
|
|
|
ipu_state->use_pre = false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(ipu_planes_assign_pre);
|
|
|
|
|
2013-10-10 21:18:45 +07:00
|
|
|
struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
|
|
|
|
int dma, int dp, unsigned int possible_crtcs,
|
2015-11-06 17:08:02 +07:00
|
|
|
enum drm_plane_type type)
|
2013-10-10 21:18:45 +07:00
|
|
|
{
|
|
|
|
struct ipu_plane *ipu_plane;
|
2017-11-10 23:10:01 +07:00
|
|
|
const uint64_t *modifiers = ipu_format_modifiers;
|
2013-10-10 21:18:45 +07:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
|
|
|
|
dma, dp, possible_crtcs);
|
|
|
|
|
|
|
|
ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
|
|
|
|
if (!ipu_plane) {
|
|
|
|
DRM_ERROR("failed to allocate plane\n");
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
}
|
|
|
|
|
|
|
|
ipu_plane->ipu = ipu;
|
|
|
|
ipu_plane->dma = dma;
|
|
|
|
ipu_plane->dp_flow = dp;
|
|
|
|
|
2017-11-10 23:10:01 +07:00
|
|
|
if (ipu_prg_present(ipu))
|
|
|
|
modifiers = pre_format_modifiers;
|
|
|
|
|
2015-11-06 17:08:02 +07:00
|
|
|
ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
|
|
|
|
&ipu_plane_funcs, ipu_plane_formats,
|
2017-07-24 10:46:38 +07:00
|
|
|
ARRAY_SIZE(ipu_plane_formats),
|
2017-11-10 23:10:01 +07:00
|
|
|
modifiers, type, NULL);
|
2013-10-10 21:18:45 +07:00
|
|
|
if (ret) {
|
|
|
|
DRM_ERROR("failed to initialize plane\n");
|
|
|
|
kfree(ipu_plane);
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|
|
|
|
|
2016-07-08 16:40:55 +07:00
|
|
|
drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
|
|
|
|
|
2013-10-10 21:18:45 +07:00
|
|
|
return ipu_plane;
|
|
|
|
}
|