2016-02-06 01:37:17 +07:00
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/*
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* Device Tree Source for K2G EVM
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*
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* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "keystone-k2g.dtsi"
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/ {
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compatible = "ti,k2g-evm", "ti,k2g", "ti,keystone";
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model = "Texas Instruments K2G General Purpose EVM";
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2017-05-22 12:46:56 +07:00
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memory@800000000 {
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2016-02-06 01:37:17 +07:00
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device_type = "memory";
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reg = <0x00000008 0x00000000 0x00000000 0x80000000>;
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};
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2017-08-13 00:58:10 +07:00
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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dsp_common_memory: dsp-common-memory@81f800000 {
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compatible = "shared-dma-pool";
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reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
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reusable;
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status = "okay";
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};
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};
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2017-08-07 20:36:08 +07:00
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vcc3v3_dcin_reg: fixedregulator-vcc3v3-dcin {
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compatible = "regulator-fixed";
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regulator-name = "mmc0_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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2016-02-06 01:37:17 +07:00
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};
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2016-06-09 23:40:21 +07:00
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&k2g_pinctrl {
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */
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K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
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>;
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};
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2017-08-07 20:36:08 +07:00
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mmc0_pins: pinmux_mmc0_pins {
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pinctrl-single,pins = <
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K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat3.mmc0_dat3 */
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K2G_CORE_IOPAD(0x1304) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat2.mmc0_dat2 */
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K2G_CORE_IOPAD(0x1308) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat1.mmc0_dat1 */
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K2G_CORE_IOPAD(0x130c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat0.mmc0_dat0 */
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K2G_CORE_IOPAD(0x1310) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_clk.mmc0_clk */
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K2G_CORE_IOPAD(0x1314) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_cmd.mmc0_cmd */
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K2G_CORE_IOPAD(0x12ec) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* mmc0_sdcd.gpio1_12 */
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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K2G_CORE_IOPAD(0x10ec) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat7.mmc1_dat7 */
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K2G_CORE_IOPAD(0x10f0) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat6.mmc1_dat6 */
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K2G_CORE_IOPAD(0x10f4) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat5.mmc1_dat5 */
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K2G_CORE_IOPAD(0x10f8) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat4.mmc1_dat4 */
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K2G_CORE_IOPAD(0x10fc) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */
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K2G_CORE_IOPAD(0x1100) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */
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K2G_CORE_IOPAD(0x1104) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */
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K2G_CORE_IOPAD(0x1108) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */
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K2G_CORE_IOPAD(0x110c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_clk.mmc1_clk */
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K2G_CORE_IOPAD(0x1110) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */
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>;
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};
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2016-06-09 23:40:21 +07:00
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};
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2016-02-06 01:37:17 +07:00
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&uart0 {
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2016-06-09 23:40:21 +07:00
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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2016-02-06 01:37:17 +07:00
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status = "okay";
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};
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2017-08-07 20:36:08 +07:00
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&gpio1 {
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status = "okay";
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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vmmc-supply = <&vcc3v3_dcin_reg>;
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cd-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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vmmc-supply = <&vcc3v3_dcin_reg>; /* VCC3V3_EMMC is connected to VCC3V3_DCIN */
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status = "okay";
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};
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2017-08-13 00:58:10 +07:00
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&dsp0 {
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memory-region = <&dsp_common_memory>;
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status = "okay";
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};
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