2018-09-12 16:52:47 +07:00
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// SPDX-License-Identifier: GPL-2.0
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2016-05-05 15:51:40 +07:00
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*/
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#include <linux/platform_device.h>
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#include "tsens.h"
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2019-03-20 20:17:50 +07:00
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/* ----- SROT ------ */
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#define SROT_CTRL_OFF 0x0000
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/* ----- TM ------ */
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#define TM_INT_EN_OFF 0x0000
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#define TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF 0x0004
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#define TM_Sn_STATUS_OFF 0x0030
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#define TM_TRDY_OFF 0x005c
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2016-05-05 15:51:40 +07:00
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/* eeprom layout data for 8916 */
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2019-03-20 20:17:48 +07:00
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#define MSM8916_BASE0_MASK 0x0000007f
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#define MSM8916_BASE1_MASK 0xfe000000
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#define MSM8916_BASE0_SHIFT 0
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#define MSM8916_BASE1_SHIFT 25
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#define MSM8916_S0_P1_MASK 0x00000f80
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#define MSM8916_S1_P1_MASK 0x003e0000
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#define MSM8916_S2_P1_MASK 0xf8000000
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#define MSM8916_S3_P1_MASK 0x000003e0
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#define MSM8916_S4_P1_MASK 0x000f8000
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#define MSM8916_S0_P2_MASK 0x0001f000
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#define MSM8916_S1_P2_MASK 0x07c00000
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#define MSM8916_S2_P2_MASK 0x0000001f
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#define MSM8916_S3_P2_MASK 0x00007c00
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#define MSM8916_S4_P2_MASK 0x01f00000
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#define MSM8916_S0_P1_SHIFT 7
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#define MSM8916_S1_P1_SHIFT 17
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#define MSM8916_S2_P1_SHIFT 27
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#define MSM8916_S3_P1_SHIFT 5
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#define MSM8916_S4_P1_SHIFT 15
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#define MSM8916_S0_P2_SHIFT 12
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#define MSM8916_S1_P2_SHIFT 22
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#define MSM8916_S2_P2_SHIFT 0
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#define MSM8916_S3_P2_SHIFT 10
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#define MSM8916_S4_P2_SHIFT 20
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#define MSM8916_CAL_SEL_MASK 0xe0000000
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#define MSM8916_CAL_SEL_SHIFT 29
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2016-05-05 15:51:40 +07:00
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2019-03-20 20:17:49 +07:00
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/* eeprom layout data for 8974 */
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#define BASE1_MASK 0xff
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#define S0_P1_MASK 0x3f00
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#define S1_P1_MASK 0xfc000
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#define S2_P1_MASK 0x3f00000
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#define S3_P1_MASK 0xfc000000
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#define S4_P1_MASK 0x3f
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#define S5_P1_MASK 0xfc0
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#define S6_P1_MASK 0x3f000
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#define S7_P1_MASK 0xfc0000
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#define S8_P1_MASK 0x3f000000
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#define S8_P1_MASK_BKP 0x3f
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#define S9_P1_MASK 0x3f
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#define S9_P1_MASK_BKP 0xfc0
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#define S10_P1_MASK 0xfc0
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#define S10_P1_MASK_BKP 0x3f000
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#define CAL_SEL_0_1 0xc0000000
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#define CAL_SEL_2 0x40000000
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#define CAL_SEL_SHIFT 30
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#define CAL_SEL_SHIFT_2 28
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#define S0_P1_SHIFT 8
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#define S1_P1_SHIFT 14
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#define S2_P1_SHIFT 20
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#define S3_P1_SHIFT 26
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#define S5_P1_SHIFT 6
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#define S6_P1_SHIFT 12
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#define S7_P1_SHIFT 18
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#define S8_P1_SHIFT 24
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#define S9_P1_BKP_SHIFT 6
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#define S10_P1_SHIFT 6
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#define S10_P1_BKP_SHIFT 12
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#define BASE2_SHIFT 12
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#define BASE2_BKP_SHIFT 18
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#define S0_P2_SHIFT 20
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#define S0_P2_BKP_SHIFT 26
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#define S1_P2_SHIFT 26
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#define S2_P2_BKP_SHIFT 6
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#define S3_P2_SHIFT 6
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#define S3_P2_BKP_SHIFT 12
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#define S4_P2_SHIFT 12
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#define S4_P2_BKP_SHIFT 18
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#define S5_P2_SHIFT 18
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#define S5_P2_BKP_SHIFT 24
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#define S6_P2_SHIFT 24
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#define S7_P2_BKP_SHIFT 6
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#define S8_P2_SHIFT 6
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#define S8_P2_BKP_SHIFT 12
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#define S9_P2_SHIFT 12
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#define S9_P2_BKP_SHIFT 18
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#define S10_P2_SHIFT 18
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#define S10_P2_BKP_SHIFT 24
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#define BASE2_MASK 0xff000
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#define BASE2_BKP_MASK 0xfc0000
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#define S0_P2_MASK 0x3f00000
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#define S0_P2_BKP_MASK 0xfc000000
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#define S1_P2_MASK 0xfc000000
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#define S1_P2_BKP_MASK 0x3f
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#define S2_P2_MASK 0x3f
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#define S2_P2_BKP_MASK 0xfc0
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#define S3_P2_MASK 0xfc0
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#define S3_P2_BKP_MASK 0x3f000
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#define S4_P2_MASK 0x3f000
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#define S4_P2_BKP_MASK 0xfc0000
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#define S5_P2_MASK 0xfc0000
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#define S5_P2_BKP_MASK 0x3f000000
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#define S6_P2_MASK 0x3f000000
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#define S6_P2_BKP_MASK 0x3f
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#define S7_P2_MASK 0x3f
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#define S7_P2_BKP_MASK 0xfc0
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#define S8_P2_MASK 0xfc0
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#define S8_P2_BKP_MASK 0x3f000
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#define S9_P2_MASK 0x3f000
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#define S9_P2_BKP_MASK 0xfc0000
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#define S10_P2_MASK 0xfc0000
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#define S10_P2_BKP_MASK 0x3f000000
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#define BKP_SEL 0x3
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#define BKP_REDUN_SEL 0xe0000000
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#define BKP_REDUN_SHIFT 29
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#define BIT_APPEND 0x3
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2019-03-20 20:17:44 +07:00
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static int calibrate_8916(struct tsens_priv *priv)
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2016-05-05 15:51:40 +07:00
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{
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int base0 = 0, base1 = 0, i;
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u32 p1[5], p2[5];
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int mode = 0;
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u32 *qfprom_cdata, *qfprom_csel;
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2019-03-20 20:17:44 +07:00
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qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
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2016-05-05 15:51:40 +07:00
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if (IS_ERR(qfprom_cdata))
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return PTR_ERR(qfprom_cdata);
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2019-03-20 20:17:44 +07:00
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qfprom_csel = (u32 *)qfprom_read(priv->dev, "calib_sel");
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2019-08-23 16:38:35 +07:00
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if (IS_ERR(qfprom_csel)) {
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kfree(qfprom_cdata);
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2016-05-05 15:51:40 +07:00
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return PTR_ERR(qfprom_csel);
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2019-08-23 16:38:35 +07:00
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}
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2016-05-05 15:51:40 +07:00
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2019-03-20 20:17:48 +07:00
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mode = (qfprom_csel[0] & MSM8916_CAL_SEL_MASK) >> MSM8916_CAL_SEL_SHIFT;
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2019-03-20 20:17:44 +07:00
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dev_dbg(priv->dev, "calibration mode is %d\n", mode);
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2016-05-05 15:51:40 +07:00
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switch (mode) {
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case TWO_PT_CALIB:
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2019-03-20 20:17:48 +07:00
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base1 = (qfprom_cdata[1] & MSM8916_BASE1_MASK) >> MSM8916_BASE1_SHIFT;
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p2[0] = (qfprom_cdata[0] & MSM8916_S0_P2_MASK) >> MSM8916_S0_P2_SHIFT;
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p2[1] = (qfprom_cdata[0] & MSM8916_S1_P2_MASK) >> MSM8916_S1_P2_SHIFT;
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p2[2] = (qfprom_cdata[1] & MSM8916_S2_P2_MASK) >> MSM8916_S2_P2_SHIFT;
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p2[3] = (qfprom_cdata[1] & MSM8916_S3_P2_MASK) >> MSM8916_S3_P2_SHIFT;
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p2[4] = (qfprom_cdata[1] & MSM8916_S4_P2_MASK) >> MSM8916_S4_P2_SHIFT;
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2019-03-20 20:17:44 +07:00
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for (i = 0; i < priv->num_sensors; i++)
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2016-05-05 15:51:40 +07:00
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p2[i] = ((base1 + p2[i]) << 3);
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/* Fall through */
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case ONE_PT_CALIB2:
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2019-03-20 20:17:48 +07:00
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base0 = (qfprom_cdata[0] & MSM8916_BASE0_MASK);
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p1[0] = (qfprom_cdata[0] & MSM8916_S0_P1_MASK) >> MSM8916_S0_P1_SHIFT;
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p1[1] = (qfprom_cdata[0] & MSM8916_S1_P1_MASK) >> MSM8916_S1_P1_SHIFT;
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p1[2] = (qfprom_cdata[0] & MSM8916_S2_P1_MASK) >> MSM8916_S2_P1_SHIFT;
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p1[3] = (qfprom_cdata[1] & MSM8916_S3_P1_MASK) >> MSM8916_S3_P1_SHIFT;
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p1[4] = (qfprom_cdata[1] & MSM8916_S4_P1_MASK) >> MSM8916_S4_P1_SHIFT;
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2019-03-20 20:17:44 +07:00
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for (i = 0; i < priv->num_sensors; i++)
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2016-05-05 15:51:40 +07:00
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p1[i] = (((base0) + p1[i]) << 3);
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break;
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default:
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2019-03-20 20:17:44 +07:00
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for (i = 0; i < priv->num_sensors; i++) {
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2016-05-05 15:51:40 +07:00
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p1[i] = 500;
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p2[i] = 780;
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}
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break;
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}
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2019-03-20 20:17:44 +07:00
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compute_intercept_slope(priv, p1, p2, mode);
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2019-08-23 16:38:35 +07:00
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kfree(qfprom_cdata);
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kfree(qfprom_csel);
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2016-05-05 15:51:40 +07:00
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return 0;
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}
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2019-03-20 20:17:49 +07:00
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static int calibrate_8974(struct tsens_priv *priv)
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{
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int base1 = 0, base2 = 0, i;
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u32 p1[11], p2[11];
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int mode = 0;
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u32 *calib, *bkp;
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u32 calib_redun_sel;
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calib = (u32 *)qfprom_read(priv->dev, "calib");
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if (IS_ERR(calib))
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return PTR_ERR(calib);
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bkp = (u32 *)qfprom_read(priv->dev, "calib_backup");
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2019-08-23 16:38:35 +07:00
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if (IS_ERR(bkp)) {
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kfree(calib);
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2019-03-20 20:17:49 +07:00
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return PTR_ERR(bkp);
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2019-08-23 16:38:35 +07:00
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}
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2019-03-20 20:17:49 +07:00
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calib_redun_sel = bkp[1] & BKP_REDUN_SEL;
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calib_redun_sel >>= BKP_REDUN_SHIFT;
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if (calib_redun_sel == BKP_SEL) {
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mode = (calib[4] & CAL_SEL_0_1) >> CAL_SEL_SHIFT;
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mode |= (calib[5] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;
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switch (mode) {
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case TWO_PT_CALIB:
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base2 = (bkp[2] & BASE2_BKP_MASK) >> BASE2_BKP_SHIFT;
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p2[0] = (bkp[2] & S0_P2_BKP_MASK) >> S0_P2_BKP_SHIFT;
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p2[1] = (bkp[3] & S1_P2_BKP_MASK);
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p2[2] = (bkp[3] & S2_P2_BKP_MASK) >> S2_P2_BKP_SHIFT;
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p2[3] = (bkp[3] & S3_P2_BKP_MASK) >> S3_P2_BKP_SHIFT;
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p2[4] = (bkp[3] & S4_P2_BKP_MASK) >> S4_P2_BKP_SHIFT;
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p2[5] = (calib[4] & S5_P2_BKP_MASK) >> S5_P2_BKP_SHIFT;
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p2[6] = (calib[5] & S6_P2_BKP_MASK);
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p2[7] = (calib[5] & S7_P2_BKP_MASK) >> S7_P2_BKP_SHIFT;
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p2[8] = (calib[5] & S8_P2_BKP_MASK) >> S8_P2_BKP_SHIFT;
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p2[9] = (calib[5] & S9_P2_BKP_MASK) >> S9_P2_BKP_SHIFT;
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p2[10] = (calib[5] & S10_P2_BKP_MASK) >> S10_P2_BKP_SHIFT;
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/* Fall through */
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case ONE_PT_CALIB:
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case ONE_PT_CALIB2:
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base1 = bkp[0] & BASE1_MASK;
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p1[0] = (bkp[0] & S0_P1_MASK) >> S0_P1_SHIFT;
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p1[1] = (bkp[0] & S1_P1_MASK) >> S1_P1_SHIFT;
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p1[2] = (bkp[0] & S2_P1_MASK) >> S2_P1_SHIFT;
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p1[3] = (bkp[0] & S3_P1_MASK) >> S3_P1_SHIFT;
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p1[4] = (bkp[1] & S4_P1_MASK);
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p1[5] = (bkp[1] & S5_P1_MASK) >> S5_P1_SHIFT;
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p1[6] = (bkp[1] & S6_P1_MASK) >> S6_P1_SHIFT;
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p1[7] = (bkp[1] & S7_P1_MASK) >> S7_P1_SHIFT;
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p1[8] = (bkp[2] & S8_P1_MASK_BKP) >> S8_P1_SHIFT;
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p1[9] = (bkp[2] & S9_P1_MASK_BKP) >> S9_P1_BKP_SHIFT;
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p1[10] = (bkp[2] & S10_P1_MASK_BKP) >> S10_P1_BKP_SHIFT;
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break;
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}
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} else {
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mode = (calib[1] & CAL_SEL_0_1) >> CAL_SEL_SHIFT;
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mode |= (calib[3] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;
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switch (mode) {
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case TWO_PT_CALIB:
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base2 = (calib[2] & BASE2_MASK) >> BASE2_SHIFT;
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p2[0] = (calib[2] & S0_P2_MASK) >> S0_P2_SHIFT;
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p2[1] = (calib[2] & S1_P2_MASK) >> S1_P2_SHIFT;
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p2[2] = (calib[3] & S2_P2_MASK);
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p2[3] = (calib[3] & S3_P2_MASK) >> S3_P2_SHIFT;
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p2[4] = (calib[3] & S4_P2_MASK) >> S4_P2_SHIFT;
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p2[5] = (calib[3] & S5_P2_MASK) >> S5_P2_SHIFT;
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p2[6] = (calib[3] & S6_P2_MASK) >> S6_P2_SHIFT;
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p2[7] = (calib[4] & S7_P2_MASK);
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p2[8] = (calib[4] & S8_P2_MASK) >> S8_P2_SHIFT;
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p2[9] = (calib[4] & S9_P2_MASK) >> S9_P2_SHIFT;
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p2[10] = (calib[4] & S10_P2_MASK) >> S10_P2_SHIFT;
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/* Fall through */
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case ONE_PT_CALIB:
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case ONE_PT_CALIB2:
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base1 = calib[0] & BASE1_MASK;
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p1[0] = (calib[0] & S0_P1_MASK) >> S0_P1_SHIFT;
|
|
|
|
p1[1] = (calib[0] & S1_P1_MASK) >> S1_P1_SHIFT;
|
|
|
|
p1[2] = (calib[0] & S2_P1_MASK) >> S2_P1_SHIFT;
|
|
|
|
p1[3] = (calib[0] & S3_P1_MASK) >> S3_P1_SHIFT;
|
|
|
|
p1[4] = (calib[1] & S4_P1_MASK);
|
|
|
|
p1[5] = (calib[1] & S5_P1_MASK) >> S5_P1_SHIFT;
|
|
|
|
p1[6] = (calib[1] & S6_P1_MASK) >> S6_P1_SHIFT;
|
|
|
|
p1[7] = (calib[1] & S7_P1_MASK) >> S7_P1_SHIFT;
|
|
|
|
p1[8] = (calib[1] & S8_P1_MASK) >> S8_P1_SHIFT;
|
|
|
|
p1[9] = (calib[2] & S9_P1_MASK);
|
|
|
|
p1[10] = (calib[2] & S10_P1_MASK) >> S10_P1_SHIFT;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (mode) {
|
|
|
|
case ONE_PT_CALIB:
|
|
|
|
for (i = 0; i < priv->num_sensors; i++)
|
|
|
|
p1[i] += (base1 << 2) | BIT_APPEND;
|
|
|
|
break;
|
|
|
|
case TWO_PT_CALIB:
|
|
|
|
for (i = 0; i < priv->num_sensors; i++) {
|
|
|
|
p2[i] += base2;
|
|
|
|
p2[i] <<= 2;
|
|
|
|
p2[i] |= BIT_APPEND;
|
|
|
|
}
|
|
|
|
/* Fall through */
|
|
|
|
case ONE_PT_CALIB2:
|
|
|
|
for (i = 0; i < priv->num_sensors; i++) {
|
|
|
|
p1[i] += base1;
|
|
|
|
p1[i] <<= 2;
|
|
|
|
p1[i] |= BIT_APPEND;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
for (i = 0; i < priv->num_sensors; i++)
|
|
|
|
p2[i] = 780;
|
|
|
|
p1[0] = 502;
|
|
|
|
p1[1] = 509;
|
|
|
|
p1[2] = 503;
|
|
|
|
p1[3] = 509;
|
|
|
|
p1[4] = 505;
|
|
|
|
p1[5] = 509;
|
|
|
|
p1[6] = 507;
|
|
|
|
p1[7] = 510;
|
|
|
|
p1[8] = 508;
|
|
|
|
p1[9] = 509;
|
|
|
|
p1[10] = 508;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
compute_intercept_slope(priv, p1, p2, mode);
|
2019-08-23 16:38:35 +07:00
|
|
|
kfree(calib);
|
|
|
|
kfree(bkp);
|
2019-03-20 20:17:49 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-03-20 20:17:50 +07:00
|
|
|
/* v0.1: 8916, 8974 */
|
|
|
|
|
|
|
|
static const struct tsens_features tsens_v0_1_feat = {
|
|
|
|
.ver_major = VER_0_1,
|
|
|
|
.crit_int = 0,
|
|
|
|
.adc = 1,
|
|
|
|
.srot_split = 1,
|
2019-03-20 20:17:55 +07:00
|
|
|
.max_sensors = 11,
|
2019-03-20 20:17:50 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] = {
|
|
|
|
/* ----- SROT ------ */
|
|
|
|
/* No VERSION information */
|
|
|
|
|
|
|
|
/* CTRL_OFFSET */
|
|
|
|
[TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
|
|
|
|
[TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
|
|
|
|
|
|
|
|
/* ----- TM ------ */
|
|
|
|
/* INTERRUPT ENABLE */
|
|
|
|
[INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0),
|
|
|
|
|
2019-11-01 01:37:39 +07:00
|
|
|
/* UPPER/LOWER TEMPERATURE THRESHOLDS */
|
|
|
|
REG_FIELD_FOR_EACH_SENSOR11(LOW_THRESH, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 0, 9),
|
|
|
|
REG_FIELD_FOR_EACH_SENSOR11(UP_THRESH, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 10, 19),
|
|
|
|
|
|
|
|
/* UPPER/LOWER INTERRUPTS [CLEAR/STATUS] */
|
|
|
|
REG_FIELD_FOR_EACH_SENSOR11(LOW_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 20, 20),
|
|
|
|
REG_FIELD_FOR_EACH_SENSOR11(UP_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 21, 21),
|
|
|
|
|
|
|
|
/* NO CRITICAL INTERRUPT SUPPORT on v0.1 */
|
|
|
|
|
2019-03-20 20:17:50 +07:00
|
|
|
/* Sn_STATUS */
|
|
|
|
REG_FIELD_FOR_EACH_SENSOR11(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 9),
|
|
|
|
/* No VALID field on v0.1 */
|
2019-11-01 01:37:39 +07:00
|
|
|
/* xxx_STATUS bits: 1 == threshold violated */
|
2019-03-20 20:17:50 +07:00
|
|
|
REG_FIELD_FOR_EACH_SENSOR11(MIN_STATUS, TM_Sn_STATUS_OFF, 10, 10),
|
|
|
|
REG_FIELD_FOR_EACH_SENSOR11(LOWER_STATUS, TM_Sn_STATUS_OFF, 11, 11),
|
|
|
|
REG_FIELD_FOR_EACH_SENSOR11(UPPER_STATUS, TM_Sn_STATUS_OFF, 12, 12),
|
|
|
|
/* No CRITICAL field on v0.1 */
|
|
|
|
REG_FIELD_FOR_EACH_SENSOR11(MAX_STATUS, TM_Sn_STATUS_OFF, 13, 13),
|
|
|
|
|
|
|
|
/* TRDY: 1=ready, 0=in progress */
|
|
|
|
[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
|
|
|
|
};
|
|
|
|
|
2016-07-02 08:02:09 +07:00
|
|
|
static const struct tsens_ops ops_8916 = {
|
2016-05-05 15:51:40 +07:00
|
|
|
.init = init_common,
|
|
|
|
.calibrate = calibrate_8916,
|
|
|
|
.get_temp = get_temp_common,
|
|
|
|
};
|
|
|
|
|
2019-03-20 20:17:42 +07:00
|
|
|
const struct tsens_plat_data data_8916 = {
|
2016-05-05 15:51:40 +07:00
|
|
|
.num_sensors = 5,
|
|
|
|
.ops = &ops_8916,
|
|
|
|
.hw_ids = (unsigned int []){0, 1, 2, 4, 5 },
|
2019-03-20 20:17:50 +07:00
|
|
|
|
|
|
|
.feat = &tsens_v0_1_feat,
|
|
|
|
.fields = tsens_v0_1_regfields,
|
2016-05-05 15:51:40 +07:00
|
|
|
};
|
2019-03-20 20:17:49 +07:00
|
|
|
|
|
|
|
static const struct tsens_ops ops_8974 = {
|
|
|
|
.init = init_common,
|
|
|
|
.calibrate = calibrate_8974,
|
|
|
|
.get_temp = get_temp_common,
|
|
|
|
};
|
|
|
|
|
|
|
|
const struct tsens_plat_data data_8974 = {
|
|
|
|
.num_sensors = 11,
|
|
|
|
.ops = &ops_8974,
|
2019-03-20 20:17:50 +07:00
|
|
|
.feat = &tsens_v0_1_feat,
|
|
|
|
.fields = tsens_v0_1_regfields,
|
2019-03-20 20:17:49 +07:00
|
|
|
};
|