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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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322 lines
9.0 KiB
ArmAsm
322 lines
9.0 KiB
ArmAsm
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/* $Id: etrap.S,v 1.31 2000/01/08 16:38:18 anton Exp $
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* etrap.S: Sparc trap window preparation for entry into the
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* Linux kernel.
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*
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* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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*/
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#include <asm/head.h>
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#include <asm/asi.h>
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#include <asm/contregs.h>
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#include <asm/page.h>
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#include <asm/psr.h>
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#include <asm/ptrace.h>
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#include <asm/winmacro.h>
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#include <asm/asmmacro.h>
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#include <asm/thread_info.h>
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/* Registers to not touch at all. */
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#define t_psr l0 /* Set by caller */
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#define t_pc l1 /* Set by caller */
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#define t_npc l2 /* Set by caller */
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#define t_wim l3 /* Set by caller */
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#define t_twinmask l4 /* Set at beginning of this entry routine. */
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#define t_kstack l5 /* Set right before pt_regs frame is built */
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#define t_retpc l6 /* If you change this, change winmacro.h header file */
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#define t_systable l7 /* Never touch this, could be the syscall table ptr. */
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#define curptr g6 /* Set after pt_regs frame is built */
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.text
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.align 4
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/* SEVEN WINDOW PATCH INSTRUCTIONS */
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.globl tsetup_7win_patch1, tsetup_7win_patch2
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.globl tsetup_7win_patch3, tsetup_7win_patch4
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.globl tsetup_7win_patch5, tsetup_7win_patch6
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tsetup_7win_patch1: sll %t_wim, 0x6, %t_wim
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tsetup_7win_patch2: and %g2, 0x7f, %g2
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tsetup_7win_patch3: and %g2, 0x7f, %g2
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tsetup_7win_patch4: and %g1, 0x7f, %g1
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tsetup_7win_patch5: sll %t_wim, 0x6, %t_wim
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tsetup_7win_patch6: and %g2, 0x7f, %g2
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/* END OF PATCH INSTRUCTIONS */
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/* At trap time, interrupts and all generic traps do the
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* following:
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*
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* rd %psr, %l0
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* b some_handler
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* rd %wim, %l3
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* nop
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*
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* Then 'some_handler' if it needs a trap frame (ie. it has
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* to call c-code and the trap cannot be handled in-window)
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* then it does the SAVE_ALL macro in entry.S which does
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*
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* sethi %hi(trap_setup), %l4
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* jmpl %l4 + %lo(trap_setup), %l6
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* nop
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*/
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/* 2 3 4 window number
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* -----
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* O T S mnemonic
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*
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* O == Current window before trap
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* T == Window entered when trap occurred
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* S == Window we will need to save if (1<<T) == %wim
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*
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* Before execution gets here, it must be guaranteed that
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* %l0 contains trap time %psr, %l1 and %l2 contain the
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* trap pc and npc, and %l3 contains the trap time %wim.
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*/
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.globl trap_setup, tsetup_patch1, tsetup_patch2
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.globl tsetup_patch3, tsetup_patch4
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.globl tsetup_patch5, tsetup_patch6
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trap_setup:
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/* Calculate mask of trap window. See if from user
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* or kernel and branch conditionally.
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*/
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mov 1, %t_twinmask
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andcc %t_psr, PSR_PS, %g0 ! fromsupv_p = (psr & PSR_PS)
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be trap_setup_from_user ! nope, from user mode
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sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
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/* From kernel, allocate more kernel stack and
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* build a pt_regs trap frame.
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*/
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sub %fp, (STACKFRAME_SZ + TRACEREG_SZ), %t_kstack
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STORE_PT_ALL(t_kstack, t_psr, t_pc, t_npc, g2)
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/* See if we are in the trap window. */
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andcc %t_twinmask, %t_wim, %g0
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bne trap_setup_kernel_spill ! in trap window, clean up
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nop
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/* Trap from kernel with a window available.
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* Just do it...
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*/
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jmpl %t_retpc + 0x8, %g0 ! return to caller
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mov %t_kstack, %sp ! jump onto new stack
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trap_setup_kernel_spill:
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ld [%curptr + TI_UWINMASK], %g1
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orcc %g0, %g1, %g0
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bne trap_setup_user_spill ! there are some user windows, yuck
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/* Spill from kernel, but only kernel windows, adjust
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* %wim and go.
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*/
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srl %t_wim, 0x1, %g2 ! begin computation of new %wim
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tsetup_patch1:
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sll %t_wim, 0x7, %t_wim ! patched on 7 window Sparcs
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or %t_wim, %g2, %g2
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tsetup_patch2:
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and %g2, 0xff, %g2 ! patched on 7 window Sparcs
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save %g0, %g0, %g0
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/* Set new %wim value */
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wr %g2, 0x0, %wim
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/* Save the kernel window onto the corresponding stack. */
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STORE_WINDOW(sp)
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restore %g0, %g0, %g0
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jmpl %t_retpc + 0x8, %g0 ! return to caller
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mov %t_kstack, %sp ! and onto new kernel stack
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#define STACK_OFFSET (THREAD_SIZE - TRACEREG_SZ - STACKFRAME_SZ)
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trap_setup_from_user:
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/* We can't use %curptr yet. */
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LOAD_CURRENT(t_kstack, t_twinmask)
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sethi %hi(STACK_OFFSET), %t_twinmask
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or %t_twinmask, %lo(STACK_OFFSET), %t_twinmask
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add %t_kstack, %t_twinmask, %t_kstack
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mov 1, %t_twinmask
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sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
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/* Build pt_regs frame. */
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STORE_PT_ALL(t_kstack, t_psr, t_pc, t_npc, g2)
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#if 0
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/* If we're sure every task_struct is THREAD_SIZE aligned,
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we can speed this up. */
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sethi %hi(STACK_OFFSET), %curptr
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or %curptr, %lo(STACK_OFFSET), %curptr
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sub %t_kstack, %curptr, %curptr
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#else
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sethi %hi(~(THREAD_SIZE - 1)), %curptr
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and %t_kstack, %curptr, %curptr
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#endif
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/* Clear current_thread_info->w_saved */
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st %g0, [%curptr + TI_W_SAVED]
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/* See if we are in the trap window. */
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andcc %t_twinmask, %t_wim, %g0
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bne trap_setup_user_spill ! yep we are
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orn %g0, %t_twinmask, %g1 ! negate trap win mask into %g1
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/* Trap from user, but not into the invalid window.
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* Calculate new umask. The way this works is,
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* any window from the %wim at trap time until
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* the window right before the one we are in now,
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* is a user window. A diagram:
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*
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* 7 6 5 4 3 2 1 0 window number
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* ---------------
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* I L T mnemonic
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*
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* Window 'I' is the invalid window in our example,
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* window 'L' is the window the user was in when
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* the trap occurred, window T is the trap window
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* we are in now. So therefore, windows 5, 4 and
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* 3 are user windows. The following sequence
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* computes the user winmask to represent this.
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*/
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subcc %t_wim, %t_twinmask, %g2
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bneg,a 1f
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sub %g2, 0x1, %g2
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1:
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andn %g2, %t_twinmask, %g2
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tsetup_patch3:
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and %g2, 0xff, %g2 ! patched on 7win Sparcs
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st %g2, [%curptr + TI_UWINMASK] ! store new umask
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jmpl %t_retpc + 0x8, %g0 ! return to caller
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mov %t_kstack, %sp ! and onto kernel stack
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trap_setup_user_spill:
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/* A spill occurred from either kernel or user mode
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* and there exist some user windows to deal with.
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* A mask of the currently valid user windows
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* is in %g1 upon entry to here.
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*/
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tsetup_patch4:
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and %g1, 0xff, %g1 ! patched on 7win Sparcs, mask
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srl %t_wim, 0x1, %g2 ! compute new %wim
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tsetup_patch5:
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sll %t_wim, 0x7, %t_wim ! patched on 7win Sparcs
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or %t_wim, %g2, %g2 ! %g2 is new %wim
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tsetup_patch6:
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and %g2, 0xff, %g2 ! patched on 7win Sparcs
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andn %g1, %g2, %g1 ! clear this bit in %g1
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st %g1, [%curptr + TI_UWINMASK]
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save %g0, %g0, %g0
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wr %g2, 0x0, %wim
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/* Call MMU-architecture dependent stack checking
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* routine.
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*/
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.globl tsetup_mmu_patchme
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tsetup_mmu_patchme:
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b tsetup_sun4c_stackchk
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andcc %sp, 0x7, %g0
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/* Architecture specific stack checking routines. When either
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* of these routines are called, the globals are free to use
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* as they have been safely stashed on the new kernel stack
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* pointer. Thus the definition below for simplicity.
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*/
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#define glob_tmp g1
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.globl tsetup_sun4c_stackchk
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tsetup_sun4c_stackchk:
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/* Done by caller: andcc %sp, 0x7, %g0 */
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bne trap_setup_user_stack_is_bolixed
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sra %sp, 29, %glob_tmp
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add %glob_tmp, 0x1, %glob_tmp
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andncc %glob_tmp, 0x1, %g0
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bne trap_setup_user_stack_is_bolixed
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and %sp, 0xfff, %glob_tmp ! delay slot
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/* See if our dump area will be on more than one
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* page.
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*/
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add %glob_tmp, 0x38, %glob_tmp
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andncc %glob_tmp, 0xff8, %g0
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be tsetup_sun4c_onepage ! only one page to check
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lda [%sp] ASI_PTE, %glob_tmp ! have to check first page anyways
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tsetup_sun4c_twopages:
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/* Is first page ok permission wise? */
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srl %glob_tmp, 29, %glob_tmp
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cmp %glob_tmp, 0x6
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bne trap_setup_user_stack_is_bolixed
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add %sp, 0x38, %glob_tmp /* Is second page in vma hole? */
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sra %glob_tmp, 29, %glob_tmp
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add %glob_tmp, 0x1, %glob_tmp
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andncc %glob_tmp, 0x1, %g0
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bne trap_setup_user_stack_is_bolixed
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add %sp, 0x38, %glob_tmp
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lda [%glob_tmp] ASI_PTE, %glob_tmp
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tsetup_sun4c_onepage:
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srl %glob_tmp, 29, %glob_tmp
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cmp %glob_tmp, 0x6 ! can user write to it?
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bne trap_setup_user_stack_is_bolixed ! failure
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nop
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STORE_WINDOW(sp)
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restore %g0, %g0, %g0
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jmpl %t_retpc + 0x8, %g0
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mov %t_kstack, %sp
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.globl tsetup_srmmu_stackchk
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tsetup_srmmu_stackchk:
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/* Check results of callers andcc %sp, 0x7, %g0 */
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bne trap_setup_user_stack_is_bolixed
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sethi %hi(PAGE_OFFSET), %glob_tmp
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cmp %glob_tmp, %sp
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bleu,a 1f
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lda [%g0] ASI_M_MMUREGS, %glob_tmp ! read MMU control
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trap_setup_user_stack_is_bolixed:
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/* From user/kernel into invalid window w/bad user
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* stack. Save bad user stack, and return to caller.
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*/
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SAVE_BOLIXED_USER_STACK(curptr, g3)
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restore %g0, %g0, %g0
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jmpl %t_retpc + 0x8, %g0
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mov %t_kstack, %sp
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1:
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/* Clear the fault status and turn on the no_fault bit. */
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or %glob_tmp, 0x2, %glob_tmp ! or in no_fault bit
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sta %glob_tmp, [%g0] ASI_M_MMUREGS ! set it
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/* Dump the registers and cross fingers. */
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STORE_WINDOW(sp)
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/* Clear the no_fault bit and check the status. */
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andn %glob_tmp, 0x2, %glob_tmp
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sta %glob_tmp, [%g0] ASI_M_MMUREGS
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mov AC_M_SFAR, %glob_tmp
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lda [%glob_tmp] ASI_M_MMUREGS, %g0
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mov AC_M_SFSR, %glob_tmp
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lda [%glob_tmp] ASI_M_MMUREGS, %glob_tmp ! save away status of winstore
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andcc %glob_tmp, 0x2, %g0 ! did we fault?
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bne trap_setup_user_stack_is_bolixed ! failure
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nop
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restore %g0, %g0, %g0
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jmpl %t_retpc + 0x8, %g0
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mov %t_kstack, %sp
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