2008-08-05 22:14:15 +07:00
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/* arch/arm/mach-imx/include/mach/debug-macro.S
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2008-07-05 15:02:51 +07:00
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*
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* Debugging macro include header
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*
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* Copyright (C) 1994-1999 Russell King
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* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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2010-10-26 14:42:54 +07:00
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#include <mach/hardware.h>
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2008-07-05 15:02:51 +07:00
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2009-06-04 18:45:37 +07:00
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#ifdef CONFIG_ARCH_MX1
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2010-10-26 14:42:54 +07:00
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#define UART_PADDR MX1_UART1_BASE_ADDR
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2008-11-12 21:38:39 +07:00
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#endif
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2009-06-04 18:45:37 +07:00
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2009-06-04 16:32:12 +07:00
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#ifdef CONFIG_ARCH_MX25
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#ifdef UART_PADDR
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#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
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#endif
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2010-07-16 20:09:06 +07:00
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#define UART_PADDR MX25_UART1_BASE_ADDR
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2009-06-04 16:32:12 +07:00
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#endif
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2009-06-04 18:45:37 +07:00
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#ifdef CONFIG_ARCH_MX2
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#ifdef UART_PADDR
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#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
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2009-05-19 15:01:03 +07:00
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#endif
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2010-10-26 14:42:54 +07:00
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#define UART_PADDR MX2x_UART1_BASE_ADDR
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2009-06-03 07:24:16 +07:00
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#endif
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2009-06-04 18:45:37 +07:00
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#ifdef CONFIG_ARCH_MX3
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#ifdef UART_PADDR
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#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
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2009-06-04 04:23:54 +07:00
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#endif
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2010-10-26 14:42:54 +07:00
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#define UART_PADDR MX3x_UART1_BASE_ADDR
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2008-07-05 15:03:00 +07:00
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#endif
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2009-06-04 18:45:37 +07:00
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2010-02-05 03:09:40 +07:00
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#ifdef CONFIG_ARCH_MX5
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#ifdef UART_PADDR
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#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
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#endif
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#define UART_PADDR MX51_UART1_BASE_ADDR
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#endif
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2009-07-31 18:29:22 +07:00
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#ifdef CONFIG_ARCH_MXC91231
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#ifdef UART_PADDR
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#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
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#endif
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#define UART_PADDR MXC91231_UART2_BASE_ADDR
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#endif
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2010-10-26 14:42:54 +07:00
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#define UART_VADDR IMX_IO_ADDRESS(UART_PADDR)
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2010-07-06 17:30:06 +07:00
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.macro addruart, rp, rv
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ldr \rp, =UART_PADDR @ physical
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ldr \rv, =UART_VADDR @ virtual
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2008-07-05 15:02:51 +07:00
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.endm
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.macro senduart,rd,rx
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str \rd, [\rx, #0x40] @ TXDATA
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.endm
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.macro waituart,rd,rx
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.endm
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.macro busyuart,rd,rx
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1002: ldr \rd, [\rx, #0x98] @ SR2
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tst \rd, #1 << 3 @ TXDC
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beq 1002b @ wait until transmit done
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.endm
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