2019-06-04 15:11:33 +07:00
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// SPDX-License-Identifier: GPL-2.0-only
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2013-06-11 15:40:18 +07:00
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/*
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* linux/arch/arm/boot/nspire-classic.dts
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*
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* Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
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*/
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/include/ "nspire.dtsi"
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&lcd {
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2019-08-10 14:42:30 +07:00
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port {
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clcd_pads: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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2013-06-11 15:40:18 +07:00
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};
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&fast_timer {
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/* compatible = "lsi,zevio-timer"; */
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reg = <0x90010000 0x1000>, <0x900A0010 0x8>;
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};
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&uart {
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compatible = "ns16550";
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb_pclk>;
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no-loopback-test;
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};
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&timer0 {
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/* compatible = "lsi,zevio-timer"; */
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reg = <0x900C0000 0x1000>, <0x900A0018 0x8>;
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};
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&timer1 {
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compatible = "lsi,zevio-timer";
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reg = <0x900D0000 0x1000>, <0x900A0020 0x8>;
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};
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&keypad {
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active-low;
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};
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&base_clk {
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compatible = "lsi,nspire-classic-clock";
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};
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&ahb_clk {
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compatible = "lsi,nspire-classic-ahb-divider";
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};
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2015-02-09 15:41:57 +07:00
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&vbus_reg {
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gpio = <&gpio 5 0>;
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};
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2013-06-11 15:40:18 +07:00
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/ {
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memory {
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device_type = "memory";
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reg = <0x10000000 0x2000000>; /* 32 MB */
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};
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ahb {
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#address-cells = <1>;
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#size-cells = <1>;
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intc: interrupt-controller@DC000000 {
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compatible = "lsi,zevio-intc";
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interrupt-controller;
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reg = <0xDC000000 0x1000>;
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#interrupt-cells = <1>;
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};
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};
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2019-08-10 14:42:30 +07:00
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panel {
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compatible = "ti,nspire-classic-lcd-panel";
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port {
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panel_in: endpoint {
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remote-endpoint = <&clcd_pads>;
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};
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};
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};
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2013-06-11 15:40:18 +07:00
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chosen {
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bootargs = "debug earlyprintk console=tty0 console=ttyS0,115200n8 root=/dev/ram0";
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};
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};
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