linux_dsm_epyc7002/arch/arm/mach-nspire/mmio.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 *	linux/arch/arm/mach-nspire/mmio.h
 *
 *	Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
 */

#define NSPIRE_MISC_PHYS_BASE		0x900A0000
#define NSPIRE_MISC_HWRESET		0x08

#define NSPIRE_PWR_PHYS_BASE		0x900B0000
#define NSPIRE_PWR_VIRT_BASE		0xFEEB0000
#define NSPIRE_PWR_BUS_DISABLE1		0x18
#define NSPIRE_PWR_BUS_DISABLE2		0x20

#define NSPIRE_LCD_PHYS_BASE		0xC0000000
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2019-06-04 15:11:33 +07:00			`/* SPDX-License-Identifier: GPL-2.0-only */`
arm: Add Initial TI-Nspire support This patch adds support for the TI-Nspire platform. Changes between v1 and v2: * Added GENERIC_IRQ_CHIP to platform Kconfig Signed-off-by: Daniel Tang <dt.tangr@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> 2013-06-11 15:40:17 +07:00			`/*`
			`* linux/arch/arm/mach-nspire/mmio.h`
			`*`
			`* Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>`
			`*/`

			`#define NSPIRE_MISC_PHYS_BASE 0x900A0000`
			`#define NSPIRE_MISC_HWRESET 0x08`

			`#define NSPIRE_PWR_PHYS_BASE 0x900B0000`
			`#define NSPIRE_PWR_VIRT_BASE 0xFEEB0000`
			`#define NSPIRE_PWR_BUS_DISABLE1 0x18`
			`#define NSPIRE_PWR_BUS_DISABLE2 0x20`

			`#define NSPIRE_LCD_PHYS_BASE 0xC0000000`