2015-07-27 03:50:55 +07:00
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Allwinner A10 DMA Controller
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This driver follows the generic DMA bindings defined in dma.txt.
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Required properties:
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- compatible: Must be "allwinner,sun4i-a10-dma"
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- reg: Should contain the registers base address and length
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- interrupts: Should contain a reference to the interrupt used by this device
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- clocks: Should contain a reference to the parent AHB clock
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- #dma-cells : Should be 2, first cell denoting normal or dedicated dma,
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second cell holding the request line number.
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Example:
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2017-11-08 23:27:48 +07:00
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dma: dma-controller@1c02000 {
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2015-07-27 03:50:55 +07:00
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compatible = "allwinner,sun4i-a10-dma";
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reg = <0x01c02000 0x1000>;
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interrupts = <27>;
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clocks = <&ahb_gates 6>;
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#dma-cells = <2>;
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};
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Clients:
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DMA clients connected to the Allwinner A10 DMA controller must use the
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format described in the dma.txt file, using a three-cell specifier for
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each channel: a phandle plus two integer cells.
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The three cells in order are:
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1. A phandle pointing to the DMA controller.
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2. Whether it is using normal (0) or dedicated (1) channels
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3. The port ID as specified in the datasheet
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Example:
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2017-11-08 23:27:48 +07:00
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spi2: spi@1c17000 {
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2015-07-27 03:50:55 +07:00
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compatible = "allwinner,sun4i-a10-spi";
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reg = <0x01c17000 0x1000>;
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interrupts = <0 12 4>;
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clocks = <&ahb_gates 22>, <&spi2_clk>;
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clock-names = "ahb", "mod";
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dmas = <&dma 1 29>, <&dma 1 28>;
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dma-names = "rx", "tx";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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