2012-06-01 23:21:46 +07:00
|
|
|
/*
|
|
|
|
|
* Core functions for Marvell System On Chip
|
|
|
|
|
*
|
|
|
|
|
* Copyright (C) 2012 Marvell
|
|
|
|
|
*
|
|
|
|
|
* Lior Amsalem <alior@marvell.com>
|
|
|
|
|
* Gregory CLEMENT <gregory.clement@free-electrons.com>
|
|
|
|
|
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
|
|
|
|
*
|
|
|
|
|
* This file is licensed under the terms of the GNU General Public
|
|
|
|
|
* License version 2. This program is licensed "as is" without any
|
|
|
|
|
* warranty of any kind, whether express or implied.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#ifndef __ARCH_MVEBU_COMMON_H
|
|
|
|
|
#define __ARCH_MVEBU_COMMON_H
|
|
|
|
|
|
2013-07-09 06:01:40 +07:00
|
|
|
#include <linux/reboot.h>
|
|
|
|
|
|
|
|
|
|
void mvebu_restart(enum reboot_mode mode, const char *cmd);
|
ARM: mvebu: introduce CPU reset code
The Armada 370 and Armada XP have registers that allow to reset the
CPUs, which is particularly useful to take the secondary CPUs out of
reset in the context of the SMP support.
Unfortunately, an implementation mistake was originally made and the
support for these registers was integrated into the PMSU driver, which
is in fact completely unrelated. And it turns out that the Armada 375
has the same CPU reset registers, but does not have the PMSU
registers.
Therefore, this commit creates a small CPU reset driver. All it does
is provide a simple mvebu_cpu_reset_deassert() function that the SMP
support code can call to take secondary CPUs out of reset. As of this
commit, the driver isn't being used, it will be used through changes
in the following commits.
Note that we initially planned to use the 'reset controller'
framework, but it requires the addition of "resets" properties in the
Device Tree, which are causing too many problems if we want to keep
the Device Tree backward compatibility. Moreover, the 'reset
controller' framework is mainly useful when a device driver needs to
request a reset of its device from a separate reset controller. In our
case, the CPU reset handling and the SMP core code are both located in
arch/arm/mach-mvebu/ and are tightly linked together, so there's no
real benefit in going through a separate framework.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483433-25836-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-14 20:50:28 +07:00
|
|
|
int mvebu_cpu_reset_deassert(int cpu);
|
2014-04-14 20:53:58 +07:00
|
|
|
void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr);
|
2014-04-14 20:54:03 +07:00
|
|
|
void mvebu_system_controller_set_cpu_boot_addr(void *boot_addr);
|
2014-06-23 22:42:08 +07:00
|
|
|
int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev);
|
2012-06-01 23:21:46 +07:00
|
|
|
|
2014-07-23 20:00:46 +07:00
|
|
|
void __iomem *mvebu_get_scu_base(void);
|
|
|
|
|
|
2015-07-03 18:55:51 +07:00
|
|
|
int mvebu_pm_suspend_init(void (*board_pm_enter)(void __iomem *sdram_reg,
|
|
|
|
|
u32 srcmd));
|
2012-06-01 23:21:46 +07:00
|
|
|
#endif
|