2017-12-26 02:54:33 +07:00
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// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2010 Samsung Electronics Co., Ltd.
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// http://www.samsung.com/
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//
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// S3C64XX setup information for IDE
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2010-06-08 14:55:45 +07:00
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#include <linux/kernel.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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#include <mach/map.h>
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#include <mach/regs-clock.h>
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#include <plat/gpio-cfg.h>
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2014-01-14 20:24:24 +07:00
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#include <mach/gpio-samsung.h>
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2012-08-24 20:22:12 +07:00
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#include <linux/platform_data/ata-samsung_cf.h>
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2010-06-08 14:55:45 +07:00
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void s3c64xx_ide_setup_gpio(void)
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{
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u32 reg;
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reg = readl(S3C_MEM_SYS_CFG) & (~0x3f);
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/* Independent CF interface, CF chip select configuration */
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writel(reg | MEM_SYS_CFG_INDEP_CF |
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MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S3C_MEM_SYS_CFG);
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s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4));
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/* Set XhiDATA[15:0] pins as CF Data[15:0] */
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2010-10-01 18:47:21 +07:00
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s3c_gpio_cfgpin_range(S3C64XX_GPK(0), 16, S3C_GPIO_SFN(5));
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2010-06-08 14:55:45 +07:00
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/* Set XhiADDR[2:0] pins as CF ADDR[2:0] */
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2010-10-01 18:47:21 +07:00
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s3c_gpio_cfgpin_range(S3C64XX_GPL(0), 3, S3C_GPIO_SFN(6));
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2010-06-08 14:55:45 +07:00
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/* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */
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s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1));
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2010-10-01 18:47:21 +07:00
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s3c_gpio_cfgpin_range(S3C64XX_GPM(0), 5, S3C_GPIO_SFN(6));
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2010-06-08 14:55:45 +07:00
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}
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