2011-06-02 06:48:05 +07:00
|
|
|
# IOMMU_API always gets selected by whoever wants it.
|
|
|
|
|
config IOMMU_API
|
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|
|
bool
|
2011-06-02 07:20:08 +07:00
|
|
|
|
2011-06-14 20:51:54 +07:00
|
|
|
menuconfig IOMMU_SUPPORT
|
|
|
|
|
bool "IOMMU Hardware Support"
|
|
|
|
|
default y
|
|
|
|
|
---help---
|
|
|
|
|
Say Y here if you want to compile device drivers for IO Memory
|
|
|
|
|
Management Units into the kernel. These devices usually allow to
|
|
|
|
|
remap DMA requests and/or remap interrupts from other devices on the
|
|
|
|
|
system.
|
|
|
|
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|
|
if IOMMU_SUPPORT
|
|
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|
|
2012-06-25 18:23:54 +07:00
|
|
|
config OF_IOMMU
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|
|
def_bool y
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|
|
depends on OF
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|
|
2013-07-15 11:50:57 +07:00
|
|
|
config FSL_PAMU
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|
|
bool "Freescale IOMMU support"
|
|
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|
|
depends on PPC_E500MC
|
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|
|
select IOMMU_API
|
|
|
|
|
select GENERIC_ALLOCATOR
|
|
|
|
|
help
|
|
|
|
|
Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
|
|
|
|
|
PAMU can authorize memory access, remap the memory address, and remap I/O
|
|
|
|
|
transaction types.
|
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|
|
2011-06-02 07:20:08 +07:00
|
|
|
# MSM IOMMU support
|
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|
|
config MSM_IOMMU
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|
bool "MSM IOMMU Support"
|
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|
|
depends on ARCH_MSM8X60 || ARCH_MSM8960
|
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|
|
|
select IOMMU_API
|
|
|
|
|
help
|
|
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|
|
Support for the IOMMUs found on certain Qualcomm SOCs.
|
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|
|
|
These IOMMUs allow virtualization of the address space used by most
|
|
|
|
|
cores within the multimedia subsystem.
|
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|
If unsure, say N here.
|
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|
|
config IOMMU_PGTABLES_L2
|
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|
|
def_bool y
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|
|
depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
|
2011-06-05 22:22:18 +07:00
|
|
|
|
|
|
|
|
# AMD IOMMU support
|
|
|
|
|
config AMD_IOMMU
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|
|
bool "AMD IOMMU support"
|
|
|
|
|
select SWIOTLB
|
|
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|
|
select PCI_MSI
|
2011-11-17 23:24:28 +07:00
|
|
|
select PCI_ATS
|
|
|
|
|
select PCI_PRI
|
|
|
|
|
select PCI_PASID
|
2011-06-05 22:22:18 +07:00
|
|
|
select IOMMU_API
|
x86, build, pci: Fix PCI_MSI build on !SMP
Commit ebd97be635 ('PCI: remove ARCH_SUPPORTS_MSI kconfig option')
removed the ARCH_SUPPORTS_MSI option which architectures could select
to indicate that they support MSI. Now, all architectures are supposed
to build fine when MSI support is enabled: instead of having the
architecture tell *when* MSI support can be used, it's up to the
architecture code to ensure that MSI support can be enabled.
On x86, commit ebd97be635 removed the following line:
select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
Which meant that MSI support was only available when the local APIC
and I/O APIC were enabled. While this is always true on SMP or x86-64,
it is not necessarily the case on i386 !SMP.
The below patch makes sure that the local APIC and I/O APIC support is
always enabled when MSI support is enabled. To do so, it:
* Ensures the X86_UP_APIC option is not visible when PCI_MSI is
enabled. This is the option that allows, on UP machines, to enable
or not the APIC support. It is already not visible on SMP systems,
or x86-64 systems, for example. We're simply also making it
invisible on i386 MSI systems.
* Ensures that the X86_LOCAL_APIC and X86_IO_APIC options are 'y'
when PCI_MSI is enabled.
Notice that this change requires a change in drivers/iommu/Kconfig to
avoid a recursive Kconfig dependencey. The AMD_IOMMU option selects
PCI_MSI, but was depending on X86_IO_APIC. This dependency is no
longer needed: as soon as PCI_MSI is selected, the presence of
X86_IO_APIC is guaranteed. Moreover, the AMD_IOMMU already depended on
X86_64, which already guaranteed that X86_IO_APIC was enabled, so this
dependency was anyway redundant.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: http://lkml.kernel.org/r/1380794354-9079-1-git-send-email-thomas.petazzoni@free-electrons.com
Reported-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-10-03 16:59:14 +07:00
|
|
|
depends on X86_64 && PCI && ACPI
|
2011-06-05 22:22:18 +07:00
|
|
|
---help---
|
|
|
|
|
With this option you can enable support for AMD IOMMU hardware in
|
|
|
|
|
your system. An IOMMU is a hardware component which provides
|
|
|
|
|
remapping of DMA memory accesses from devices. With an AMD IOMMU you
|
2012-04-17 22:01:21 +07:00
|
|
|
can isolate the DMA memory of different devices and protect the
|
2011-06-05 22:22:18 +07:00
|
|
|
system from misbehaving device drivers or hardware.
|
|
|
|
|
|
|
|
|
|
You can find out if your system has an AMD IOMMU if you look into
|
|
|
|
|
your BIOS for an option to enable it or if you have an IVRS ACPI
|
|
|
|
|
table.
|
|
|
|
|
|
|
|
|
|
config AMD_IOMMU_STATS
|
|
|
|
|
bool "Export AMD IOMMU statistics to debugfs"
|
|
|
|
|
depends on AMD_IOMMU
|
|
|
|
|
select DEBUG_FS
|
|
|
|
|
---help---
|
|
|
|
|
This option enables code in the AMD IOMMU driver to collect various
|
|
|
|
|
statistics about whats happening in the driver and exports that
|
|
|
|
|
information to userspace via debugfs.
|
|
|
|
|
If unsure, say N.
|
2011-06-11 01:42:27 +07:00
|
|
|
|
2011-11-09 18:31:15 +07:00
|
|
|
config AMD_IOMMU_V2
|
2013-01-17 09:53:39 +07:00
|
|
|
tristate "AMD IOMMU Version 2 driver"
|
|
|
|
|
depends on AMD_IOMMU && PROFILING
|
2011-11-24 22:21:52 +07:00
|
|
|
select MMU_NOTIFIER
|
2011-11-09 18:31:15 +07:00
|
|
|
---help---
|
|
|
|
|
This option enables support for the AMD IOMMUv2 features of the IOMMU
|
|
|
|
|
hardware. Select this option if you want to use devices that support
|
2012-04-17 22:01:21 +07:00
|
|
|
the PCI PRI and PASID interface.
|
2011-11-09 18:31:15 +07:00
|
|
|
|
2011-06-11 01:42:27 +07:00
|
|
|
# Intel IOMMU support
|
2011-08-24 07:05:25 +07:00
|
|
|
config DMAR_TABLE
|
|
|
|
|
bool
|
|
|
|
|
|
|
|
|
|
config INTEL_IOMMU
|
|
|
|
|
bool "Support for Intel IOMMU using DMA Remapping Devices"
|
2011-06-11 01:42:27 +07:00
|
|
|
depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
|
|
|
|
|
select IOMMU_API
|
2011-08-24 07:05:25 +07:00
|
|
|
select DMAR_TABLE
|
2011-06-11 01:42:27 +07:00
|
|
|
help
|
|
|
|
|
DMA remapping (DMAR) devices support enables independent address
|
|
|
|
|
translations for Direct Memory Access (DMA) from devices.
|
|
|
|
|
These DMA remapping devices are reported via ACPI tables
|
|
|
|
|
and include PCI device scope covered by these DMA
|
|
|
|
|
remapping devices.
|
|
|
|
|
|
2011-08-24 07:05:25 +07:00
|
|
|
config INTEL_IOMMU_DEFAULT_ON
|
2011-06-11 01:42:27 +07:00
|
|
|
def_bool y
|
2011-08-24 07:05:25 +07:00
|
|
|
prompt "Enable Intel DMA Remapping Devices by default"
|
|
|
|
|
depends on INTEL_IOMMU
|
2011-06-11 01:42:27 +07:00
|
|
|
help
|
|
|
|
|
Selecting this option will enable a DMAR device at boot time if
|
|
|
|
|
one is found. If this option is not selected, DMAR support can
|
|
|
|
|
be enabled by passing intel_iommu=on to the kernel.
|
|
|
|
|
|
2011-08-24 07:05:25 +07:00
|
|
|
config INTEL_IOMMU_BROKEN_GFX_WA
|
2011-06-11 01:42:27 +07:00
|
|
|
bool "Workaround broken graphics drivers (going away soon)"
|
2011-08-24 07:05:25 +07:00
|
|
|
depends on INTEL_IOMMU && BROKEN && X86
|
2011-06-11 01:42:27 +07:00
|
|
|
---help---
|
|
|
|
|
Current Graphics drivers tend to use physical address
|
|
|
|
|
for DMA and avoid using DMA APIs. Setting this config
|
|
|
|
|
option permits the IOMMU driver to set a unity map for
|
|
|
|
|
all the OS-visible memory. Hence the driver can continue
|
|
|
|
|
to use physical addresses for DMA, at least until this
|
|
|
|
|
option is removed in the 2.6.32 kernel.
|
|
|
|
|
|
2011-08-24 07:05:25 +07:00
|
|
|
config INTEL_IOMMU_FLOPPY_WA
|
2011-06-11 01:42:27 +07:00
|
|
|
def_bool y
|
2011-08-24 07:05:25 +07:00
|
|
|
depends on INTEL_IOMMU && X86
|
2011-06-11 01:42:27 +07:00
|
|
|
---help---
|
|
|
|
|
Floppy disk drivers are known to bypass DMA API calls
|
|
|
|
|
thereby failing to work when IOMMU is enabled. This
|
|
|
|
|
workaround will setup a 1:1 mapping for the first
|
|
|
|
|
16MiB to make floppy (an ISA device) work.
|
|
|
|
|
|
2011-08-24 07:05:25 +07:00
|
|
|
config IRQ_REMAP
|
2013-01-17 09:53:39 +07:00
|
|
|
bool "Support for Interrupt Remapping"
|
|
|
|
|
depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
|
2011-08-24 07:05:25 +07:00
|
|
|
select DMAR_TABLE
|
2011-06-11 01:42:27 +07:00
|
|
|
---help---
|
|
|
|
|
Supports Interrupt remapping for IO-APIC and MSI devices.
|
|
|
|
|
To use x2apic mode in the CPU's which support x2APIC enhancements or
|
|
|
|
|
to support platforms with CPU's having > 8 bit APIC ID, say Y.
|
2011-06-14 20:51:54 +07:00
|
|
|
|
2011-08-16 03:21:41 +07:00
|
|
|
# OMAP IOMMU support
|
|
|
|
|
config OMAP_IOMMU
|
|
|
|
|
bool "OMAP IOMMU Support"
|
2013-03-06 05:16:48 +07:00
|
|
|
depends on ARCH_OMAP2PLUS
|
2011-08-16 03:21:41 +07:00
|
|
|
select IOMMU_API
|
|
|
|
|
|
|
|
|
|
config OMAP_IOVMM
|
2011-09-14 21:03:45 +07:00
|
|
|
tristate "OMAP IO Virtual Memory Manager Support"
|
|
|
|
|
depends on OMAP_IOMMU
|
2011-08-16 03:21:41 +07:00
|
|
|
|
|
|
|
|
config OMAP_IOMMU_DEBUG
|
|
|
|
|
tristate "Export OMAP IOMMU/IOVMM internals in DebugFS"
|
|
|
|
|
depends on OMAP_IOVMM && DEBUG_FS
|
|
|
|
|
help
|
|
|
|
|
Select this to see extensive information about
|
|
|
|
|
the internal state of OMAP IOMMU/IOVMM in debugfs.
|
|
|
|
|
|
|
|
|
|
Say N unless you know you need this.
|
|
|
|
|
|
2011-11-16 22:36:37 +07:00
|
|
|
config TEGRA_IOMMU_GART
|
|
|
|
|
bool "Tegra GART IOMMU Support"
|
|
|
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
|
|
|
select IOMMU_API
|
|
|
|
|
help
|
|
|
|
|
Enables support for remapping discontiguous physical memory
|
|
|
|
|
shared with the operating system into contiguous I/O virtual
|
|
|
|
|
space through the GART (Graphics Address Relocation Table)
|
|
|
|
|
hardware included on Tegra SoCs.
|
|
|
|
|
|
2011-11-17 12:31:31 +07:00
|
|
|
config TEGRA_IOMMU_SMMU
|
|
|
|
|
bool "Tegra SMMU IOMMU Support"
|
2013-01-31 17:43:08 +07:00
|
|
|
depends on ARCH_TEGRA && TEGRA_AHB
|
2011-11-17 12:31:31 +07:00
|
|
|
select IOMMU_API
|
|
|
|
|
help
|
|
|
|
|
Enables support for remapping discontiguous physical memory
|
|
|
|
|
shared with the operating system into contiguous I/O virtual
|
|
|
|
|
space through the SMMU (System Memory Management Unit)
|
|
|
|
|
hardware included on Tegra SoCs.
|
|
|
|
|
|
2012-05-12 03:56:09 +07:00
|
|
|
config EXYNOS_IOMMU
|
|
|
|
|
bool "Exynos IOMMU Support"
|
2014-05-22 11:20:54 +07:00
|
|
|
depends on ARCH_EXYNOS
|
2012-05-12 03:56:09 +07:00
|
|
|
select IOMMU_API
|
|
|
|
|
help
|
|
|
|
|
Support for the IOMMU(System MMU) of Samsung Exynos application
|
|
|
|
|
processor family. This enables H/W multimedia accellerators to see
|
|
|
|
|
non-linear physical memory chunks as a linear memory in their
|
|
|
|
|
address spaces
|
|
|
|
|
|
|
|
|
|
If unsure, say N here.
|
|
|
|
|
|
|
|
|
|
config EXYNOS_IOMMU_DEBUG
|
|
|
|
|
bool "Debugging log for Exynos IOMMU"
|
|
|
|
|
depends on EXYNOS_IOMMU
|
|
|
|
|
help
|
|
|
|
|
Select this to see the detailed log message that shows what
|
|
|
|
|
happens in the IOMMU driver
|
|
|
|
|
|
|
|
|
|
Say N unless you need kernel log message for IOMMU debugging
|
|
|
|
|
|
2013-01-21 17:54:26 +07:00
|
|
|
config SHMOBILE_IPMMU
|
|
|
|
|
bool
|
|
|
|
|
|
|
|
|
|
config SHMOBILE_IPMMU_TLB
|
|
|
|
|
bool
|
|
|
|
|
|
|
|
|
|
config SHMOBILE_IOMMU
|
|
|
|
|
bool "IOMMU for Renesas IPMMU/IPMMUI"
|
|
|
|
|
default n
|
2013-11-16 09:57:42 +07:00
|
|
|
depends on ARM
|
2014-02-09 04:21:54 +07:00
|
|
|
depends on ARCH_SHMOBILE || COMPILE_TEST
|
2013-01-21 17:54:26 +07:00
|
|
|
select IOMMU_API
|
|
|
|
|
select ARM_DMA_USE_IOMMU
|
|
|
|
|
select SHMOBILE_IPMMU
|
|
|
|
|
select SHMOBILE_IPMMU_TLB
|
|
|
|
|
help
|
|
|
|
|
Support for Renesas IPMMU/IPMMUI. This option enables
|
|
|
|
|
remapping of DMA memory accesses from all of the IP blocks
|
|
|
|
|
on the ICB.
|
|
|
|
|
|
|
|
|
|
Warning: Drivers (including userspace drivers of UIO
|
|
|
|
|
devices) of the IP blocks on the ICB *must* use addresses
|
|
|
|
|
allocated from the IPMMU (iova) for DMA with this option
|
|
|
|
|
enabled.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
choice
|
|
|
|
|
prompt "IPMMU/IPMMUI address space size"
|
|
|
|
|
default SHMOBILE_IOMMU_ADDRSIZE_2048MB
|
|
|
|
|
depends on SHMOBILE_IOMMU
|
|
|
|
|
help
|
|
|
|
|
This option sets IPMMU/IPMMUI address space size by
|
|
|
|
|
adjusting the 1st level page table size. The page table size
|
|
|
|
|
is calculated as follows:
|
|
|
|
|
|
|
|
|
|
page table size = number of page table entries * 4 bytes
|
|
|
|
|
number of page table entries = address space size / 1 MiB
|
|
|
|
|
|
|
|
|
|
For example, when the address space size is 2048 MiB, the
|
|
|
|
|
1st level page table size is 8192 bytes.
|
|
|
|
|
|
|
|
|
|
config SHMOBILE_IOMMU_ADDRSIZE_2048MB
|
|
|
|
|
bool "2 GiB"
|
|
|
|
|
|
|
|
|
|
config SHMOBILE_IOMMU_ADDRSIZE_1024MB
|
|
|
|
|
bool "1 GiB"
|
|
|
|
|
|
|
|
|
|
config SHMOBILE_IOMMU_ADDRSIZE_512MB
|
|
|
|
|
bool "512 MiB"
|
|
|
|
|
|
|
|
|
|
config SHMOBILE_IOMMU_ADDRSIZE_256MB
|
|
|
|
|
bool "256 MiB"
|
|
|
|
|
|
|
|
|
|
config SHMOBILE_IOMMU_ADDRSIZE_128MB
|
|
|
|
|
bool "128 MiB"
|
|
|
|
|
|
|
|
|
|
config SHMOBILE_IOMMU_ADDRSIZE_64MB
|
|
|
|
|
bool "64 MiB"
|
|
|
|
|
|
|
|
|
|
config SHMOBILE_IOMMU_ADDRSIZE_32MB
|
|
|
|
|
bool "32 MiB"
|
|
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
|
|
config SHMOBILE_IOMMU_L1SIZE
|
|
|
|
|
int
|
|
|
|
|
default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
|
|
|
|
|
default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
|
|
|
|
|
default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
|
|
|
|
|
default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
|
|
|
|
|
default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
|
|
|
|
|
default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
|
|
|
|
|
default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
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2013-05-21 10:33:09 +07:00
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config SPAPR_TCE_IOMMU
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bool "sPAPR TCE IOMMU Support"
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2013-05-21 10:33:11 +07:00
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depends on PPC_POWERNV || PPC_PSERIES
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2013-05-21 10:33:09 +07:00
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select IOMMU_API
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help
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Enables bits of IOMMU API required by VFIO. The iommu_ops
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is not implemented as it is not necessary for VFIO.
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2013-06-25 00:31:25 +07:00
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config ARM_SMMU
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bool "ARM Ltd. System MMU (SMMU) Support"
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depends on ARM64 || (ARM_LPAE && OF)
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select IOMMU_API
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select ARM_DMA_USE_IOMMU if ARM
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help
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Support for implementations of the ARM System MMU architecture
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versions 1 and 2. The driver supports both v7l and v8l table
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formats with 4k and 64k page sizes.
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Say Y here if your SoC includes an IOMMU device implementing
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the ARM SMMU architecture.
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2011-06-14 20:51:54 +07:00
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endif # IOMMU_SUPPORT
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