2013-10-17 23:55:41 +07:00
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/*
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/clk/at91_pmc.h>
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#include <linux/of.h>
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2014-09-07 13:14:29 +07:00
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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2013-10-17 23:55:41 +07:00
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#include "pmc.h"
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#define USB_SOURCE_MAX 2
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#define SAM9X5_USB_DIV_SHIFT 8
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#define SAM9X5_USB_MAX_DIV 0xf
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#define RM9200_USB_DIV_SHIFT 28
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#define RM9200_USB_DIV_TAB_SIZE 4
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struct at91sam9x5_clk_usb {
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struct clk_hw hw;
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2014-09-07 13:14:29 +07:00
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struct regmap *regmap;
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2013-10-17 23:55:41 +07:00
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};
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#define to_at91sam9x5_clk_usb(hw) \
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container_of(hw, struct at91sam9x5_clk_usb, hw)
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struct at91rm9200_clk_usb {
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struct clk_hw hw;
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2014-09-07 13:14:29 +07:00
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struct regmap *regmap;
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2013-10-17 23:55:41 +07:00
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u32 divisors[4];
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};
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#define to_at91rm9200_clk_usb(hw) \
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container_of(hw, struct at91rm9200_clk_usb, hw)
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static unsigned long at91sam9x5_clk_usb_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
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2014-09-07 13:14:29 +07:00
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unsigned int usbr;
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u8 usbdiv;
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2013-10-17 23:55:41 +07:00
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2014-09-07 13:14:29 +07:00
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regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
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usbdiv = (usbr & AT91_PMC_OHCIUSBDIV) >> SAM9X5_USB_DIV_SHIFT;
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2014-11-17 20:16:56 +07:00
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return DIV_ROUND_CLOSEST(parent_rate, (usbdiv + 1));
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2013-10-17 23:55:41 +07:00
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}
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2015-07-08 01:48:08 +07:00
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static int at91sam9x5_clk_usb_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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2013-10-17 23:55:41 +07:00
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{
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2015-07-31 07:20:57 +07:00
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struct clk_hw *parent;
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2015-03-29 08:45:33 +07:00
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long best_rate = -EINVAL;
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unsigned long tmp_rate;
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int best_diff = -1;
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int tmp_diff;
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int i;
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2015-06-26 06:53:23 +07:00
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for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
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2015-03-29 08:45:33 +07:00
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int div;
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2015-07-31 07:20:57 +07:00
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parent = clk_hw_get_parent_by_index(hw, i);
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2015-03-29 08:45:33 +07:00
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if (!parent)
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continue;
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for (div = 1; div < SAM9X5_USB_MAX_DIV + 2; div++) {
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unsigned long tmp_parent_rate;
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2015-07-08 01:48:08 +07:00
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tmp_parent_rate = req->rate * div;
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2015-07-31 07:20:57 +07:00
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tmp_parent_rate = clk_hw_round_rate(parent,
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2015-03-29 08:45:33 +07:00
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tmp_parent_rate);
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tmp_rate = DIV_ROUND_CLOSEST(tmp_parent_rate, div);
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2015-07-08 01:48:08 +07:00
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if (tmp_rate < req->rate)
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tmp_diff = req->rate - tmp_rate;
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2015-03-29 08:45:33 +07:00
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else
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2015-07-08 01:48:08 +07:00
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tmp_diff = tmp_rate - req->rate;
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2015-03-29 08:45:33 +07:00
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if (best_diff < 0 || best_diff > tmp_diff) {
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best_rate = tmp_rate;
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best_diff = tmp_diff;
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2015-07-08 01:48:08 +07:00
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req->best_parent_rate = tmp_parent_rate;
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2015-07-31 07:20:57 +07:00
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req->best_parent_hw = parent;
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2015-03-29 08:45:33 +07:00
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}
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2015-07-08 01:48:08 +07:00
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if (!best_diff || tmp_rate < req->rate)
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2015-03-29 08:45:33 +07:00
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break;
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}
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if (!best_diff)
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break;
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}
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2015-07-08 01:48:08 +07:00
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if (best_rate < 0)
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return best_rate;
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req->rate = best_rate;
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return 0;
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2013-10-17 23:55:41 +07:00
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}
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static int at91sam9x5_clk_usb_set_parent(struct clk_hw *hw, u8 index)
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{
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struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
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if (index > 1)
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return -EINVAL;
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2014-09-07 13:14:29 +07:00
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regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS,
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index ? AT91_PMC_USBS : 0);
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2013-10-17 23:55:41 +07:00
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return 0;
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}
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static u8 at91sam9x5_clk_usb_get_parent(struct clk_hw *hw)
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{
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struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
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2014-09-07 13:14:29 +07:00
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unsigned int usbr;
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2013-10-17 23:55:41 +07:00
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2014-09-07 13:14:29 +07:00
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regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
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return usbr & AT91_PMC_USBS;
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2013-10-17 23:55:41 +07:00
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}
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static int at91sam9x5_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
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2014-11-17 20:16:56 +07:00
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unsigned long div;
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if (!rate)
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return -EINVAL;
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2013-10-17 23:55:41 +07:00
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2014-11-17 20:16:56 +07:00
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div = DIV_ROUND_CLOSEST(parent_rate, rate);
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if (div > SAM9X5_USB_MAX_DIV + 1 || !div)
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2013-10-17 23:55:41 +07:00
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return -EINVAL;
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2014-09-07 13:14:29 +07:00
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regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_OHCIUSBDIV,
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(div - 1) << SAM9X5_USB_DIV_SHIFT);
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2013-10-17 23:55:41 +07:00
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return 0;
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}
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static const struct clk_ops at91sam9x5_usb_ops = {
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.recalc_rate = at91sam9x5_clk_usb_recalc_rate,
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2015-03-29 08:45:33 +07:00
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.determine_rate = at91sam9x5_clk_usb_determine_rate,
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2013-10-17 23:55:41 +07:00
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.get_parent = at91sam9x5_clk_usb_get_parent,
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.set_parent = at91sam9x5_clk_usb_set_parent,
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.set_rate = at91sam9x5_clk_usb_set_rate,
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};
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static int at91sam9n12_clk_usb_enable(struct clk_hw *hw)
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{
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struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
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2014-09-07 13:14:29 +07:00
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regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS,
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AT91_PMC_USBS);
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2013-10-17 23:55:41 +07:00
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return 0;
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}
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static void at91sam9n12_clk_usb_disable(struct clk_hw *hw)
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{
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struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
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2014-09-07 13:14:29 +07:00
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regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS, 0);
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2013-10-17 23:55:41 +07:00
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}
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static int at91sam9n12_clk_usb_is_enabled(struct clk_hw *hw)
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{
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struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
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2014-09-07 13:14:29 +07:00
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unsigned int usbr;
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2013-10-17 23:55:41 +07:00
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2014-09-07 13:14:29 +07:00
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regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
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return usbr & AT91_PMC_USBS;
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2013-10-17 23:55:41 +07:00
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}
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static const struct clk_ops at91sam9n12_usb_ops = {
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.enable = at91sam9n12_clk_usb_enable,
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.disable = at91sam9n12_clk_usb_disable,
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.is_enabled = at91sam9n12_clk_usb_is_enabled,
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.recalc_rate = at91sam9x5_clk_usb_recalc_rate,
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2015-03-29 08:45:33 +07:00
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.determine_rate = at91sam9x5_clk_usb_determine_rate,
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2013-10-17 23:55:41 +07:00
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.set_rate = at91sam9x5_clk_usb_set_rate,
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};
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static struct clk * __init
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2014-09-07 13:14:29 +07:00
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at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
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2013-10-17 23:55:41 +07:00
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const char **parent_names, u8 num_parents)
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{
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struct at91sam9x5_clk_usb *usb;
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struct clk *clk = NULL;
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struct clk_init_data init;
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usb = kzalloc(sizeof(*usb), GFP_KERNEL);
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if (!usb)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &at91sam9x5_usb_ops;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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2015-03-29 08:45:33 +07:00
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init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
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CLK_SET_RATE_PARENT;
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2013-10-17 23:55:41 +07:00
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usb->hw.init = &init;
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2014-09-07 13:14:29 +07:00
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usb->regmap = regmap;
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2013-10-17 23:55:41 +07:00
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clk = clk_register(NULL, &usb->hw);
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if (IS_ERR(clk))
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kfree(usb);
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return clk;
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}
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static struct clk * __init
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2014-09-07 13:14:29 +07:00
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at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
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2013-10-17 23:55:41 +07:00
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const char *parent_name)
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{
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struct at91sam9x5_clk_usb *usb;
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struct clk *clk = NULL;
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struct clk_init_data init;
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usb = kzalloc(sizeof(*usb), GFP_KERNEL);
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if (!usb)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &at91sam9n12_usb_ops;
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init.parent_names = &parent_name;
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init.num_parents = 1;
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2015-03-29 08:45:33 +07:00
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init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT;
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2013-10-17 23:55:41 +07:00
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usb->hw.init = &init;
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2014-09-07 13:14:29 +07:00
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usb->regmap = regmap;
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2013-10-17 23:55:41 +07:00
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clk = clk_register(NULL, &usb->hw);
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if (IS_ERR(clk))
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kfree(usb);
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return clk;
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}
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static unsigned long at91rm9200_clk_usb_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
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2014-09-07 13:14:29 +07:00
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unsigned int pllbr;
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2013-10-17 23:55:41 +07:00
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u8 usbdiv;
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2014-09-07 13:14:29 +07:00
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regmap_read(usb->regmap, AT91_CKGR_PLLBR, &pllbr);
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usbdiv = (pllbr & AT91_PMC_USBDIV) >> RM9200_USB_DIV_SHIFT;
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2013-10-17 23:55:41 +07:00
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if (usb->divisors[usbdiv])
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return parent_rate / usb->divisors[usbdiv];
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return 0;
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}
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static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
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2015-07-31 07:20:57 +07:00
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struct clk_hw *parent = clk_hw_get_parent(hw);
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2013-10-17 23:55:41 +07:00
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unsigned long bestrate = 0;
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int bestdiff = -1;
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unsigned long tmprate;
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int tmpdiff;
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int i = 0;
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2014-09-02 14:50:17 +07:00
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for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) {
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unsigned long tmp_parent_rate;
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2013-10-17 23:55:41 +07:00
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if (!usb->divisors[i])
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continue;
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2014-09-02 14:50:17 +07:00
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tmp_parent_rate = rate * usb->divisors[i];
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2015-07-31 07:20:57 +07:00
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tmp_parent_rate = clk_hw_round_rate(parent, tmp_parent_rate);
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2014-11-15 01:54:49 +07:00
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tmprate = DIV_ROUND_CLOSEST(tmp_parent_rate, usb->divisors[i]);
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2013-10-17 23:55:41 +07:00
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if (tmprate < rate)
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tmpdiff = rate - tmprate;
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else
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tmpdiff = tmprate - rate;
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if (bestdiff < 0 || bestdiff > tmpdiff) {
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bestrate = tmprate;
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bestdiff = tmpdiff;
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2014-09-02 14:50:17 +07:00
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*parent_rate = tmp_parent_rate;
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2013-10-17 23:55:41 +07:00
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}
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if (!bestdiff)
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break;
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}
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return bestrate;
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}
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static int at91rm9200_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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|
{
|
|
|
|
int i;
|
|
|
|
struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
|
2014-09-02 14:50:18 +07:00
|
|
|
unsigned long div;
|
2013-10-17 23:55:41 +07:00
|
|
|
|
2014-11-15 01:54:49 +07:00
|
|
|
if (!rate)
|
2013-10-17 23:55:41 +07:00
|
|
|
return -EINVAL;
|
2014-09-02 14:50:18 +07:00
|
|
|
|
2014-11-15 01:54:49 +07:00
|
|
|
div = DIV_ROUND_CLOSEST(parent_rate, rate);
|
2014-09-02 14:50:18 +07:00
|
|
|
|
2013-10-17 23:55:41 +07:00
|
|
|
for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) {
|
|
|
|
if (usb->divisors[i] == div) {
|
2014-09-07 13:14:29 +07:00
|
|
|
regmap_update_bits(usb->regmap, AT91_CKGR_PLLBR,
|
|
|
|
AT91_PMC_USBDIV,
|
|
|
|
i << RM9200_USB_DIV_SHIFT);
|
|
|
|
|
2013-10-17 23:55:41 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct clk_ops at91rm9200_usb_ops = {
|
|
|
|
.recalc_rate = at91rm9200_clk_usb_recalc_rate,
|
|
|
|
.round_rate = at91rm9200_clk_usb_round_rate,
|
|
|
|
.set_rate = at91rm9200_clk_usb_set_rate,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct clk * __init
|
2014-09-07 13:14:29 +07:00
|
|
|
at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
|
2013-10-17 23:55:41 +07:00
|
|
|
const char *parent_name, const u32 *divisors)
|
|
|
|
{
|
|
|
|
struct at91rm9200_clk_usb *usb;
|
|
|
|
struct clk *clk = NULL;
|
|
|
|
struct clk_init_data init;
|
|
|
|
|
|
|
|
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
|
|
|
|
if (!usb)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
init.name = name;
|
|
|
|
init.ops = &at91rm9200_usb_ops;
|
|
|
|
init.parent_names = &parent_name;
|
|
|
|
init.num_parents = 1;
|
2014-09-02 14:50:17 +07:00
|
|
|
init.flags = CLK_SET_RATE_PARENT;
|
2013-10-17 23:55:41 +07:00
|
|
|
|
|
|
|
usb->hw.init = &init;
|
2014-09-07 13:14:29 +07:00
|
|
|
usb->regmap = regmap;
|
2013-10-17 23:55:41 +07:00
|
|
|
memcpy(usb->divisors, divisors, sizeof(usb->divisors));
|
|
|
|
|
|
|
|
clk = clk_register(NULL, &usb->hw);
|
|
|
|
if (IS_ERR(clk))
|
|
|
|
kfree(usb);
|
|
|
|
|
|
|
|
return clk;
|
|
|
|
}
|
|
|
|
|
2014-09-07 13:14:29 +07:00
|
|
|
static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
|
2013-10-17 23:55:41 +07:00
|
|
|
{
|
|
|
|
struct clk *clk;
|
2016-02-20 08:29:17 +07:00
|
|
|
unsigned int num_parents;
|
2013-10-17 23:55:41 +07:00
|
|
|
const char *parent_names[USB_SOURCE_MAX];
|
|
|
|
const char *name = np->name;
|
2014-09-07 13:14:29 +07:00
|
|
|
struct regmap *regmap;
|
2013-10-17 23:55:41 +07:00
|
|
|
|
2015-05-29 16:25:45 +07:00
|
|
|
num_parents = of_clk_get_parent_count(np);
|
2016-02-20 08:29:17 +07:00
|
|
|
if (num_parents == 0 || num_parents > USB_SOURCE_MAX)
|
2013-10-17 23:55:41 +07:00
|
|
|
return;
|
|
|
|
|
2015-07-07 10:59:01 +07:00
|
|
|
of_clk_parent_fill(np, parent_names, num_parents);
|
2013-10-17 23:55:41 +07:00
|
|
|
|
|
|
|
of_property_read_string(np, "clock-output-names", &name);
|
|
|
|
|
2014-09-07 13:14:29 +07:00
|
|
|
regmap = syscon_node_to_regmap(of_get_parent(np));
|
|
|
|
if (IS_ERR(regmap))
|
|
|
|
return;
|
|
|
|
|
|
|
|
clk = at91sam9x5_clk_register_usb(regmap, name, parent_names,
|
|
|
|
num_parents);
|
2013-10-17 23:55:41 +07:00
|
|
|
if (IS_ERR(clk))
|
|
|
|
return;
|
|
|
|
|
|
|
|
of_clk_add_provider(np, of_clk_src_simple_get, clk);
|
|
|
|
}
|
2014-09-07 13:14:29 +07:00
|
|
|
CLK_OF_DECLARE(at91sam9x5_clk_usb, "atmel,at91sam9x5-clk-usb",
|
|
|
|
of_at91sam9x5_clk_usb_setup);
|
2013-10-17 23:55:41 +07:00
|
|
|
|
2014-09-07 13:14:29 +07:00
|
|
|
static void __init of_at91sam9n12_clk_usb_setup(struct device_node *np)
|
2013-10-17 23:55:41 +07:00
|
|
|
{
|
|
|
|
struct clk *clk;
|
|
|
|
const char *parent_name;
|
|
|
|
const char *name = np->name;
|
2014-09-07 13:14:29 +07:00
|
|
|
struct regmap *regmap;
|
2013-10-17 23:55:41 +07:00
|
|
|
|
|
|
|
parent_name = of_clk_get_parent_name(np, 0);
|
|
|
|
if (!parent_name)
|
|
|
|
return;
|
|
|
|
|
|
|
|
of_property_read_string(np, "clock-output-names", &name);
|
|
|
|
|
2014-09-07 13:14:29 +07:00
|
|
|
regmap = syscon_node_to_regmap(of_get_parent(np));
|
|
|
|
if (IS_ERR(regmap))
|
|
|
|
return;
|
|
|
|
|
|
|
|
clk = at91sam9n12_clk_register_usb(regmap, name, parent_name);
|
2013-10-17 23:55:41 +07:00
|
|
|
if (IS_ERR(clk))
|
|
|
|
return;
|
|
|
|
|
|
|
|
of_clk_add_provider(np, of_clk_src_simple_get, clk);
|
|
|
|
}
|
2014-09-07 13:14:29 +07:00
|
|
|
CLK_OF_DECLARE(at91sam9n12_clk_usb, "atmel,at91sam9n12-clk-usb",
|
|
|
|
of_at91sam9n12_clk_usb_setup);
|
2013-10-17 23:55:41 +07:00
|
|
|
|
2014-09-07 13:14:29 +07:00
|
|
|
static void __init of_at91rm9200_clk_usb_setup(struct device_node *np)
|
2013-10-17 23:55:41 +07:00
|
|
|
{
|
|
|
|
struct clk *clk;
|
|
|
|
const char *parent_name;
|
|
|
|
const char *name = np->name;
|
|
|
|
u32 divisors[4] = {0, 0, 0, 0};
|
2014-09-07 13:14:29 +07:00
|
|
|
struct regmap *regmap;
|
2013-10-17 23:55:41 +07:00
|
|
|
|
|
|
|
parent_name = of_clk_get_parent_name(np, 0);
|
|
|
|
if (!parent_name)
|
|
|
|
return;
|
|
|
|
|
|
|
|
of_property_read_u32_array(np, "atmel,clk-divisors", divisors, 4);
|
|
|
|
if (!divisors[0])
|
|
|
|
return;
|
|
|
|
|
|
|
|
of_property_read_string(np, "clock-output-names", &name);
|
|
|
|
|
2014-09-07 13:14:29 +07:00
|
|
|
regmap = syscon_node_to_regmap(of_get_parent(np));
|
|
|
|
if (IS_ERR(regmap))
|
|
|
|
return;
|
|
|
|
|
|
|
|
clk = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors);
|
2013-10-17 23:55:41 +07:00
|
|
|
if (IS_ERR(clk))
|
|
|
|
return;
|
|
|
|
|
|
|
|
of_clk_add_provider(np, of_clk_src_simple_get, clk);
|
|
|
|
}
|
2014-09-07 13:14:29 +07:00
|
|
|
CLK_OF_DECLARE(at91rm9200_clk_usb, "atmel,at91rm9200-clk-usb",
|
|
|
|
of_at91rm9200_clk_usb_setup);
|