AuxXxilium/linux_dsm_epyc7002
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linux_dsm_epyc7002/arch/arm/mach-imx/mach-vf610.c

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ARM: imx: add initial support for VF610 Add initial support for Freescale Vybrid VF610 SoC. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-05-28 16:12:21 +07:00
/*
* Copyright 2012-2013 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/of_platform.h>
#include <linux/irqchip.h>
#include <asm/mach/arch.h>
#include <asm/hardware/cache-l2x0.h>
ARM: imx: mark .dt_compat as const Otherwise GCC will mark the .init.rodata section R/W, which causes a compile error once we add other real R/O data. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-01 15:03:00 +07:00
static const char * const vf610_dt_compat[] __initconst = {
ARM vf610: add compatibilty strings of supported Vybrid SoC's The Vybrid SoC family (in the kernel known as vf610) is a familiy of multiple similar SoC's. The VF5xx series comes without secondary Cortex-M4 core, while the second number VFx1x indicates the presence of a L2 cache controller. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-11-28 06:27:05 +07:00
"fsl,vf500",
"fsl,vf510",
"fsl,vf600",
ARM: imx: add initial support for VF610 Add initial support for Freescale Vybrid VF610 SoC. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-05-28 16:12:21 +07:00
"fsl,vf610",
ARM: vf610: enable Cortex-M4 configuration on Vybrid SoC This patch allows to build the Kernel for Vybrid (VF6xx) SoC when ARMv7-M CPU is selected. The resulting image runs on the secondary Cortex-M4 core. This core has equally access to all peripherals as the main Cortex-A5 core. However, there is no resource control mechanism, hence when both cores are used simultaneously, orthogonal device tree's are required. The boot CPU is dependent on the SoC variant. The available boards use mostly variants where the Cortex-A5 is the primary and hence the boot CPU. Booting the secondary Cortex-M4 CPU needs SoC specific registers written. There is no in kernel support for this right now, a external userspace utility called "m4boot" can be used to boot the kernel: m4boot xipImage initramfs.cpio.lzo vf610m4-colibri.dtb Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-05-20 05:03:52 +07:00
"fsl,vf610m4",
ARM: imx: add initial support for VF610 Add initial support for Freescale Vybrid VF610 SoC. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-05-28 16:12:21 +07:00
NULL,
};
ARM vf610: add compatibilty strings of supported Vybrid SoC's The Vybrid SoC family (in the kernel known as vf610) is a familiy of multiple similar SoC's. The VF5xx series comes without secondary Cortex-M4 core, while the second number VFx1x indicates the presence of a L2 cache controller. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-11-28 06:27:05 +07:00
DT_MACHINE_START(VYBRID_VF610, "Freescale Vybrid VF5xx/VF6xx (Device Tree)")
ARM: l2c: imx vf610: convert to generic l2c OF initialisation Remove the explicit call to l2x0_of_init(), converting to the generic infrastructure instead. Since the .init_irq method only calls irqchip_init(), we can remove that too as the generic code will take care of that. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-04-28 21:48:14 +07:00
.l2c_aux_val = 0,
.l2c_aux_mask = ~0,
ARM: imx: add initial support for VF610 Add initial support for Freescale Vybrid VF610 SoC. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-05-28 16:12:21 +07:00
.dt_compat = vf610_dt_compat,
MACHINE_END
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