2008-01-24 17:22:38 +07:00
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/*******************************************************************************
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Intel(R) Gigabit Ethernet Linux driver
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2009-02-07 06:23:12 +07:00
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Copyright(c) 2007-2009 Intel Corporation.
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2008-01-24 17:22:38 +07:00
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#include <linux/if_ether.h>
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#include <linux/delay.h>
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#include "e1000_mac.h"
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#include "e1000_nvm.h"
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/**
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2008-06-28 00:59:59 +07:00
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* igb_raise_eec_clk - Raise EEPROM clock
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2008-01-24 17:22:38 +07:00
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* @hw: pointer to the HW structure
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* @eecd: pointer to the EEPROM
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*
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* Enable/Raise the EEPROM clock bit.
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**/
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static void igb_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
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{
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*eecd = *eecd | E1000_EECD_SK;
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wr32(E1000_EECD, *eecd);
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wrfl();
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udelay(hw->nvm.delay_usec);
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}
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/**
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2008-06-28 00:59:59 +07:00
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* igb_lower_eec_clk - Lower EEPROM clock
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2008-01-24 17:22:38 +07:00
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* @hw: pointer to the HW structure
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* @eecd: pointer to the EEPROM
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*
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* Clear/Lower the EEPROM clock bit.
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**/
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static void igb_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
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{
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*eecd = *eecd & ~E1000_EECD_SK;
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wr32(E1000_EECD, *eecd);
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wrfl();
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udelay(hw->nvm.delay_usec);
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}
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/**
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2008-06-28 00:59:59 +07:00
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* igb_shift_out_eec_bits - Shift data bits our to the EEPROM
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2008-01-24 17:22:38 +07:00
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* @hw: pointer to the HW structure
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* @data: data to send to the EEPROM
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* @count: number of bits to shift out
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*
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* We need to shift 'count' bits out to the EEPROM. So, the value in the
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* "data" parameter will be shifted out to the EEPROM one bit at a time.
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* In order to do this, "data" must be broken down into bits.
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**/
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static void igb_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
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{
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struct e1000_nvm_info *nvm = &hw->nvm;
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u32 eecd = rd32(E1000_EECD);
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u32 mask;
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mask = 0x01 << (count - 1);
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2009-10-05 13:34:44 +07:00
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if (nvm->type == e1000_nvm_eeprom_spi)
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2008-01-24 17:22:38 +07:00
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eecd |= E1000_EECD_DO;
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do {
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eecd &= ~E1000_EECD_DI;
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if (data & mask)
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eecd |= E1000_EECD_DI;
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wr32(E1000_EECD, eecd);
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wrfl();
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udelay(nvm->delay_usec);
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igb_raise_eec_clk(hw, &eecd);
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igb_lower_eec_clk(hw, &eecd);
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mask >>= 1;
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} while (mask);
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eecd &= ~E1000_EECD_DI;
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wr32(E1000_EECD, eecd);
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}
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/**
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2008-06-28 00:59:59 +07:00
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* igb_shift_in_eec_bits - Shift data bits in from the EEPROM
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2008-01-24 17:22:38 +07:00
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* @hw: pointer to the HW structure
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* @count: number of bits to shift in
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*
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* In order to read a register from the EEPROM, we need to shift 'count' bits
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* in from the EEPROM. Bits are "shifted in" by raising the clock input to
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* the EEPROM (setting the SK bit), and then reading the value of the data out
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* "DO" bit. During this "shifting in" process the data in "DI" bit should
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* always be clear.
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**/
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static u16 igb_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
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{
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u32 eecd;
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u32 i;
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u16 data;
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eecd = rd32(E1000_EECD);
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eecd &= ~(E1000_EECD_DO | E1000_EECD_DI);
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data = 0;
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for (i = 0; i < count; i++) {
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data <<= 1;
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igb_raise_eec_clk(hw, &eecd);
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eecd = rd32(E1000_EECD);
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eecd &= ~E1000_EECD_DI;
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if (eecd & E1000_EECD_DO)
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data |= 1;
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igb_lower_eec_clk(hw, &eecd);
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}
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return data;
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}
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/**
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2008-06-28 00:59:59 +07:00
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* igb_poll_eerd_eewr_done - Poll for EEPROM read/write completion
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2008-01-24 17:22:38 +07:00
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* @hw: pointer to the HW structure
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* @ee_reg: EEPROM flag for polling
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*
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* Polls the EEPROM status bit for either read or write completion based
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* upon the value of 'ee_reg'.
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**/
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static s32 igb_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
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{
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u32 attempts = 100000;
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u32 i, reg = 0;
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s32 ret_val = -E1000_ERR_NVM;
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for (i = 0; i < attempts; i++) {
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if (ee_reg == E1000_NVM_POLL_READ)
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reg = rd32(E1000_EERD);
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else
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reg = rd32(E1000_EEWR);
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if (reg & E1000_NVM_RW_REG_DONE) {
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ret_val = 0;
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break;
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}
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udelay(5);
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}
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return ret_val;
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}
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/**
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2008-06-28 00:59:59 +07:00
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* igb_acquire_nvm - Generic request for access to EEPROM
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2008-01-24 17:22:38 +07:00
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* @hw: pointer to the HW structure
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*
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* Set the EEPROM access request bit and wait for EEPROM access grant bit.
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* Return successful if access grant bit set, else clear the request for
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* EEPROM access and return -E1000_ERR_NVM (-1).
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**/
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s32 igb_acquire_nvm(struct e1000_hw *hw)
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{
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u32 eecd = rd32(E1000_EECD);
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s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
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s32 ret_val = 0;
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wr32(E1000_EECD, eecd | E1000_EECD_REQ);
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eecd = rd32(E1000_EECD);
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while (timeout) {
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if (eecd & E1000_EECD_GNT)
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break;
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udelay(5);
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eecd = rd32(E1000_EECD);
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timeout--;
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}
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if (!timeout) {
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eecd &= ~E1000_EECD_REQ;
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wr32(E1000_EECD, eecd);
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2008-06-28 01:00:18 +07:00
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hw_dbg("Could not acquire NVM grant\n");
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2008-01-24 17:22:38 +07:00
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ret_val = -E1000_ERR_NVM;
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}
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return ret_val;
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}
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/**
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2008-06-28 00:59:59 +07:00
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* igb_standby_nvm - Return EEPROM to standby state
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2008-01-24 17:22:38 +07:00
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* @hw: pointer to the HW structure
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*
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* Return the EEPROM to a standby state.
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**/
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static void igb_standby_nvm(struct e1000_hw *hw)
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{
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struct e1000_nvm_info *nvm = &hw->nvm;
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u32 eecd = rd32(E1000_EECD);
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2009-10-05 13:34:44 +07:00
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if (nvm->type == e1000_nvm_eeprom_spi) {
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2008-01-24 17:22:38 +07:00
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/* Toggle CS to flush commands */
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eecd |= E1000_EECD_CS;
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wr32(E1000_EECD, eecd);
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wrfl();
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udelay(nvm->delay_usec);
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eecd &= ~E1000_EECD_CS;
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wr32(E1000_EECD, eecd);
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wrfl();
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udelay(nvm->delay_usec);
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}
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}
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/**
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* e1000_stop_nvm - Terminate EEPROM command
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* @hw: pointer to the HW structure
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*
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* Terminates the current command by inverting the EEPROM's chip select pin.
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**/
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static void e1000_stop_nvm(struct e1000_hw *hw)
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{
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u32 eecd;
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eecd = rd32(E1000_EECD);
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if (hw->nvm.type == e1000_nvm_eeprom_spi) {
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/* Pull CS high */
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eecd |= E1000_EECD_CS;
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igb_lower_eec_clk(hw, &eecd);
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}
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}
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/**
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2008-06-28 00:59:59 +07:00
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* igb_release_nvm - Release exclusive access to EEPROM
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2008-01-24 17:22:38 +07:00
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* @hw: pointer to the HW structure
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*
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* Stop any current commands to the EEPROM and clear the EEPROM request bit.
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**/
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void igb_release_nvm(struct e1000_hw *hw)
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{
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u32 eecd;
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e1000_stop_nvm(hw);
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eecd = rd32(E1000_EECD);
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eecd &= ~E1000_EECD_REQ;
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wr32(E1000_EECD, eecd);
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}
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/**
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2008-06-28 00:59:59 +07:00
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* igb_ready_nvm_eeprom - Prepares EEPROM for read/write
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2008-01-24 17:22:38 +07:00
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* @hw: pointer to the HW structure
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*
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* Setups the EEPROM for reading and writing.
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**/
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static s32 igb_ready_nvm_eeprom(struct e1000_hw *hw)
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{
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struct e1000_nvm_info *nvm = &hw->nvm;
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u32 eecd = rd32(E1000_EECD);
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s32 ret_val = 0;
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u16 timeout = 0;
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u8 spi_stat_reg;
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2009-10-05 13:34:44 +07:00
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if (nvm->type == e1000_nvm_eeprom_spi) {
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2008-01-24 17:22:38 +07:00
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/* Clear SK and CS */
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eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
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wr32(E1000_EECD, eecd);
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udelay(1);
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timeout = NVM_MAX_RETRY_SPI;
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/*
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* Read "Status Register" repeatedly until the LSB is cleared.
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* The EEPROM will signal that the command has been completed
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* by clearing bit 0 of the internal status register. If it's
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* not cleared within 'timeout', then error out.
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*/
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while (timeout) {
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igb_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
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hw->nvm.opcode_bits);
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spi_stat_reg = (u8)igb_shift_in_eec_bits(hw, 8);
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if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
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break;
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udelay(5);
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igb_standby_nvm(hw);
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timeout--;
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}
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if (!timeout) {
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2008-06-28 01:00:18 +07:00
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hw_dbg("SPI NVM Status error\n");
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2008-01-24 17:22:38 +07:00
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ret_val = -E1000_ERR_NVM;
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goto out;
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}
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}
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out:
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return ret_val;
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}
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2011-03-12 11:43:18 +07:00
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/**
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* igb_read_nvm_spi - Read EEPROM's using SPI
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* @hw: pointer to the HW structure
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* @offset: offset of word in the EEPROM to read
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* @words: number of words to read
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* @data: word read from the EEPROM
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*
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* Reads a 16 bit word from the EEPROM.
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**/
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s32 igb_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
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{
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struct e1000_nvm_info *nvm = &hw->nvm;
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u32 i = 0;
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s32 ret_val;
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u16 word_in;
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u8 read_opcode = NVM_READ_OPCODE_SPI;
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/*
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* A check for invalid values: offset too large, too many words,
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* and not enough words.
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*/
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if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
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(words == 0)) {
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hw_dbg("nvm parameter(s) out of bounds\n");
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ret_val = -E1000_ERR_NVM;
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goto out;
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}
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ret_val = nvm->ops.acquire(hw);
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if (ret_val)
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goto out;
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ret_val = igb_ready_nvm_eeprom(hw);
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|
|
if (ret_val)
|
|
|
|
goto release;
|
|
|
|
|
|
|
|
igb_standby_nvm(hw);
|
|
|
|
|
|
|
|
if ((nvm->address_bits == 8) && (offset >= 128))
|
|
|
|
read_opcode |= NVM_A8_OPCODE_SPI;
|
|
|
|
|
|
|
|
/* Send the READ command (opcode + addr) */
|
|
|
|
igb_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
|
|
|
|
igb_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Read the data. SPI NVMs increment the address with each byte
|
|
|
|
* read and will roll over if reading beyond the end. This allows
|
|
|
|
* us to read the whole NVM from any offset
|
|
|
|
*/
|
|
|
|
for (i = 0; i < words; i++) {
|
|
|
|
word_in = igb_shift_in_eec_bits(hw, 16);
|
|
|
|
data[i] = (word_in >> 8) | (word_in << 8);
|
|
|
|
}
|
|
|
|
|
|
|
|
release:
|
|
|
|
nvm->ops.release(hw);
|
|
|
|
|
|
|
|
out:
|
|
|
|
return ret_val;
|
|
|
|
}
|
|
|
|
|
2008-01-24 17:22:38 +07:00
|
|
|
/**
|
2008-06-28 00:59:59 +07:00
|
|
|
* igb_read_nvm_eerd - Reads EEPROM using EERD register
|
2008-01-24 17:22:38 +07:00
|
|
|
* @hw: pointer to the HW structure
|
|
|
|
* @offset: offset of word in the EEPROM to read
|
|
|
|
* @words: number of words to read
|
|
|
|
* @data: word read from the EEPROM
|
|
|
|
*
|
|
|
|
* Reads a 16 bit word from the EEPROM using the EERD register.
|
|
|
|
**/
|
|
|
|
s32 igb_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
|
|
|
|
{
|
|
|
|
struct e1000_nvm_info *nvm = &hw->nvm;
|
|
|
|
u32 i, eerd = 0;
|
|
|
|
s32 ret_val = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A check for invalid values: offset too large, too many words,
|
|
|
|
* and not enough words.
|
|
|
|
*/
|
|
|
|
if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
|
|
|
|
(words == 0)) {
|
2008-06-28 01:00:18 +07:00
|
|
|
hw_dbg("nvm parameter(s) out of bounds\n");
|
2008-01-24 17:22:38 +07:00
|
|
|
ret_val = -E1000_ERR_NVM;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < words; i++) {
|
|
|
|
eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
|
|
|
|
E1000_NVM_RW_REG_START;
|
|
|
|
|
|
|
|
wr32(E1000_EERD, eerd);
|
|
|
|
ret_val = igb_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
|
|
|
|
if (ret_val)
|
|
|
|
break;
|
|
|
|
|
|
|
|
data[i] = (rd32(E1000_EERD) >>
|
2011-03-12 11:43:18 +07:00
|
|
|
E1000_NVM_RW_REG_DATA);
|
2008-01-24 17:22:38 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
|
|
|
return ret_val;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2008-06-28 00:59:59 +07:00
|
|
|
* igb_write_nvm_spi - Write to EEPROM using SPI
|
2008-01-24 17:22:38 +07:00
|
|
|
* @hw: pointer to the HW structure
|
|
|
|
* @offset: offset within the EEPROM to be written to
|
|
|
|
* @words: number of words to write
|
|
|
|
* @data: 16 bit word(s) to be written to the EEPROM
|
|
|
|
*
|
|
|
|
* Writes data to EEPROM at offset using SPI interface.
|
|
|
|
*
|
|
|
|
* If e1000_update_nvm_checksum is not called after this function , the
|
|
|
|
* EEPROM will most likley contain an invalid checksum.
|
|
|
|
**/
|
|
|
|
s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
|
|
|
|
{
|
|
|
|
struct e1000_nvm_info *nvm = &hw->nvm;
|
|
|
|
s32 ret_val;
|
|
|
|
u16 widx = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A check for invalid values: offset too large, too many words,
|
|
|
|
* and not enough words.
|
|
|
|
*/
|
|
|
|
if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
|
|
|
|
(words == 0)) {
|
2008-06-28 01:00:18 +07:00
|
|
|
hw_dbg("nvm parameter(s) out of bounds\n");
|
2008-01-24 17:22:38 +07:00
|
|
|
ret_val = -E1000_ERR_NVM;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2009-02-07 06:17:47 +07:00
|
|
|
ret_val = hw->nvm.ops.acquire(hw);
|
2008-01-24 17:22:38 +07:00
|
|
|
if (ret_val)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
msleep(10);
|
|
|
|
|
|
|
|
while (widx < words) {
|
|
|
|
u8 write_opcode = NVM_WRITE_OPCODE_SPI;
|
|
|
|
|
|
|
|
ret_val = igb_ready_nvm_eeprom(hw);
|
|
|
|
if (ret_val)
|
|
|
|
goto release;
|
|
|
|
|
|
|
|
igb_standby_nvm(hw);
|
|
|
|
|
|
|
|
/* Send the WRITE ENABLE command (8 bit opcode) */
|
|
|
|
igb_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
|
|
|
|
nvm->opcode_bits);
|
|
|
|
|
|
|
|
igb_standby_nvm(hw);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Some SPI eeproms use the 8th address bit embedded in the
|
|
|
|
* opcode
|
|
|
|
*/
|
|
|
|
if ((nvm->address_bits == 8) && (offset >= 128))
|
|
|
|
write_opcode |= NVM_A8_OPCODE_SPI;
|
|
|
|
|
|
|
|
/* Send the Write command (8-bit opcode + addr) */
|
|
|
|
igb_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
|
|
|
|
igb_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
|
|
|
|
nvm->address_bits);
|
|
|
|
|
|
|
|
/* Loop to allow for up to whole page write of eeprom */
|
|
|
|
while (widx < words) {
|
|
|
|
u16 word_out = data[widx];
|
|
|
|
word_out = (word_out >> 8) | (word_out << 8);
|
|
|
|
igb_shift_out_eec_bits(hw, word_out, 16);
|
|
|
|
widx++;
|
|
|
|
|
|
|
|
if ((((offset + widx) * 2) % nvm->page_size) == 0) {
|
|
|
|
igb_standby_nvm(hw);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
msleep(10);
|
|
|
|
release:
|
2009-02-07 06:17:47 +07:00
|
|
|
hw->nvm.ops.release(hw);
|
2008-01-24 17:22:38 +07:00
|
|
|
|
|
|
|
out:
|
|
|
|
return ret_val;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2010-11-23 00:17:21 +07:00
|
|
|
* igb_read_part_string - Read device part number
|
2008-01-24 17:22:38 +07:00
|
|
|
* @hw: pointer to the HW structure
|
|
|
|
* @part_num: pointer to device part number
|
2010-11-23 00:17:21 +07:00
|
|
|
* @part_num_size: size of part number buffer
|
2008-01-24 17:22:38 +07:00
|
|
|
*
|
|
|
|
* Reads the product board assembly (PBA) number from the EEPROM and stores
|
|
|
|
* the value in part_num.
|
|
|
|
**/
|
2010-11-23 00:17:21 +07:00
|
|
|
s32 igb_read_part_string(struct e1000_hw *hw, u8 *part_num, u32 part_num_size)
|
2008-01-24 17:22:38 +07:00
|
|
|
{
|
2010-11-23 00:17:21 +07:00
|
|
|
s32 ret_val;
|
2008-01-24 17:22:38 +07:00
|
|
|
u16 nvm_data;
|
2010-11-23 00:17:21 +07:00
|
|
|
u16 pointer;
|
|
|
|
u16 offset;
|
|
|
|
u16 length;
|
|
|
|
|
|
|
|
if (part_num == NULL) {
|
|
|
|
hw_dbg("PBA string buffer was null\n");
|
|
|
|
ret_val = E1000_ERR_INVALID_ARGUMENT;
|
|
|
|
goto out;
|
|
|
|
}
|
2008-01-24 17:22:38 +07:00
|
|
|
|
2009-02-07 06:17:47 +07:00
|
|
|
ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
|
2008-01-24 17:22:38 +07:00
|
|
|
if (ret_val) {
|
2008-06-28 01:00:18 +07:00
|
|
|
hw_dbg("NVM Read Error\n");
|
2008-01-24 17:22:38 +07:00
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2010-11-23 00:17:21 +07:00
|
|
|
ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pointer);
|
2008-01-24 17:22:38 +07:00
|
|
|
if (ret_val) {
|
2008-06-28 01:00:18 +07:00
|
|
|
hw_dbg("NVM Read Error\n");
|
2008-01-24 17:22:38 +07:00
|
|
|
goto out;
|
|
|
|
}
|
2010-11-23 00:17:21 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* if nvm_data is not ptr guard the PBA must be in legacy format which
|
|
|
|
* means pointer is actually our second data word for the PBA number
|
|
|
|
* and we can decode it into an ascii string
|
|
|
|
*/
|
|
|
|
if (nvm_data != NVM_PBA_PTR_GUARD) {
|
|
|
|
hw_dbg("NVM PBA number is not stored as string\n");
|
|
|
|
|
|
|
|
/* we will need 11 characters to store the PBA */
|
|
|
|
if (part_num_size < 11) {
|
|
|
|
hw_dbg("PBA string buffer too small\n");
|
|
|
|
return E1000_ERR_NO_SPACE;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* extract hex string from data and pointer */
|
|
|
|
part_num[0] = (nvm_data >> 12) & 0xF;
|
|
|
|
part_num[1] = (nvm_data >> 8) & 0xF;
|
|
|
|
part_num[2] = (nvm_data >> 4) & 0xF;
|
|
|
|
part_num[3] = nvm_data & 0xF;
|
|
|
|
part_num[4] = (pointer >> 12) & 0xF;
|
|
|
|
part_num[5] = (pointer >> 8) & 0xF;
|
|
|
|
part_num[6] = '-';
|
|
|
|
part_num[7] = 0;
|
|
|
|
part_num[8] = (pointer >> 4) & 0xF;
|
|
|
|
part_num[9] = pointer & 0xF;
|
|
|
|
|
|
|
|
/* put a null character on the end of our string */
|
|
|
|
part_num[10] = '\0';
|
|
|
|
|
|
|
|
/* switch all the data but the '-' to hex char */
|
|
|
|
for (offset = 0; offset < 10; offset++) {
|
|
|
|
if (part_num[offset] < 0xA)
|
|
|
|
part_num[offset] += '0';
|
|
|
|
else if (part_num[offset] < 0x10)
|
|
|
|
part_num[offset] += 'A' - 0xA;
|
|
|
|
}
|
|
|
|
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret_val = hw->nvm.ops.read(hw, pointer, 1, &length);
|
|
|
|
if (ret_val) {
|
|
|
|
hw_dbg("NVM Read Error\n");
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (length == 0xFFFF || length == 0) {
|
|
|
|
hw_dbg("NVM PBA number section invalid length\n");
|
|
|
|
ret_val = E1000_ERR_NVM_PBA_SECTION;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
/* check if part_num buffer is big enough */
|
|
|
|
if (part_num_size < (((u32)length * 2) - 1)) {
|
|
|
|
hw_dbg("PBA string buffer too small\n");
|
|
|
|
ret_val = E1000_ERR_NO_SPACE;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* trim pba length from start of string */
|
|
|
|
pointer++;
|
|
|
|
length--;
|
|
|
|
|
|
|
|
for (offset = 0; offset < length; offset++) {
|
|
|
|
ret_val = hw->nvm.ops.read(hw, pointer + offset, 1, &nvm_data);
|
|
|
|
if (ret_val) {
|
|
|
|
hw_dbg("NVM Read Error\n");
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
part_num[offset * 2] = (u8)(nvm_data >> 8);
|
|
|
|
part_num[(offset * 2) + 1] = (u8)(nvm_data & 0xFF);
|
|
|
|
}
|
|
|
|
part_num[offset * 2] = '\0';
|
2008-01-24 17:22:38 +07:00
|
|
|
|
|
|
|
out:
|
|
|
|
return ret_val;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2008-06-28 00:59:59 +07:00
|
|
|
* igb_read_mac_addr - Read device MAC address
|
2008-01-24 17:22:38 +07:00
|
|
|
* @hw: pointer to the HW structure
|
|
|
|
*
|
|
|
|
* Reads the device MAC address from the EEPROM and stores the value.
|
|
|
|
* Since devices with two ports use the same EEPROM, we increment the
|
|
|
|
* last bit in the MAC address for the second port.
|
|
|
|
**/
|
|
|
|
s32 igb_read_mac_addr(struct e1000_hw *hw)
|
|
|
|
{
|
2009-02-07 06:17:06 +07:00
|
|
|
u32 rar_high;
|
|
|
|
u32 rar_low;
|
|
|
|
u16 i;
|
2008-01-24 17:22:38 +07:00
|
|
|
|
2009-02-07 06:17:06 +07:00
|
|
|
rar_high = rd32(E1000_RAH(0));
|
|
|
|
rar_low = rd32(E1000_RAL(0));
|
2008-01-24 17:22:38 +07:00
|
|
|
|
2009-02-07 06:17:06 +07:00
|
|
|
for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++)
|
|
|
|
hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
|
|
|
|
|
|
|
|
for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
|
|
|
|
hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
|
2008-01-24 17:22:38 +07:00
|
|
|
|
|
|
|
for (i = 0; i < ETH_ALEN; i++)
|
|
|
|
hw->mac.addr[i] = hw->mac.perm_addr[i];
|
|
|
|
|
2009-02-07 06:17:06 +07:00
|
|
|
return 0;
|
2008-01-24 17:22:38 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2008-06-28 00:59:59 +07:00
|
|
|
* igb_validate_nvm_checksum - Validate EEPROM checksum
|
2008-01-24 17:22:38 +07:00
|
|
|
* @hw: pointer to the HW structure
|
|
|
|
*
|
|
|
|
* Calculates the EEPROM checksum by reading/adding each word of the EEPROM
|
|
|
|
* and then verifies that the sum of the EEPROM is equal to 0xBABA.
|
|
|
|
**/
|
|
|
|
s32 igb_validate_nvm_checksum(struct e1000_hw *hw)
|
|
|
|
{
|
|
|
|
s32 ret_val = 0;
|
|
|
|
u16 checksum = 0;
|
|
|
|
u16 i, nvm_data;
|
|
|
|
|
|
|
|
for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
|
2009-02-07 06:17:47 +07:00
|
|
|
ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
|
2008-01-24 17:22:38 +07:00
|
|
|
if (ret_val) {
|
2008-06-28 01:00:18 +07:00
|
|
|
hw_dbg("NVM Read Error\n");
|
2008-01-24 17:22:38 +07:00
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
checksum += nvm_data;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (checksum != (u16) NVM_SUM) {
|
2008-06-28 01:00:18 +07:00
|
|
|
hw_dbg("NVM Checksum Invalid\n");
|
2008-01-24 17:22:38 +07:00
|
|
|
ret_val = -E1000_ERR_NVM;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
|
|
|
return ret_val;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2008-06-28 00:59:59 +07:00
|
|
|
* igb_update_nvm_checksum - Update EEPROM checksum
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2008-01-24 17:22:38 +07:00
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* @hw: pointer to the HW structure
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*
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* Updates the EEPROM checksum by reading/adding each word of the EEPROM
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* up to the checksum. Then calculates the EEPROM checksum and writes the
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* value to the EEPROM.
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**/
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s32 igb_update_nvm_checksum(struct e1000_hw *hw)
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{
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s32 ret_val;
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u16 checksum = 0;
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u16 i, nvm_data;
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for (i = 0; i < NVM_CHECKSUM_REG; i++) {
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2009-02-07 06:17:47 +07:00
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ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
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2008-01-24 17:22:38 +07:00
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if (ret_val) {
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2008-06-28 01:00:18 +07:00
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hw_dbg("NVM Read Error while updating checksum.\n");
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2008-01-24 17:22:38 +07:00
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goto out;
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}
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checksum += nvm_data;
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}
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checksum = (u16) NVM_SUM - checksum;
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2009-02-07 06:17:47 +07:00
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ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
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2008-01-24 17:22:38 +07:00
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if (ret_val)
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2008-06-28 01:00:18 +07:00
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hw_dbg("NVM Write Error while updating checksum.\n");
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2008-01-24 17:22:38 +07:00
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out:
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return ret_val;
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}
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