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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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62 lines
1.9 KiB
C
62 lines
1.9 KiB
C
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/*
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* CCI cache coherent interconnect support
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*
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* Copyright (C) 2013 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __LINUX_ARM_CCI_H
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#define __LINUX_ARM_CCI_H
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#include <linux/errno.h>
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#include <linux/types.h>
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struct device_node;
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#ifdef CONFIG_ARM_CCI
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extern bool cci_probed(void);
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extern int cci_ace_get_port(struct device_node *dn);
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extern int cci_disable_port_by_cpu(u64 mpidr);
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extern int __cci_control_port_by_device(struct device_node *dn, bool enable);
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extern int __cci_control_port_by_index(u32 port, bool enable);
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#else
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static inline bool cci_probed(void) { return false; }
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static inline int cci_ace_get_port(struct device_node *dn)
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{
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return -ENODEV;
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}
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static inline int cci_disable_port_by_cpu(u64 mpidr) { return -ENODEV; }
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static inline int __cci_control_port_by_device(struct device_node *dn,
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bool enable)
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{
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return -ENODEV;
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}
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static inline int __cci_control_port_by_index(u32 port, bool enable)
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{
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return -ENODEV;
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}
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#endif
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#define cci_disable_port_by_device(dev) \
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__cci_control_port_by_device(dev, false)
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#define cci_enable_port_by_device(dev) \
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__cci_control_port_by_device(dev, true)
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#define cci_disable_port_by_index(dev) \
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__cci_control_port_by_index(dev, false)
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#define cci_enable_port_by_index(dev) \
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__cci_control_port_by_index(dev, true)
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#endif
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