2012-08-09 18:00:38 +07:00
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/dts-v1/;
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/include/ "tegra30-cardhu.dtsi"
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/* This dts file support the cardhu A02 version of board */
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/ {
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model = "NVIDIA Tegra30 Cardhu A02 evaluation board";
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compatible = "nvidia,cardhu-a02", "nvidia,cardhu", "nvidia,tegra30";
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2012-08-09 18:00:39 +07:00
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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ddr_reg: regulator@100 {
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compatible = "regulator-fixed";
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reg = <100>;
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regulator-name = "vdd_ddr";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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gpio = <&pmic 6 0>;
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};
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sys_3v3_reg: regulator@101 {
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compatible = "regulator-fixed";
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reg = <101>;
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regulator-name = "sys_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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gpio = <&pmic 7 0>;
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};
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usb1_vbus_reg: regulator@102 {
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compatible = "regulator-fixed";
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reg = <102>;
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regulator-name = "usb1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio 68 0>; /* GPIO PI4 */
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gpio-open-drain;
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vin-supply = <&vdd_5v0_reg>;
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};
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usb3_vbus_reg: regulator@103 {
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compatible = "regulator-fixed";
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reg = <103>;
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regulator-name = "usb3_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio 63 0>; /* GPIO PH7 */
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gpio-open-drain;
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vin-supply = <&vdd_5v0_reg>;
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};
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vdd_5v0_reg: regulator@104 {
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compatible = "regulator-fixed";
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reg = <104>;
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regulator-name = "5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&pmic 2 0>;
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};
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vdd_bl_reg: regulator@105 {
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compatible = "regulator-fixed";
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reg = <105>;
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regulator-name = "vdd_bl";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio 83 0>; /* GPIO PK3 */
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};
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};
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2012-09-21 15:54:59 +07:00
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sdhci@78000400 {
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status = "okay";
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power-gpios = <&gpio 28 0>; /* gpio PD4 */
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bus-width = <4>;
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};
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2012-08-09 18:00:38 +07:00
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};
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