2005-04-17 05:20:36 +07:00
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/*
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2009-09-22 20:29:36 +07:00
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* include/linux/amba/mmci.h
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2005-04-17 05:20:36 +07:00
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*/
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2009-09-22 20:29:36 +07:00
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#ifndef AMBA_MMCI_H
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#define AMBA_MMCI_H
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2005-04-17 05:20:36 +07:00
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2007-02-10 04:49:31 +07:00
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#include <linux/mmc/host.h>
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2005-04-17 05:20:36 +07:00
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2011-12-13 22:57:07 +07:00
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/*
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* These defines is places here due to access is needed from machine
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* configuration files. The ST Micro version does not have ROD and
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* reuse the voltage registers for direction settings.
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*/
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#define MCI_ST_DATA2DIREN (1 << 2)
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#define MCI_ST_CMDDIREN (1 << 3)
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#define MCI_ST_DATA0DIREN (1 << 4)
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#define MCI_ST_DATA31DIREN (1 << 5)
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#define MCI_ST_FBCLKEN (1 << 7)
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#define MCI_ST_DATA74DIREN (1 << 8)
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ARM: mmci: add dmaengine-based DMA support
Based on a patch from Linus Walleij.
Add dmaengine based support for DMA to the MMCI driver, using the
Primecell DMA engine interface. The changes over Linus' driver are:
- rename txsize_threshold to dmasize_threshold, as this reflects the
purpose more.
- use 'mmci_dma_' as the function prefix rather than 'dma_mmci_'.
- clean up requesting of dma channels.
- don't release a single channel twice when it's shared between tx and rx.
- get rid of 'dma_enable' bool - instead check whether the channel is NULL.
- detect incomplete DMA at the end of a transfer. Some DMA controllers
(eg, PL08x) are unable to be configured for scatter DMA and also listen
to all four DMA request signals [BREQ,SREQ,LBREQ,LSREQ] from the MMCI.
They can do one or other but not both. As MMCI uses LBREQ/LSREQ for the
final burst/words, PL08x does not transfer the last few words.
- map and unmap DMA buffers using the DMA engine struct device, not the
MMCI struct device - the DMA engine is doing the DMA transfer, not us.
- avoid double-unmapping of the DMA buffers on MMCI data errors.
- don't check for negative values from the dmaengine tx submission
function - Dan says this must never fail.
- use new dmaengine helper functions rather than using the ugly function
pointers directly.
- allow DMA code to be fully optimized away using dma_inprogress() which
is defined to constant 0 if DMA engine support is disabled.
- request maximum segment size from the DMA engine struct device and
set this appropriately.
- removed checking of buffer alignment - the DMA engine should deal with
its own restrictions on buffer alignment, not the individual DMA engine
users.
- removed setting DMAREQCTL - this confuses some DMA controllers as it
causes LBREQ to be asserted for the last seven transfers, rather than
six SREQ and one LSREQ.
- removed burst setting - the DMA controller should not burst past the
transfer size required to complete the DMA operation.
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-12 02:35:53 +07:00
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/* Just some dummy forwarding */
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struct dma_chan;
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2010-04-08 13:39:38 +07:00
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/**
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* struct mmci_platform_data - platform configuration for the MMCI
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* (also known as PL180) block.
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* @f_max: the maximum operational frequency for this host in this
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* platform configuration. When this is specified it takes precedence
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* over the module parameter for the same frequency.
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* @ocr_mask: available voltages on the 4 pins from the block, this
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* is ignored if a regulator is used, see the MMC_VDD_* masks in
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* mmc/host.h
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2011-12-13 22:57:55 +07:00
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* @ios_handler: a callback function to act on specfic ios changes,
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* used for example to control a levelshifter
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2010-07-21 18:53:57 +07:00
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* mask into a value to be binary (or set some other custom bits
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* in MMCIPWR) or:ed and written into the MMCIPWR register of the
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* block. May also control external power based on the power_mode.
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2010-04-08 13:39:38 +07:00
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* @status: if no GPIO read function was given to the block in
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* gpio_wp (below) this function will be called to determine
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* whether a card is present in the MMC slot or not
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* @gpio_wp: read this GPIO pin to see if the card is write protected
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* @gpio_cd: read this GPIO pin to detect card insertion
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2010-08-09 18:54:43 +07:00
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* @cd_invert: true if the gpio_cd pin value is active low
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2010-04-08 13:39:38 +07:00
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* @capabilities: the capabilities of the block as implemented in
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* this platform, signify anything MMC_CAP_* from mmc/host.h
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2011-11-14 18:02:28 +07:00
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* @capabilities2: more capabilities, MMC_CAP2_* from mmc/host.h
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2011-12-13 22:57:07 +07:00
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* @sigdir: a bit field indicating for what bits in the MMC bus the host
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* should enable signal direction indication.
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2011-03-31 08:57:33 +07:00
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* @dma_filter: function used to select an appropriate RX and TX
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ARM: mmci: add dmaengine-based DMA support
Based on a patch from Linus Walleij.
Add dmaengine based support for DMA to the MMCI driver, using the
Primecell DMA engine interface. The changes over Linus' driver are:
- rename txsize_threshold to dmasize_threshold, as this reflects the
purpose more.
- use 'mmci_dma_' as the function prefix rather than 'dma_mmci_'.
- clean up requesting of dma channels.
- don't release a single channel twice when it's shared between tx and rx.
- get rid of 'dma_enable' bool - instead check whether the channel is NULL.
- detect incomplete DMA at the end of a transfer. Some DMA controllers
(eg, PL08x) are unable to be configured for scatter DMA and also listen
to all four DMA request signals [BREQ,SREQ,LBREQ,LSREQ] from the MMCI.
They can do one or other but not both. As MMCI uses LBREQ/LSREQ for the
final burst/words, PL08x does not transfer the last few words.
- map and unmap DMA buffers using the DMA engine struct device, not the
MMCI struct device - the DMA engine is doing the DMA transfer, not us.
- avoid double-unmapping of the DMA buffers on MMCI data errors.
- don't check for negative values from the dmaengine tx submission
function - Dan says this must never fail.
- use new dmaengine helper functions rather than using the ugly function
pointers directly.
- allow DMA code to be fully optimized away using dma_inprogress() which
is defined to constant 0 if DMA engine support is disabled.
- request maximum segment size from the DMA engine struct device and
set this appropriately.
- removed checking of buffer alignment - the DMA engine should deal with
its own restrictions on buffer alignment, not the individual DMA engine
users.
- removed setting DMAREQCTL - this confuses some DMA controllers as it
causes LBREQ to be asserted for the last seven transfers, rather than
six SREQ and one LSREQ.
- removed burst setting - the DMA controller should not burst past the
transfer size required to complete the DMA operation.
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-12 02:35:53 +07:00
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* DMA channel to be used for DMA, if and only if you're deploying the
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* generic DMA engine
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* @dma_rx_param: parameter passed to the DMA allocation
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2011-03-31 08:57:33 +07:00
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* filter in order to select an appropriate RX channel. If
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ARM: mmci: add dmaengine-based DMA support
Based on a patch from Linus Walleij.
Add dmaengine based support for DMA to the MMCI driver, using the
Primecell DMA engine interface. The changes over Linus' driver are:
- rename txsize_threshold to dmasize_threshold, as this reflects the
purpose more.
- use 'mmci_dma_' as the function prefix rather than 'dma_mmci_'.
- clean up requesting of dma channels.
- don't release a single channel twice when it's shared between tx and rx.
- get rid of 'dma_enable' bool - instead check whether the channel is NULL.
- detect incomplete DMA at the end of a transfer. Some DMA controllers
(eg, PL08x) are unable to be configured for scatter DMA and also listen
to all four DMA request signals [BREQ,SREQ,LBREQ,LSREQ] from the MMCI.
They can do one or other but not both. As MMCI uses LBREQ/LSREQ for the
final burst/words, PL08x does not transfer the last few words.
- map and unmap DMA buffers using the DMA engine struct device, not the
MMCI struct device - the DMA engine is doing the DMA transfer, not us.
- avoid double-unmapping of the DMA buffers on MMCI data errors.
- don't check for negative values from the dmaengine tx submission
function - Dan says this must never fail.
- use new dmaengine helper functions rather than using the ugly function
pointers directly.
- allow DMA code to be fully optimized away using dma_inprogress() which
is defined to constant 0 if DMA engine support is disabled.
- request maximum segment size from the DMA engine struct device and
set this appropriately.
- removed checking of buffer alignment - the DMA engine should deal with
its own restrictions on buffer alignment, not the individual DMA engine
users.
- removed setting DMAREQCTL - this confuses some DMA controllers as it
causes LBREQ to be asserted for the last seven transfers, rather than
six SREQ and one LSREQ.
- removed burst setting - the DMA controller should not burst past the
transfer size required to complete the DMA operation.
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-12 02:35:53 +07:00
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* there is a bidirectional RX+TX channel, then just specify
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* this and leave dma_tx_param set to NULL
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* @dma_tx_param: parameter passed to the DMA allocation
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2011-03-31 08:57:33 +07:00
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* filter in order to select an appropriate TX channel. If this
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ARM: mmci: add dmaengine-based DMA support
Based on a patch from Linus Walleij.
Add dmaengine based support for DMA to the MMCI driver, using the
Primecell DMA engine interface. The changes over Linus' driver are:
- rename txsize_threshold to dmasize_threshold, as this reflects the
purpose more.
- use 'mmci_dma_' as the function prefix rather than 'dma_mmci_'.
- clean up requesting of dma channels.
- don't release a single channel twice when it's shared between tx and rx.
- get rid of 'dma_enable' bool - instead check whether the channel is NULL.
- detect incomplete DMA at the end of a transfer. Some DMA controllers
(eg, PL08x) are unable to be configured for scatter DMA and also listen
to all four DMA request signals [BREQ,SREQ,LBREQ,LSREQ] from the MMCI.
They can do one or other but not both. As MMCI uses LBREQ/LSREQ for the
final burst/words, PL08x does not transfer the last few words.
- map and unmap DMA buffers using the DMA engine struct device, not the
MMCI struct device - the DMA engine is doing the DMA transfer, not us.
- avoid double-unmapping of the DMA buffers on MMCI data errors.
- don't check for negative values from the dmaengine tx submission
function - Dan says this must never fail.
- use new dmaengine helper functions rather than using the ugly function
pointers directly.
- allow DMA code to be fully optimized away using dma_inprogress() which
is defined to constant 0 if DMA engine support is disabled.
- request maximum segment size from the DMA engine struct device and
set this appropriately.
- removed checking of buffer alignment - the DMA engine should deal with
its own restrictions on buffer alignment, not the individual DMA engine
users.
- removed setting DMAREQCTL - this confuses some DMA controllers as it
causes LBREQ to be asserted for the last seven transfers, rather than
six SREQ and one LSREQ.
- removed burst setting - the DMA controller should not burst past the
transfer size required to complete the DMA operation.
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-12 02:35:53 +07:00
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* is NULL the driver will attempt to use the RX channel as a
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* bidirectional channel
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2010-04-08 13:39:38 +07:00
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*/
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2009-09-22 20:29:36 +07:00
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struct mmci_platform_data {
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2010-04-08 13:39:38 +07:00
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unsigned int f_max;
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unsigned int ocr_mask;
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2011-12-13 22:57:55 +07:00
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int (*ios_handler)(struct device *, struct mmc_ios *);
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2005-04-17 05:20:36 +07:00
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unsigned int (*status)(struct device *);
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2009-07-09 21:15:12 +07:00
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int gpio_wp;
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int gpio_cd;
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2010-08-09 18:54:43 +07:00
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bool cd_invert;
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2009-09-14 18:57:11 +07:00
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unsigned long capabilities;
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2011-11-14 18:02:28 +07:00
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unsigned long capabilities2;
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2011-12-13 22:57:07 +07:00
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u32 sigdir;
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ARM: mmci: add dmaengine-based DMA support
Based on a patch from Linus Walleij.
Add dmaengine based support for DMA to the MMCI driver, using the
Primecell DMA engine interface. The changes over Linus' driver are:
- rename txsize_threshold to dmasize_threshold, as this reflects the
purpose more.
- use 'mmci_dma_' as the function prefix rather than 'dma_mmci_'.
- clean up requesting of dma channels.
- don't release a single channel twice when it's shared between tx and rx.
- get rid of 'dma_enable' bool - instead check whether the channel is NULL.
- detect incomplete DMA at the end of a transfer. Some DMA controllers
(eg, PL08x) are unable to be configured for scatter DMA and also listen
to all four DMA request signals [BREQ,SREQ,LBREQ,LSREQ] from the MMCI.
They can do one or other but not both. As MMCI uses LBREQ/LSREQ for the
final burst/words, PL08x does not transfer the last few words.
- map and unmap DMA buffers using the DMA engine struct device, not the
MMCI struct device - the DMA engine is doing the DMA transfer, not us.
- avoid double-unmapping of the DMA buffers on MMCI data errors.
- don't check for negative values from the dmaengine tx submission
function - Dan says this must never fail.
- use new dmaengine helper functions rather than using the ugly function
pointers directly.
- allow DMA code to be fully optimized away using dma_inprogress() which
is defined to constant 0 if DMA engine support is disabled.
- request maximum segment size from the DMA engine struct device and
set this appropriately.
- removed checking of buffer alignment - the DMA engine should deal with
its own restrictions on buffer alignment, not the individual DMA engine
users.
- removed setting DMAREQCTL - this confuses some DMA controllers as it
causes LBREQ to be asserted for the last seven transfers, rather than
six SREQ and one LSREQ.
- removed burst setting - the DMA controller should not burst past the
transfer size required to complete the DMA operation.
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-12 02:35:53 +07:00
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bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
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void *dma_rx_param;
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void *dma_tx_param;
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2005-04-17 05:20:36 +07:00
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};
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#endif
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