2019-05-29 00:10:04 +07:00
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// SPDX-License-Identifier: GPL-2.0-only
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2013-01-21 16:49:06 +07:00
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/*
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* Copyright (c) 2013, NVIDIA Corporation. All rights reserved.
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*/
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2014-07-11 14:44:49 +07:00
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#include <asm/firmware.h>
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2015-04-03 07:32:14 +07:00
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#include <linux/tick.h>
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2013-01-21 16:49:06 +07:00
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#include <linux/cpuidle.h>
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2013-07-19 16:25:26 +07:00
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#include <linux/cpu_pm.h>
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2014-07-11 14:44:49 +07:00
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#include <linux/kernel.h>
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#include <linux/module.h>
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2013-01-21 16:49:06 +07:00
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2019-04-10 15:47:28 +07:00
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#include <linux/firmware/trusted_foundations.h>
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2013-01-21 16:49:06 +07:00
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#include <asm/cpuidle.h>
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2013-07-19 16:25:26 +07:00
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#include <asm/smp_plat.h>
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2014-07-11 14:44:49 +07:00
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#include <asm/suspend.h>
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2015-02-23 21:24:11 +07:00
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#include <asm/psci.h>
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2013-07-19 16:25:26 +07:00
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2016-04-28 19:52:45 +07:00
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#include "cpuidle.h"
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2013-07-19 16:25:26 +07:00
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#include "pm.h"
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#include "sleep.h"
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#ifdef CONFIG_PM_SLEEP
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#define TEGRA114_MAX_STATES 2
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#else
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#define TEGRA114_MAX_STATES 1
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#endif
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#ifdef CONFIG_PM_SLEEP
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static int tegra114_idle_power_down(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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local_fiq_disable();
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tegra_set_cpu_in_lp2();
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cpu_pm_enter();
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2019-03-18 05:52:05 +07:00
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call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2);
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2014-02-12 09:43:44 +07:00
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/* Do suspend by ourselves if the firmware does not implement it */
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2014-09-25 15:59:41 +07:00
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if (call_firmware_op(do_idle, 0) == -ENOSYS)
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2014-02-12 09:43:44 +07:00
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cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
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2013-07-19 16:25:26 +07:00
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cpu_pm_exit();
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tegra_clear_cpu_in_lp2();
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local_fiq_enable();
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return index;
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}
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2015-05-19 21:49:12 +07:00
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2017-08-10 05:14:45 +07:00
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static void tegra114_idle_enter_s2idle(struct cpuidle_device *dev,
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2015-05-19 21:49:12 +07:00
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struct cpuidle_driver *drv,
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int index)
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{
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tegra114_idle_power_down(dev, drv, index);
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}
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2013-07-19 16:25:26 +07:00
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#endif
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2013-01-21 16:49:06 +07:00
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static struct cpuidle_driver tegra_idle_driver = {
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.name = "tegra_idle",
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.owner = THIS_MODULE,
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2013-07-19 16:25:26 +07:00
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.state_count = TEGRA114_MAX_STATES,
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2013-01-21 16:49:06 +07:00
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.states = {
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[0] = ARM_CPUIDLE_WFI_STATE_PWR(600),
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2013-07-19 16:25:26 +07:00
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#ifdef CONFIG_PM_SLEEP
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[1] = {
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.enter = tegra114_idle_power_down,
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2017-08-10 05:14:45 +07:00
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.enter_s2idle = tegra114_idle_enter_s2idle,
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2013-07-19 16:25:26 +07:00
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.exit_latency = 500,
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.target_residency = 1000,
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2015-05-19 21:49:12 +07:00
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.flags = CPUIDLE_FLAG_TIMER_STOP,
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2013-07-19 16:25:26 +07:00
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.power_usage = 0,
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.name = "powered-down",
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.desc = "CPU power gated",
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},
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#endif
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2013-01-21 16:49:06 +07:00
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},
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};
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int __init tegra114_cpuidle_init(void)
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{
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2015-02-23 21:24:11 +07:00
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if (!psci_smp_available())
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return cpuidle_register(&tegra_idle_driver, NULL);
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return 0;
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2013-01-21 16:49:06 +07:00
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}
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