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linux_dsm_epyc7002/arch/powerpc/platforms/52xx/lite5200_sleep.S

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License cleanup: add SPDX GPL-2.0 license identifier to files with no license Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 21:07:57 +07:00
/* SPDX-License-Identifier: GPL-2.0 */
[POWERPC] MPC5200 low power mode Low-power mode implementation for Lite5200b. Some I/O registers are also saved here. A recent U-Boot that supports this (lite5200b_PM_config) is needed. Signed-off-by: Domen Puncer <domen.puncer@telargo.com> Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-18 03:32:31 +07:00
#include <asm/reg.h>
#include <asm/ppc_asm.h>
#include <asm/processor.h>
#include <asm/cache.h>
#define SDRAM_CTRL 0x104
#define SC_MODE_EN (1<<31)
#define SC_CKE (1<<30)
#define SC_REF_EN (1<<28)
#define SC_SOFT_PRE (1<<1)
#define GPIOW_GPIOE 0xc00
#define GPIOW_DDR 0xc08
#define GPIOW_DVO 0xc0c
#define CDM_CE 0x214
#define CDM_SDRAM (1<<3)
/* helpers... beware: r10 and r4 are overwritten */
#define SAVE_SPRN(reg, addr) \
mfspr r10, SPRN_##reg; \
stw r10, ((addr)*4)(r4);
#define LOAD_SPRN(reg, addr) \
lwz r10, ((addr)*4)(r4); \
mtspr SPRN_##reg, r10; \
sync; \
isync;
.data
registers:
.space 0x5c*4
.text
/* ---------------------------------------------------------------------- */
/* low-power mode with help of M68HLC908QT1 */
.globl lite5200_low_power
lite5200_low_power:
mr r7, r3 /* save SRAM va */
mr r8, r4 /* save MBAR va */
/* setup wakeup address for u-boot at physical location 0x0 */
lis r3, CONFIG_KERNEL_START@h
lis r4, lite5200_wakeup@h
ori r4, r4, lite5200_wakeup@l
sub r4, r4, r3
stw r4, 0(r3)
/*
* save stuff BDI overwrites
* 0xf0 (0xe0->0x100 gets overwritten when BDI connected;
* even when CONFIG_BDI* is disabled and MMU XLAT commented; heisenbug?))
* WARNING: self-refresh doesn't seem to work when BDI2000 is connected,
* possibly because BDI sets SDRAM registers before wakeup code does
*/
lis r4, registers@h
ori r4, r4, registers@l
lwz r10, 0xf0(r3)
stw r10, (0x1d*4)(r4)
/* save registers to r4 [destroys r10] */
SAVE_SPRN(LR, 0x1c)
bl save_regs
/* flush caches [destroys r3, r4] */
bl flush_data_cache
/* copy code to sram */
mr r4, r7
li r3, (sram_code_end - sram_code)/4
mtctr r3
lis r3, sram_code@h
ori r3, r3, sram_code@l
1:
lwz r5, 0(r3)
stw r5, 0(r4)
addi r3, r3, 4
addi r4, r4, 4
bdnz 1b
/* get tb_ticks_per_usec */
lis r3, tb_ticks_per_usec@h
lwz r11, tb_ticks_per_usec@l(r3)
/* disable I and D caches */
mfspr r3, SPRN_HID0
ori r3, r3, HID0_ICE | HID0_DCE
xori r3, r3, HID0_ICE | HID0_DCE
sync; isync;
mtspr SPRN_HID0, r3
sync; isync;
/* jump to sram */
mtlr r7
blrl
/* doesn't return */
sram_code:
/* self refresh */
lwz r4, SDRAM_CTRL(r8)
/* send NOP (precharge) */
oris r4, r4, SC_MODE_EN@h /* mode_en */
stw r4, SDRAM_CTRL(r8)
sync
ori r4, r4, SC_SOFT_PRE /* soft_pre */
stw r4, SDRAM_CTRL(r8)
sync
xori r4, r4, SC_SOFT_PRE
xoris r4, r4, SC_MODE_EN@h /* !mode_en */
stw r4, SDRAM_CTRL(r8)
sync
/* delay (for NOP to finish) */
li r12, 1
bl udelay
/*
* mode_en must not be set when enabling self-refresh
* send AR with CKE low (self-refresh)
*/
oris r4, r4, (SC_REF_EN | SC_CKE)@h
xoris r4, r4, (SC_CKE)@h /* ref_en !cke */
stw r4, SDRAM_CTRL(r8)
sync
/* delay (after !CKE there should be two cycles) */
li r12, 1
bl udelay
/* disable clock */
lwz r4, CDM_CE(r8)
ori r4, r4, CDM_SDRAM
xori r4, r4, CDM_SDRAM
stw r4, CDM_CE(r8)
sync
/* delay a bit */
li r12, 1
bl udelay
/* turn off with QT chip */
li r4, 0x02
stb r4, GPIOW_GPIOE(r8) /* enable gpio_wkup1 */
sync
stb r4, GPIOW_DVO(r8) /* "output" high */
sync
stb r4, GPIOW_DDR(r8) /* output */
sync
stb r4, GPIOW_DVO(r8) /* output high */
sync
/* 10uS delay */
li r12, 10
bl udelay
/* turn off */
li r4, 0
stb r4, GPIOW_DVO(r8) /* output low */
sync
/* wait until we're offline */
1:
b 1b
/* local udelay in sram is needed */
udelay: /* r11 - tb_ticks_per_usec, r12 - usecs, overwrites r13 */
mullw r12, r12, r11
mftb r13 /* start */
addi r12, r13, r12 /* end */
1:
mftb r13 /* current */
cmp cr0, r13, r12
blt 1b
blr
sram_code_end:
/* uboot jumps here on resume */
lite5200_wakeup:
bl restore_regs
/* HIDs, MSR */
LOAD_SPRN(HID1, 0x19)
LOAD_SPRN(HID2, 0x1a)
/* address translation is tricky (see turn_on_mmu) */
mfmsr r10
ori r10, r10, MSR_DR | MSR_IR
mtspr SPRN_SRR1, r10
lis r10, mmu_on@h
ori r10, r10, mmu_on@l
mtspr SPRN_SRR0, r10
sync
rfi
mmu_on:
/* kernel offset (r4 is still set from restore_registers) */
addis r4, r4, CONFIG_KERNEL_START@h
/* restore MSR */
lwz r10, (4*0x1b)(r4)
mtmsr r10
sync; isync;
/* invalidate caches */
mfspr r10, SPRN_HID0
ori r5, r10, HID0_ICFI | HID0_DCI
mtspr SPRN_HID0, r5 /* invalidate caches */
sync; isync;
mtspr SPRN_HID0, r10
sync; isync;
/* enable caches */
lwz r10, (4*0x18)(r4)
mtspr SPRN_HID0, r10 /* restore (enable caches, DPM) */
/* ^ this has to be after address translation set in MSR */
sync
isync
/* restore 0xf0 (BDI2000) */
lis r3, CONFIG_KERNEL_START@h
lwz r10, (0x1d*4)(r4)
stw r10, 0xf0(r3)
LOAD_SPRN(LR, 0x1c)
blr
/* ---------------------------------------------------------------------- */
/* boring code: helpers */
/* save registers */
#define SAVE_BAT(n, addr) \
SAVE_SPRN(DBAT##n##L, addr); \
SAVE_SPRN(DBAT##n##U, addr+1); \
SAVE_SPRN(IBAT##n##L, addr+2); \
SAVE_SPRN(IBAT##n##U, addr+3);
#define SAVE_SR(n, addr) \
mfsr r10, n; \
stw r10, ((addr)*4)(r4);
#define SAVE_4SR(n, addr) \
SAVE_SR(n, addr); \
SAVE_SR(n+1, addr+1); \
SAVE_SR(n+2, addr+2); \
SAVE_SR(n+3, addr+3);
save_regs:
stw r0, 0(r4)
stw r1, 0x4(r4)
stw r2, 0x8(r4)
stmw r11, 0xc(r4) /* 0xc -> 0x5f, (0x18*4-1) */
SAVE_SPRN(HID0, 0x18)
SAVE_SPRN(HID1, 0x19)
SAVE_SPRN(HID2, 0x1a)
mfmsr r10
stw r10, (4*0x1b)(r4)
/*SAVE_SPRN(LR, 0x1c) have to save it before the call */
/* 0x1d reserved by 0xf0 */
SAVE_SPRN(RPA, 0x1e)
SAVE_SPRN(SDR1, 0x1f)
/* save MMU regs */
SAVE_BAT(0, 0x20)
SAVE_BAT(1, 0x24)
SAVE_BAT(2, 0x28)
SAVE_BAT(3, 0x2c)
SAVE_BAT(4, 0x30)
SAVE_BAT(5, 0x34)
SAVE_BAT(6, 0x38)
SAVE_BAT(7, 0x3c)
SAVE_4SR(0, 0x40)
SAVE_4SR(4, 0x44)
SAVE_4SR(8, 0x48)
SAVE_4SR(12, 0x4c)
SAVE_SPRN(SPRG0, 0x50)
SAVE_SPRN(SPRG1, 0x51)
SAVE_SPRN(SPRG2, 0x52)
SAVE_SPRN(SPRG3, 0x53)
SAVE_SPRN(SPRG4, 0x54)
SAVE_SPRN(SPRG5, 0x55)
SAVE_SPRN(SPRG6, 0x56)
SAVE_SPRN(SPRG7, 0x57)
SAVE_SPRN(IABR, 0x58)
SAVE_SPRN(DABR, 0x59)
SAVE_SPRN(TBRL, 0x5a)
SAVE_SPRN(TBRU, 0x5b)
blr
/* restore registers */
#define LOAD_BAT(n, addr) \
LOAD_SPRN(DBAT##n##L, addr); \
LOAD_SPRN(DBAT##n##U, addr+1); \
LOAD_SPRN(IBAT##n##L, addr+2); \
LOAD_SPRN(IBAT##n##U, addr+3);
#define LOAD_SR(n, addr) \
lwz r10, ((addr)*4)(r4); \
mtsr n, r10;
#define LOAD_4SR(n, addr) \
LOAD_SR(n, addr); \
LOAD_SR(n+1, addr+1); \
LOAD_SR(n+2, addr+2); \
LOAD_SR(n+3, addr+3);
restore_regs:
lis r4, registers@h
ori r4, r4, registers@l
/* MMU is not up yet */
subis r4, r4, CONFIG_KERNEL_START@h
lwz r0, 0(r4)
lwz r1, 0x4(r4)
lwz r2, 0x8(r4)
lmw r11, 0xc(r4)
/*
* these are a bit tricky
*
* 0x18 - HID0
* 0x19 - HID1
* 0x1a - HID2
* 0x1b - MSR
* 0x1c - LR
* 0x1d - reserved by 0xf0 (BDI2000)
*/
LOAD_SPRN(RPA, 0x1e);
LOAD_SPRN(SDR1, 0x1f);
/* restore MMU regs */
LOAD_BAT(0, 0x20)
LOAD_BAT(1, 0x24)
LOAD_BAT(2, 0x28)
LOAD_BAT(3, 0x2c)
LOAD_BAT(4, 0x30)
LOAD_BAT(5, 0x34)
LOAD_BAT(6, 0x38)
LOAD_BAT(7, 0x3c)
LOAD_4SR(0, 0x40)
LOAD_4SR(4, 0x44)
LOAD_4SR(8, 0x48)
LOAD_4SR(12, 0x4c)
/* rest of regs */
LOAD_SPRN(SPRG0, 0x50);
LOAD_SPRN(SPRG1, 0x51);
LOAD_SPRN(SPRG2, 0x52);
LOAD_SPRN(SPRG3, 0x53);
LOAD_SPRN(SPRG4, 0x54);
LOAD_SPRN(SPRG5, 0x55);
LOAD_SPRN(SPRG6, 0x56);
LOAD_SPRN(SPRG7, 0x57);
LOAD_SPRN(IABR, 0x58);
LOAD_SPRN(DABR, 0x59);
LOAD_SPRN(TBWL, 0x5a); /* these two have separate R/W regs */
LOAD_SPRN(TBWU, 0x5b);
blr
/* cache flushing code. copied from arch/ppc/boot/util.S */
#define NUM_CACHE_LINES (128*8)
/*
* Flush data cache
* Do this by just reading lots of stuff into the cache.
*/
flush_data_cache:
lis r3,CONFIG_KERNEL_START@h
ori r3,r3,CONFIG_KERNEL_START@l
li r4,NUM_CACHE_LINES
mtctr r4
1:
lwz r4,0(r3)
addi r3,r3,L1_CACHE_BYTES /* Next line, please */
bdnz 1b
blr
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