2009-11-03 16:23:50 +07:00
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menuconfig OMAP2_DSS
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tristate "OMAP2/3 Display Subsystem support (EXPERIMENTAL)"
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depends on ARCH_OMAP2 || ARCH_OMAP3
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help
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OMAP2/3 Display Subsystem support.
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if OMAP2_DSS
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config OMAP2_VRAM_SIZE
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int "VRAM size (MB)"
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range 0 32
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default 0
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help
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The amount of SDRAM to reserve at boot time for video RAM use.
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This VRAM will be used by omapfb and other drivers that need
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large continuous RAM area for video use.
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You can also set this with "vram=<bytes>" kernel argument, or
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in the board file.
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config OMAP2_DSS_DEBUG_SUPPORT
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bool "Debug support"
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default y
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help
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This enables debug messages. You need to enable printing
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with 'debug' module parameter.
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2009-12-17 19:35:21 +07:00
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config OMAP2_DSS_COLLECT_IRQ_STATS
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bool "Collect DSS IRQ statistics"
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depends on OMAP2_DSS_DEBUG_SUPPORT
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default n
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help
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Collect DSS IRQ statistics, printable via debugfs
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2009-11-03 16:23:50 +07:00
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config OMAP2_DSS_RFBI
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bool "RFBI support"
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default n
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help
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MIPI DBI, or RFBI (Remote Framebuffer Interface), support.
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config OMAP2_DSS_VENC
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bool "VENC support"
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default y
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help
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OMAP Video Encoder support.
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config OMAP2_DSS_SDI
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bool "SDI support"
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depends on ARCH_OMAP3
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default n
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help
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SDI (Serial Display Interface) support.
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config OMAP2_DSS_DSI
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bool "DSI support"
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depends on ARCH_OMAP3
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default n
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help
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MIPI DSI support.
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config OMAP2_DSS_USE_DSI_PLL
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bool "Use DSI PLL for PCLK (EXPERIMENTAL)"
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default n
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depends on OMAP2_DSS_DSI
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help
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Use DSI PLL to generate pixel clock. Currently only for DPI output.
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DSI PLL can be used to generate higher and more precise pixel clocks.
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config OMAP2_DSS_FAKE_VSYNC
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bool "Fake VSYNC irq from manual update displays"
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default n
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help
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If this is selected, DSI will generate a fake DISPC VSYNC interrupt
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when DSI has sent a frame. This is only needed with DSI or RFBI
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displays using manual mode, and you want VSYNC to, for example,
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time animation.
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config OMAP2_DSS_MIN_FCK_PER_PCK
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int "Minimum FCK/PCK ratio (for scaling)"
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range 0 32
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default 0
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help
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This can be used to adjust the minimum FCK/PCK ratio.
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With this you can make sure that DISPC FCK is at least
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n x PCK. Video plane scaling requires higher FCK than
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normally.
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If this is set to 0, there's no extra constraint on the
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DISPC FCK. However, the FCK will at minimum be
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2xPCK (if active matrix) or 3xPCK (if passive matrix).
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Max FCK is 173MHz, so this doesn't work if your PCK
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is very high.
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endif
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