2008-07-18 11:55:51 +07:00
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/* thread_info.h: sparc64 low-level thread information
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*
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* Copyright (C) 2002 David S. Miller (davem@redhat.com)
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*/
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#ifndef _ASM_THREAD_INFO_H
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#define _ASM_THREAD_INFO_H
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#ifdef __KERNEL__
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#define NSWINS 7
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#define TI_FLAG_BYTE_FAULT_CODE 0
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#define TI_FLAG_FAULT_CODE_SHIFT 56
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#define TI_FLAG_BYTE_WSTATE 1
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#define TI_FLAG_WSTATE_SHIFT 48
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2012-09-26 12:21:14 +07:00
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#define TI_FLAG_BYTE_NOERROR 2
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#define TI_FLAG_BYTE_NOERROR_SHIFT 40
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#define TI_FLAG_BYTE_FPDEPTH 3
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#define TI_FLAG_FPDEPTH_SHIFT 32
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#define TI_FLAG_BYTE_CWP 4
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#define TI_FLAG_CWP_SHIFT 24
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2008-07-18 11:55:51 +07:00
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#define TI_FLAG_BYTE_WSAVED 5
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#define TI_FLAG_WSAVED_SHIFT 16
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#include <asm/page.h>
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#ifndef __ASSEMBLY__
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#include <asm/ptrace.h>
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#include <asm/types.h>
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struct task_struct;
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struct thread_info {
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/* D$ line 1 */
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struct task_struct *task;
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unsigned long flags;
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__u8 fpsaved[7];
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__u8 status;
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unsigned long ksp;
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/* D$ line 2 */
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unsigned long fault_address;
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struct pt_regs *kregs;
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int preempt_count; /* 0 => preemptable, <0 => BUG */
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__u8 new_child;
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2012-09-26 12:21:14 +07:00
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__u8 current_ds;
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2008-07-18 11:55:51 +07:00
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__u16 cpu;
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unsigned long *utraps;
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struct reg_window reg_window[NSWINS];
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unsigned long rwbuf_stkptrs[NSWINS];
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unsigned long gsr[7];
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unsigned long xfsr[7];
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struct pt_regs *kern_una_regs;
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unsigned int kern_una_insn;
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2014-10-19 10:12:33 +07:00
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unsigned long fpregs[(7 * 256) / sizeof(unsigned long)]
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__attribute__ ((aligned(64)));
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2008-07-18 11:55:51 +07:00
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};
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#endif /* !(__ASSEMBLY__) */
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/* offsets into the thread_info struct for assembly code access */
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#define TI_TASK 0x00000000
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#define TI_FLAGS 0x00000008
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#define TI_FAULT_CODE (TI_FLAGS + TI_FLAG_BYTE_FAULT_CODE)
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#define TI_WSTATE (TI_FLAGS + TI_FLAG_BYTE_WSTATE)
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#define TI_CWP (TI_FLAGS + TI_FLAG_BYTE_CWP)
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#define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH)
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#define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED)
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2012-09-26 12:21:14 +07:00
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#define TI_SYS_NOERROR (TI_FLAGS + TI_FLAG_BYTE_NOERROR)
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2008-07-18 11:55:51 +07:00
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#define TI_FPSAVED 0x00000010
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#define TI_KSP 0x00000018
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#define TI_FAULT_ADDR 0x00000020
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#define TI_KREGS 0x00000028
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2014-07-13 22:39:47 +07:00
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#define TI_PRE_COUNT 0x00000030
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#define TI_NEW_CHILD 0x00000034
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#define TI_CURRENT_DS 0x00000035
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#define TI_CPU 0x00000036
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#define TI_UTRAPS 0x00000038
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#define TI_REG_WINDOW 0x00000040
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#define TI_RWIN_SPTRS 0x000003c0
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#define TI_GSR 0x000003f8
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#define TI_XFSR 0x00000430
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#define TI_KUNA_REGS 0x00000468
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#define TI_KUNA_INSN 0x00000470
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2015-02-13 06:01:14 +07:00
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#define TI_FPREGS 0x00000480
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2008-07-18 11:55:51 +07:00
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/* We embed this in the uppermost byte of thread_info->flags */
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#define FAULT_CODE_WRITE 0x01 /* Write access, implies D-TLB */
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#define FAULT_CODE_DTLB 0x02 /* Miss happened in D-TLB */
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#define FAULT_CODE_ITLB 0x04 /* Miss happened in I-TLB */
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#define FAULT_CODE_WINFIXUP 0x08 /* Miss happened during spill/fill */
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#define FAULT_CODE_BLKCOMMIT 0x10 /* Use blk-commit ASI in copy_page */
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2014-09-16 20:26:47 +07:00
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#define FAULT_CODE_BAD_RA 0x20 /* Bad RA for sun4v */
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2008-07-18 11:55:51 +07:00
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#if PAGE_SHIFT == 13
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#define THREAD_SIZE (2*PAGE_SIZE)
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#define THREAD_SHIFT (PAGE_SHIFT + 1)
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#else /* PAGE_SHIFT == 13 */
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#define THREAD_SIZE PAGE_SIZE
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#define THREAD_SHIFT PAGE_SHIFT
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#endif /* PAGE_SHIFT == 13 */
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/*
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* macros/functions for gaining access to the thread information structure
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*/
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#ifndef __ASSEMBLY__
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#define INIT_THREAD_INFO(tsk) \
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{ \
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.task = &tsk, \
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2012-09-26 12:21:14 +07:00
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.current_ds = ASI_P, \
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2009-07-10 19:57:56 +07:00
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.preempt_count = INIT_PREEMPT_COUNT, \
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2008-07-18 11:55:51 +07:00
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}
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#define init_thread_info (init_thread_union.thread_info)
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#define init_stack (init_thread_union.stack)
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/* how to get the thread information struct from C */
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register struct thread_info *current_thread_info_reg asm("g6");
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#define current_thread_info() (current_thread_info_reg)
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/* thread information allocation */
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#if PAGE_SHIFT == 13
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2012-05-05 22:05:47 +07:00
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#define THREAD_SIZE_ORDER 1
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2008-07-18 11:55:51 +07:00
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#else /* PAGE_SHIFT == 13 */
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2012-05-05 22:05:47 +07:00
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#define THREAD_SIZE_ORDER 0
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2008-07-18 11:55:51 +07:00
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#endif /* PAGE_SHIFT == 13 */
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#define __thread_flag_byte_ptr(ti) \
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((unsigned char *)(&((ti)->flags)))
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#define __cur_thread_flag_byte_ptr __thread_flag_byte_ptr(current_thread_info())
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#define get_thread_fault_code() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE])
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#define set_thread_fault_code(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE] = (val))
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#define get_thread_wstate() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE])
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#define set_thread_wstate(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE] = (val))
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#define get_thread_cwp() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP])
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#define set_thread_cwp(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP] = (val))
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2012-09-26 12:21:14 +07:00
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#define get_thread_noerror() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_NOERROR])
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#define set_thread_noerror(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_NOERROR] = (val))
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2008-07-18 11:55:51 +07:00
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#define get_thread_fpdepth() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH])
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#define set_thread_fpdepth(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val))
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#define get_thread_wsaved() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED])
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#define set_thread_wsaved(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val))
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#endif /* !(__ASSEMBLY__) */
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/*
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* Thread information flags, only 16 bits are available as we encode
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* other values into the upper 6 bytes.
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*
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* On trap return we need to test several values:
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*
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2010-03-03 23:08:49 +07:00
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* user: need_resched, notify_resume, sigpending, wsaved
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2008-07-18 11:55:51 +07:00
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* kernel: fpdepth
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*
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* So to check for work in the kernel case we simply load the fpdepth
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* byte out of the flags and test it. For the user case we encode the
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* lower 3 bytes of flags as follows:
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* ----------------------------------------
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* | wsaved | flags byte 1 | flags byte 2 |
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* ----------------------------------------
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* This optimizes the user test into:
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* ldx [%g6 + TI_FLAGS], REG1
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* sethi %hi(_TIF_USER_WORK_MASK), REG2
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* or REG2, %lo(_TIF_USER_WORK_MASK), REG2
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* andcc REG1, REG2, %g0
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* be,pt no_work_to_do
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* nop
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*/
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#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
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2008-04-21 05:06:49 +07:00
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#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */
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2008-07-18 11:55:51 +07:00
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#define TIF_SIGPENDING 2 /* signal pending */
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#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
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2010-03-03 23:08:49 +07:00
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/* flag bit 4 is available */
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2008-07-18 11:55:51 +07:00
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#define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */
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/* flag bit 6 is available */
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#define TIF_32BIT 7 /* 32-bit binary */
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2013-09-14 19:02:11 +07:00
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#define TIF_NOHZ 8 /* in adaptive nohz mode */
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2008-07-18 11:55:51 +07:00
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#define TIF_SECCOMP 9 /* secure computing */
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#define TIF_SYSCALL_AUDIT 10 /* syscall auditing active */
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2009-12-11 15:44:47 +07:00
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#define TIF_SYSCALL_TRACEPOINT 11 /* syscall tracepoint instrumentation */
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2008-07-18 11:55:51 +07:00
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/* NOTE: Thread flags >= 12 should be ones we have no interest
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* in using in assembly, else we can't use the mask as
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* an immediate value in instructions such as andcc.
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*/
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2010-01-29 12:42:02 +07:00
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/* flag bit 12 is available */
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2010-05-14 16:13:27 +07:00
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#define TIF_MEMDIE 13 /* is terminating due to OOM killer */
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2008-07-18 11:55:51 +07:00
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#define TIF_POLLING_NRFLAG 14
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#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
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2008-04-21 05:06:49 +07:00
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#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
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2008-07-18 11:55:51 +07:00
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#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
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#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
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#define _TIF_UNALIGNED (1<<TIF_UNALIGNED)
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#define _TIF_32BIT (1<<TIF_32BIT)
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2013-09-14 19:02:11 +07:00
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#define _TIF_NOHZ (1<<TIF_NOHZ)
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2008-07-18 11:55:51 +07:00
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#define _TIF_SECCOMP (1<<TIF_SECCOMP)
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#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
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2009-12-11 15:44:47 +07:00
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#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
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2008-07-18 11:55:51 +07:00
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#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
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#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \
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2008-04-21 05:06:49 +07:00
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_TIF_DO_NOTIFY_RESUME_MASK | \
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2010-03-03 23:08:49 +07:00
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_TIF_NEED_RESCHED)
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2008-04-21 05:06:49 +07:00
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#define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING)
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2008-07-18 11:55:51 +07:00
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2014-04-22 23:39:51 +07:00
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#define is_32bit_task() (test_thread_flag(TIF_32BIT))
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2008-07-18 11:55:51 +07:00
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/*
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* Thread-synchronous status.
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*
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* This is different from the flags in that nobody else
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* ever touches our thread-synchronous status, so we don't
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* have to worry about atomic accesses.
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*
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* Note that there are only 8 bits available.
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*/
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#define TS_RESTORE_SIGMASK 0x0001 /* restore signal mask in do_signal() */
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#ifndef __ASSEMBLY__
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#define HAVE_SET_RESTORE_SIGMASK 1
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static inline void set_restore_sigmask(void)
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{
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struct thread_info *ti = current_thread_info();
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ti->status |= TS_RESTORE_SIGMASK;
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2012-04-28 00:42:45 +07:00
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WARN_ON(!test_bit(TIF_SIGPENDING, &ti->flags));
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2008-07-18 11:55:51 +07:00
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}
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2012-04-27 09:29:20 +07:00
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static inline void clear_restore_sigmask(void)
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{
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current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
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}
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static inline bool test_restore_sigmask(void)
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{
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return current_thread_info()->status & TS_RESTORE_SIGMASK;
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}
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static inline bool test_and_clear_restore_sigmask(void)
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{
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struct thread_info *ti = current_thread_info();
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if (!(ti->status & TS_RESTORE_SIGMASK))
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return false;
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ti->status &= ~TS_RESTORE_SIGMASK;
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return true;
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}
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2012-06-02 01:22:01 +07:00
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sparc64: Make montmul/montsqr/mpmul usable in 32-bit threads.
The Montgomery Multiply, Montgomery Square, and Multiple-Precision
Multiply instructions work by loading a combination of the floating
point and multiple register windows worth of integer registers
with the inputs.
These values are 64-bit. But for 32-bit userland processes we only
save the low 32-bits of each integer register during a register spill.
This is because the register window save area is in the user stack and
has a fixed layout.
Therefore, the only way to use these instruction in 32-bit mode is to
perform the following sequence:
1) Load the top-32bits of a choosen integer register with a sentinel,
say "-1". This will be in the outer-most register window.
The idea is that we're trying to see if the outer-most register
window gets spilled, and thus the 64-bit values were truncated.
2) Load all the inputs for the montmul/montsqr/mpmul instruction,
down to the inner-most register window.
3) Execute the opcode.
4) Traverse back up to the outer-most register window.
5) Check the sentinel, if it's still "-1" store the results.
Otherwise retry the entire sequence.
This retry is extremely troublesome. If you're just unlucky and an
interrupt or other trap happens, it'll push that outer-most window to
the stack and clear the sentinel when we restore it.
We could retry forever and never make forward progress if interrupts
arrive at a fast enough rate (consider perf events as one example).
So we have do limited retries and fallback to software which is
extremely non-deterministic.
Luckily it's very straightforward to provide a mechanism to let
32-bit applications use a 64-bit stack. Stacks in 64-bit mode are
biased by 2047 bytes, which means that the lowest bit is set in the
actual %sp register value.
So if we see bit zero set in a 32-bit application's stack we treat
it like a 64-bit stack.
Runtime detection of such a facility is tricky, and cumbersome at
best. For example, just trying to use a biased stack and seeing if it
works is hard to recover from (the signal handler will need to use an
alt stack, plus something along the lines of longjmp). Therefore, we
add a system call to report a bitmask of arch specific features like
this in a cheap and less hairy way.
With help from Andy Polyakov.
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-10-27 05:18:37 +07:00
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#define thread32_stack_is_64bit(__SP) (((__SP) & 0x1) != 0)
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#define test_thread_64bit_stack(__SP) \
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((test_thread_flag(TIF_32BIT) && !thread32_stack_is_64bit(__SP)) ? \
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false : true)
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2008-07-18 11:55:51 +07:00
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#endif /* !__ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_THREAD_INFO_H */
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