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linux_dsm_epyc7002/arch/arm/boot/dts/omap3.dtsi

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arm/dts: Add initial device tree support for OMAP3 SoC Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-16 22:32:01 +07:00
/*
* Device Tree Source for OMAP3 SoC
*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
ARM: dts: OMAP2+: Use existing constants for GPIOs Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 19:32:56 +07:00
#include <dt-bindings/gpio/gpio.h>
ARM: dts: OMAP3: Include IRQ header Some nodes in OMAP3 DTS now use edge or level sensitive interrupts. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-11 21:49:46 +07:00
#include <dt-bindings/interrupt-controller/irq.h>
ARM: dts: OMAP2+: Use pinctrl constants Using constants for pinctrl allows a better readability, and removes redundancy with comments. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 19:32:59 +07:00
#include <dt-bindings/pinctrl/omap.h>
ARM: dts: OMAP2+: Use existing constants for GPIOs Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 19:32:56 +07:00
ARM: dts: OMAP2+: Use #include for all device trees Replace /include/ by #include for OMAP2+ DT, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 19:32:55 +07:00
#include "skeleton.dtsi"
arm/dts: Add initial device tree support for OMAP3 SoC Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-16 22:32:01 +07:00
/ {
compatible = "ti,omap3430", "ti,omap3";
ARM: dts: OMAP: Move interrupt-parent to the root node to avoid duplication The interrupt-parent attribute does not have to be added in each node since the fmwk will check for the parent as well to get it. Create an interrupt-parent for OMAP2, OMAP3, AM33xx and remove the attributes from every nodes that were using it. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Sebastien Guiriec <s-guiriec@ti.com>
2012-10-24 15:47:52 +07:00
interrupt-parent = <&intc>;
arm/dts: Add initial device tree support for OMAP3 SoC Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-16 22:32:01 +07:00
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 18:55:46 +07:00
aliases {
ARM: dts: OMAP3+: Add i2c aliases Currently, on OMAP5, i2c1 and i2c5 defer probe due to pinctrl dependencies. This changes the i2c ID each bus is registered with in i2c-dev interface. As a result of this, many userspace tools break and there is no consistent manner to fix the same if the i2c dev interface have no consistent numbering. Since this could happen for other OMAP derivatives, provide i2c alias for all OMAP3+ SoCs to allow ordering the i2c devices correctly. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-17 03:21:03 +07:00
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 18:55:46 +07:00
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
};
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 16:49:08 +07:00
cpus {
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 00:35:59 +07:00
#address-cells = <1>;
#size-cells = <0>;
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 16:49:08 +07:00
cpu@0 {
compatible = "arm,cortex-a8";
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 00:35:59 +07:00
device_type = "cpu";
reg = <0x0>;
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 16:49:08 +07:00
};
};
ARM: dts: OMAP2+: Add PMU nodes Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices. Please note that the node for OMAP4460 has been placed in a separate header file for OMAP4460, because the node is not compatible with OMAP4430. The node for OMAP4430 is not included because PMU is not currently supported on OMAP4430 due to the absence of a cross-trigger interface driver. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-10-18 21:28:52 +07:00
pmu {
compatible = "arm,cortex-a8-pmu";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x54000000 0x800000>;
ARM: dts: OMAP2+: Add PMU nodes Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices. Please note that the node for OMAP4460 has been placed in a separate header file for OMAP4460, because the node is not compatible with OMAP4430. The node for OMAP4430 is not included because PMU is not currently supported on OMAP4430 due to the absence of a cross-trigger interface driver. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-10-18 21:28:52 +07:00
interrupts = <3>;
ti,hwmods = "debugss";
};
arm/dts: Add initial device tree support for OMAP3 SoC Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-16 22:32:01 +07:00
/*
ARM/dts: OMAP3: fix pinctrl-single configuration - Fix 'function-mask' referring to TRM (Omap 36xx) Section 13.4.4: "Pad Functional Multiplexing and Configuration". - Fix 'omap3_pmx_wkup' referring to TRM Table 13-6: "Wkup Control Module Pad Configuration Register Fields". Note that these fixes are not critical currently as we are not yet using the missing range of pinmux registers at this point. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-29 23:32:05 +07:00
* The soc node represents the soc top level view. It is used for IPs
arm/dts: Add initial device tree support for OMAP3 SoC Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-16 22:32:01 +07:00
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
compatible = "ti,omap-infra";
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 16:49:08 +07:00
mpu {
compatible = "ti,omap3-mpu";
ti,hwmods = "mpu";
};
iva {
compatible = "ti,iva2.2";
ti,hwmods = "iva";
dsp {
compatible = "ti,omap3-c64";
};
};
arm/dts: Add initial device tree support for OMAP3 SoC Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-16 22:32:01 +07:00
};
/*
* XXX: Use a flat representation of the OMAP3 interconnect.
* The real OMAP interconnect network is quite complex.
* Since that will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
*/
ocp {
compatible = "simple-bus";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x68000000 0x10000>;
interrupts = <9 10>;
arm/dts: Add initial device tree support for OMAP3 SoC Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-16 22:32:01 +07:00
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "l3_main";
ARM: OMAP2+: Fix more missing data for omap3.dtsi file After dropping the duplicate data in hwmod that now should come from the .dts files, I noticed few more entries missing. Let's add these as otherwise devices relying on these won't work. Looks like the side tone entries are bundled into the mcbsp1 to 3, so that may needs some special handling in the hwmod code as it's currently trying to look up mcbsp2_sidetone and mcbsp3_sidetone entries. Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-11-26 05:23:45 +07:00
aes: aes@480c5000 {
compatible = "ti,omap3-aes";
ti,hwmods = "aes";
reg = <0x480c5000 0x50>;
interrupts = <0>;
};
ARM: dts: OMAP: Add counter-32k nodes Adds the counter-32k timers nodes present in OMAP2/3/4 devices and device-tree binding documentation for OMAP counter-32k. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-26 02:24:14 +07:00
counter32k: counter@48320000 {
compatible = "ti,omap-counter32k";
reg = <0x48320000 0x20>;
ti,hwmods = "counter_32k";
};
arm/dts: OMAP3: Add interrupt-controller bindings for INTC Update the DTS with the proper information required by the INTC bindings. - Add the number of interrupt lines - Add the reg and the compatible entries. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2011-12-01 01:26:42 +07:00
intc: interrupt-controller@48200000 {
compatible = "ti,omap2-intc";
arm/dts: Add initial device tree support for OMAP3 SoC Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-16 22:32:01 +07:00
interrupt-controller;
#interrupt-cells = <1>;
arm/dts: OMAP3: Add interrupt-controller bindings for INTC Update the DTS with the proper information required by the INTC bindings. - Add the number of interrupt lines - Add the reg and the compatible entries. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2011-12-01 01:26:42 +07:00
ti,intc-size = <96>;
reg = <0x48200000 0x1000>;
arm/dts: Add initial device tree support for OMAP3 SoC Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-16 22:32:01 +07:00
};
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 18:55:46 +07:00
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 01:47:59 +07:00
sdma: dma-controller@48056000 {
compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
reg = <0x48056000 0x1000>;
interrupts = <12>,
<13>,
<14>,
<15>;
#dma-cells = <1>;
#dma-channels = <32>;
#dma-requests = <96>;
};
arm/dts: Add pinctrl driver entries for omap2/3/4 Add pinctrl driver entries for omap2+. These all use the generic pinctrl-single driver for the padconf registers. Cc: devicetree-discuss@lists.ozlabs.org Acked-by: Linus Walleij <linus.walleij@linaro.org> [tony@atomide.com: updated to drop omap2420.dtsi rename changes] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-11 00:34:51 +07:00
omap3_pmx_core: pinmux@48002030 {
compatible = "ti,omap3-padconf", "pinctrl-single";
reg = <0x48002030 0x05cc>;
#address-cells = <1>;
#size-cells = <0>;
ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap Now pinctrl-single-omap can handle the wake-up events for us now as long as the events are configured in the .dts files. Done in collaboration with Roger Quadros <rogerq@ti.com>. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Prakash Manjunathappa <prakash.pm@ti.com> Cc: Roger Quadros <rogerq@ti.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-11 05:45:13 +07:00
#interrupt-cells = <1>;
interrupt-controller;
arm/dts: Add pinctrl driver entries for omap2/3/4 Add pinctrl driver entries for omap2+. These all use the generic pinctrl-single driver for the padconf registers. Cc: devicetree-discuss@lists.ozlabs.org Acked-by: Linus Walleij <linus.walleij@linaro.org> [tony@atomide.com: updated to drop omap2420.dtsi rename changes] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-11 00:34:51 +07:00
pinctrl-single,register-width = <16>;
ARM: dts: Fix pinctrl mask for omap3 The wake-up interrupt bit is available on omap3/4/5 processors unlike what we claim. Without fixing it we cannot use it on omap3 and the system configured for wake-up events will just hang on wake-up. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Benoît Cousson <bcousson@baylibre.com> Cc: devicetree@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-08 00:22:01 +07:00
pinctrl-single,function-mask = <0xff1f>;
arm/dts: Add pinctrl driver entries for omap2/3/4 Add pinctrl driver entries for omap2+. These all use the generic pinctrl-single driver for the padconf registers. Cc: devicetree-discuss@lists.ozlabs.org Acked-by: Linus Walleij <linus.walleij@linaro.org> [tony@atomide.com: updated to drop omap2420.dtsi rename changes] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-11 00:34:51 +07:00
};
ARM: dts: Remove '0x's from OMAP3 DTS file Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-07-22 17:52:34 +07:00
omap3_pmx_wkup: pinmux@48002a00 {
arm/dts: Add pinctrl driver entries for omap2/3/4 Add pinctrl driver entries for omap2+. These all use the generic pinctrl-single driver for the padconf registers. Cc: devicetree-discuss@lists.ozlabs.org Acked-by: Linus Walleij <linus.walleij@linaro.org> [tony@atomide.com: updated to drop omap2420.dtsi rename changes] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-11 00:34:51 +07:00
compatible = "ti,omap3-padconf", "pinctrl-single";
ARM/dts: OMAP3: fix pinctrl-single configuration - Fix 'function-mask' referring to TRM (Omap 36xx) Section 13.4.4: "Pad Functional Multiplexing and Configuration". - Fix 'omap3_pmx_wkup' referring to TRM Table 13-6: "Wkup Control Module Pad Configuration Register Fields". Note that these fixes are not critical currently as we are not yet using the missing range of pinmux registers at this point. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-29 23:32:05 +07:00
reg = <0x48002a00 0x5c>;
arm/dts: Add pinctrl driver entries for omap2/3/4 Add pinctrl driver entries for omap2+. These all use the generic pinctrl-single driver for the padconf registers. Cc: devicetree-discuss@lists.ozlabs.org Acked-by: Linus Walleij <linus.walleij@linaro.org> [tony@atomide.com: updated to drop omap2420.dtsi rename changes] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-11 00:34:51 +07:00
#address-cells = <1>;
#size-cells = <0>;
ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap Now pinctrl-single-omap can handle the wake-up events for us now as long as the events are configured in the .dts files. Done in collaboration with Roger Quadros <rogerq@ti.com>. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Prakash Manjunathappa <prakash.pm@ti.com> Cc: Roger Quadros <rogerq@ti.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-11 05:45:13 +07:00
#interrupt-cells = <1>;
interrupt-controller;
arm/dts: Add pinctrl driver entries for omap2/3/4 Add pinctrl driver entries for omap2+. These all use the generic pinctrl-single driver for the padconf registers. Cc: devicetree-discuss@lists.ozlabs.org Acked-by: Linus Walleij <linus.walleij@linaro.org> [tony@atomide.com: updated to drop omap2420.dtsi rename changes] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-11 00:34:51 +07:00
pinctrl-single,register-width = <16>;
ARM: dts: Fix pinctrl mask for omap3 The wake-up interrupt bit is available on omap3/4/5 processors unlike what we claim. Without fixing it we cannot use it on omap3 and the system configured for wake-up events will just hang on wake-up. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Benoît Cousson <bcousson@baylibre.com> Cc: devicetree@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-08 00:22:01 +07:00
pinctrl-single,function-mask = <0xff1f>;
arm/dts: Add pinctrl driver entries for omap2/3/4 Add pinctrl driver entries for omap2+. These all use the generic pinctrl-single driver for the padconf registers. Cc: devicetree-discuss@lists.ozlabs.org Acked-by: Linus Walleij <linus.walleij@linaro.org> [tony@atomide.com: updated to drop omap2420.dtsi rename changes] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-11 00:34:51 +07:00
};
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
gpio1: gpio@48310000 {
compatible = "ti,omap3-gpio";
ARM: dts: OMAP3: Add reg and interrupt properties for gpio The OMAP3 gpio bindings are currently missing the reg and interrupt properties and so add these properties. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:02:31 +07:00
reg = <0x48310000 0x200>;
interrupts = <29>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
ti,hwmods = "gpio1";
ARM: dts: OMAP2+: Identify GPIO banks that are always powered Add the "ti,gpio-always-on" property to the appropriate GPIO banks to indicate which banks are always powered and will never lose logic state. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-05 03:16:16 +07:00
ti,gpio-always-on;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 04:44:39 +07:00
#interrupt-cells = <2>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
};
gpio2: gpio@49050000 {
compatible = "ti,omap3-gpio";
ARM: dts: OMAP3: Add reg and interrupt properties for gpio The OMAP3 gpio bindings are currently missing the reg and interrupt properties and so add these properties. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:02:31 +07:00
reg = <0x49050000 0x200>;
interrupts = <30>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 04:44:39 +07:00
#interrupt-cells = <2>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
};
gpio3: gpio@49052000 {
compatible = "ti,omap3-gpio";
ARM: dts: OMAP3: Add reg and interrupt properties for gpio The OMAP3 gpio bindings are currently missing the reg and interrupt properties and so add these properties. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:02:31 +07:00
reg = <0x49052000 0x200>;
interrupts = <31>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 04:44:39 +07:00
#interrupt-cells = <2>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
};
gpio4: gpio@49054000 {
compatible = "ti,omap3-gpio";
ARM: dts: OMAP3: Add reg and interrupt properties for gpio The OMAP3 gpio bindings are currently missing the reg and interrupt properties and so add these properties. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:02:31 +07:00
reg = <0x49054000 0x200>;
interrupts = <32>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 04:44:39 +07:00
#interrupt-cells = <2>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
};
gpio5: gpio@49056000 {
compatible = "ti,omap3-gpio";
ARM: dts: OMAP3: Add reg and interrupt properties for gpio The OMAP3 gpio bindings are currently missing the reg and interrupt properties and so add these properties. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:02:31 +07:00
reg = <0x49056000 0x200>;
interrupts = <33>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
ti,hwmods = "gpio5";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 04:44:39 +07:00
#interrupt-cells = <2>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
};
gpio6: gpio@49058000 {
compatible = "ti,omap3-gpio";
ARM: dts: OMAP3: Add reg and interrupt properties for gpio The OMAP3 gpio bindings are currently missing the reg and interrupt properties and so add these properties. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 05:02:31 +07:00
reg = <0x49058000 0x200>;
interrupts = <34>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
ti,hwmods = "gpio6";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-08 04:44:39 +07:00
#interrupt-cells = <2>;
arm/dts: OMAP3: Add gpio nodes Add the 6 GPIOs controller nodes present in OMAP3. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca>
2011-08-16 16:51:54 +07:00
};
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes Follow the DTS convention and thus name the nodes <name>@<address> without any '0x' prefix in the physical address. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-16 17:55:27 +07:00
uart1: serial@4806a000 {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 18:55:46 +07:00
compatible = "ti,omap3-uart";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x4806a000 0x2000>;
interrupts = <72>;
dmas = <&sdma 49 &sdma 50>;
dma-names = "tx", "rx";
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 18:55:46 +07:00
ti,hwmods = "uart1";
clock-frequency = <48000000>;
};
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes Follow the DTS convention and thus name the nodes <name>@<address> without any '0x' prefix in the physical address. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-16 17:55:27 +07:00
uart2: serial@4806c000 {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 18:55:46 +07:00
compatible = "ti,omap3-uart";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x4806c000 0x400>;
interrupts = <73>;
dmas = <&sdma 51 &sdma 52>;
dma-names = "tx", "rx";
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 18:55:46 +07:00
ti,hwmods = "uart2";
clock-frequency = <48000000>;
};
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes Follow the DTS convention and thus name the nodes <name>@<address> without any '0x' prefix in the physical address. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-16 17:55:27 +07:00
uart3: serial@49020000 {
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 18:55:46 +07:00
compatible = "ti,omap3-uart";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x49020000 0x400>;
interrupts = <74>;
dmas = <&sdma 53 &sdma 54>;
dma-names = "tx", "rx";
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 18:55:46 +07:00
ti,hwmods = "uart3";
clock-frequency = <48000000>;
};
arm/dts: OMAP3: Add i2c controller nodes Add i2c controllers nodes into the main ocp bus. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2011-08-30 21:50:24 +07:00
i2c1: i2c@48070000 {
compatible = "ti,omap3-i2c";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x48070000 0x80>;
interrupts = <56>;
dmas = <&sdma 27 &sdma 28>;
dma-names = "tx", "rx";
arm/dts: OMAP3: Add i2c controller nodes Add i2c controllers nodes into the main ocp bus. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2011-08-30 21:50:24 +07:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c1";
};
i2c2: i2c@48072000 {
compatible = "ti,omap3-i2c";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x48072000 0x80>;
interrupts = <57>;
dmas = <&sdma 29 &sdma 30>;
dma-names = "tx", "rx";
arm/dts: OMAP3: Add i2c controller nodes Add i2c controllers nodes into the main ocp bus. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2011-08-30 21:50:24 +07:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c2";
};
i2c3: i2c@48060000 {
compatible = "ti,omap3-i2c";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x48060000 0x80>;
interrupts = <61>;
dmas = <&sdma 25 &sdma 26>;
dma-names = "tx", "rx";
arm/dts: OMAP3: Add i2c controller nodes Add i2c controllers nodes into the main ocp bus. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2011-08-30 21:50:24 +07:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c3";
};
arm/dts: OMAP3: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP3 device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 20:15:58 +07:00
ARM: OMAP2+: Fix more missing data for omap3.dtsi file After dropping the duplicate data in hwmod that now should come from the .dts files, I noticed few more entries missing. Let's add these as otherwise devices relying on these won't work. Looks like the side tone entries are bundled into the mcbsp1 to 3, so that may needs some special handling in the hwmod code as it's currently trying to look up mcbsp2_sidetone and mcbsp3_sidetone entries. Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-11-26 05:23:45 +07:00
mailbox: mailbox@48094000 {
compatible = "ti,omap3-mailbox";
ti,hwmods = "mailbox";
reg = <0x48094000 0x200>;
interrupts = <26>;
};
arm/dts: OMAP3: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP3 device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 20:15:58 +07:00
mcspi1: spi@48098000 {
compatible = "ti,omap2-mcspi";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x48098000 0x100>;
interrupts = <65>;
arm/dts: OMAP3: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP3 device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 20:15:58 +07:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi1";
ti,spi-num-cs = <4>;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 01:47:59 +07:00
dmas = <&sdma 35>,
<&sdma 36>,
<&sdma 37>,
<&sdma 38>,
<&sdma 39>,
<&sdma 40>,
<&sdma 41>,
<&sdma 42>;
dma-names = "tx0", "rx0", "tx1", "rx1",
"tx2", "rx2", "tx3", "rx3";
arm/dts: OMAP3: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP3 device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 20:15:58 +07:00
};
mcspi2: spi@4809a000 {
compatible = "ti,omap2-mcspi";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x4809a000 0x100>;
interrupts = <66>;
arm/dts: OMAP3: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP3 device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 20:15:58 +07:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi2";
ti,spi-num-cs = <2>;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 01:47:59 +07:00
dmas = <&sdma 43>,
<&sdma 44>,
<&sdma 45>,
<&sdma 46>;
dma-names = "tx0", "rx0", "tx1", "rx1";
arm/dts: OMAP3: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP3 device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 20:15:58 +07:00
};
mcspi3: spi@480b8000 {
compatible = "ti,omap2-mcspi";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x480b8000 0x100>;
interrupts = <91>;
arm/dts: OMAP3: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP3 device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 20:15:58 +07:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi3";
ti,spi-num-cs = <2>;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 01:47:59 +07:00
dmas = <&sdma 15>,
<&sdma 16>,
<&sdma 23>,
<&sdma 24>;
dma-names = "tx0", "rx0", "tx1", "rx1";
arm/dts: OMAP3: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP3 device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 20:15:58 +07:00
};
mcspi4: spi@480ba000 {
compatible = "ti,omap2-mcspi";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x480ba000 0x100>;
interrupts = <48>;
arm/dts: OMAP3: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP3 device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 20:15:58 +07:00
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi4";
ti,spi-num-cs = <1>;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 01:47:59 +07:00
dmas = <&sdma 70>, <&sdma 71>;
dma-names = "tx0", "rx0";
arm/dts: OMAP3: Add SPI controller nodes Add the 4 McSPI controller nodes present in an OMAP3 device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com>
2012-01-20 20:15:58 +07:00
};
arm/dts: OMAP3: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP3. Currenly limited to only omap3-beagle board. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-22 19:12:27 +07:00
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
hdqw1w: 1w@480b2000 {
compatible = "ti,omap3-1w";
reg = <0x480b2000 0x1000>;
interrupts = <58>;
ti,hwmods = "hdq1w";
};
arm/dts: OMAP3: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP3. Currenly limited to only omap3-beagle board. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-22 19:12:27 +07:00
mmc1: mmc@4809c000 {
compatible = "ti,omap3-hsmmc";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x4809c000 0x200>;
interrupts = <83>;
arm/dts: OMAP3: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP3. Currenly limited to only omap3-beagle board. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-22 19:12:27 +07:00
ti,hwmods = "mmc1";
ti,dual-volt;
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 01:47:59 +07:00
dmas = <&sdma 61>, <&sdma 62>;
dma-names = "tx", "rx";
arm/dts: OMAP3: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP3. Currenly limited to only omap3-beagle board. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-22 19:12:27 +07:00
};
mmc2: mmc@480b4000 {
compatible = "ti,omap3-hsmmc";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x480b4000 0x200>;
interrupts = <86>;
arm/dts: OMAP3: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP3. Currenly limited to only omap3-beagle board. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-22 19:12:27 +07:00
ti,hwmods = "mmc2";
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 01:47:59 +07:00
dmas = <&sdma 47>, <&sdma 48>;
dma-names = "tx", "rx";
arm/dts: OMAP3: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP3. Currenly limited to only omap3-beagle board. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-22 19:12:27 +07:00
};
mmc3: mmc@480ad000 {
compatible = "ti,omap3-hsmmc";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x480ad000 0x200>;
interrupts = <94>;
arm/dts: OMAP3: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP3. Currenly limited to only omap3-beagle board. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-22 19:12:27 +07:00
ti,hwmods = "mmc3";
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-04-27 01:47:59 +07:00
dmas = <&sdma 77>, <&sdma 78>;
dma-names = "tx", "rx";
arm/dts: OMAP3: Add mmc controller nodes and board data Add OMAP mmc related device tree data for OMAP3. Currenly limited to only omap3-beagle board. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-02-22 19:12:27 +07:00
};
arm/dts: add wdt node for omap3 and omap4 Add wdt node to support dt. Signed-off-by: Xiao Jiang <jgq516@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-01 11:44:14 +07:00
ARM: OMAP2+: Fix more missing data for omap3.dtsi file After dropping the duplicate data in hwmod that now should come from the .dts files, I noticed few more entries missing. Let's add these as otherwise devices relying on these won't work. Looks like the side tone entries are bundled into the mcbsp1 to 3, so that may needs some special handling in the hwmod code as it's currently trying to look up mcbsp2_sidetone and mcbsp3_sidetone entries. Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-11-26 05:23:45 +07:00
mmu_isp: mmu@480bd400 {
compatible = "ti,omap3-mmu-isp";
ti,hwmods = "mmu_isp";
reg = <0x480bd400 0x80>;
interrupts = <8>;
};
arm/dts: add wdt node for omap3 and omap4 Add wdt node to support dt. Signed-off-by: Xiao Jiang <jgq516@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-01 11:44:14 +07:00
wdt2: wdt@48314000 {
compatible = "ti,omap3-wdt";
ARM: dts: Add missing reg, interrupt and dma entries for omap3 Looks like omap3 is still relying on hwmod data for some basic device tree information. Let's add the information to omap3.dtsi so we can remove the related hwmod data once omap3 is DT only. Acked-by: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-18 05:15:22 +07:00
reg = <0x48314000 0x80>;
arm/dts: add wdt node for omap3 and omap4 Add wdt node to support dt. Signed-off-by: Xiao Jiang <jgq516@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-01 11:44:14 +07:00
ti,hwmods = "wd_timer2";
};
ARM: dts: omap3: Add McBSP entries Create the needed sections to be able to probe McBSP ports via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 18:21:22 +07:00
mcbsp1: mcbsp@48074000 {
compatible = "ti,omap3-mcbsp";
reg = <0x48074000 0xff>;
reg-names = "mpu";
interrupts = <16>, /* OCP compliant interrupt */
<59>, /* TX interrupt */
<60>; /* RX interrupt */
interrupt-names = "common", "tx", "rx";
ti,buffer-size = <128>;
ti,hwmods = "mcbsp1";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 14:50:21 +07:00
dmas = <&sdma 31>,
<&sdma 32>;
dma-names = "tx", "rx";
ARM: dts: omap3: Add McBSP entries Create the needed sections to be able to probe McBSP ports via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 18:21:22 +07:00
};
mcbsp2: mcbsp@49022000 {
compatible = "ti,omap3-mcbsp";
reg = <0x49022000 0xff>,
<0x49028000 0xff>;
reg-names = "mpu", "sidetone";
interrupts = <17>, /* OCP compliant interrupt */
<62>, /* TX interrupt */
<63>, /* RX interrupt */
<4>; /* Sidetone */
interrupt-names = "common", "tx", "rx", "sidetone";
ti,buffer-size = <1280>;
ARM/dts: omap3: Fix mcbsp2/3 hwmods to be able to probe the drivers for audio Fixes the following errors: [ 2.318084] omap-mcbsp 49022000.mcbsp: invalid rx DMA channel [ 2.324432] omap-mcbsp 49024000.mcbsp: invalid rx DMA channel Which is because we failed to link the sidetone hwmod for McBSP2/3. The missing sidetone hwmod link will prevent omap_device_alloc() to append the DMA resources since we - accidentally - end up having the same number of resources provided from DT (IO/IRQ) as we have in hwmod for the McBSP ports without the ST resources. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-18 16:25:07 +07:00
ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 14:50:21 +07:00
dmas = <&sdma 33>,
<&sdma 34>;
dma-names = "tx", "rx";
ARM: dts: omap3: Add McBSP entries Create the needed sections to be able to probe McBSP ports via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 18:21:22 +07:00
};
mcbsp3: mcbsp@49024000 {
compatible = "ti,omap3-mcbsp";
reg = <0x49024000 0xff>,
<0x4902a000 0xff>;
reg-names = "mpu", "sidetone";
interrupts = <22>, /* OCP compliant interrupt */
<89>, /* TX interrupt */
<90>, /* RX interrupt */
<5>; /* Sidetone */
interrupt-names = "common", "tx", "rx", "sidetone";
ti,buffer-size = <128>;
ARM/dts: omap3: Fix mcbsp2/3 hwmods to be able to probe the drivers for audio Fixes the following errors: [ 2.318084] omap-mcbsp 49022000.mcbsp: invalid rx DMA channel [ 2.324432] omap-mcbsp 49024000.mcbsp: invalid rx DMA channel Which is because we failed to link the sidetone hwmod for McBSP2/3. The missing sidetone hwmod link will prevent omap_device_alloc() to append the DMA resources since we - accidentally - end up having the same number of resources provided from DT (IO/IRQ) as we have in hwmod for the McBSP ports without the ST resources. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-18 16:25:07 +07:00
ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 14:50:21 +07:00
dmas = <&sdma 17>,
<&sdma 18>;
dma-names = "tx", "rx";
ARM: dts: omap3: Add McBSP entries Create the needed sections to be able to probe McBSP ports via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 18:21:22 +07:00
};
mcbsp4: mcbsp@49026000 {
compatible = "ti,omap3-mcbsp";
reg = <0x49026000 0xff>;
reg-names = "mpu";
interrupts = <23>, /* OCP compliant interrupt */
<54>, /* TX interrupt */
<55>; /* RX interrupt */
interrupt-names = "common", "tx", "rx";
ti,buffer-size = <128>;
ti,hwmods = "mcbsp4";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 14:50:21 +07:00
dmas = <&sdma 19>,
<&sdma 20>;
dma-names = "tx", "rx";
ARM: dts: omap3: Add McBSP entries Create the needed sections to be able to probe McBSP ports via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 18:21:22 +07:00
};
mcbsp5: mcbsp@48096000 {
compatible = "ti,omap3-mcbsp";
reg = <0x48096000 0xff>;
reg-names = "mpu";
interrupts = <27>, /* OCP compliant interrupt */
<81>, /* TX interrupt */
<82>; /* RX interrupt */
interrupt-names = "common", "tx", "rx";
ti,buffer-size = <128>;
ti,hwmods = "mcbsp5";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 14:50:21 +07:00
dmas = <&sdma 21>,
<&sdma 22>;
dma-names = "tx", "rx";
ARM: dts: omap3: Add McBSP entries Create the needed sections to be able to probe McBSP ports via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 18:21:22 +07:00
};
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
ARM: OMAP2+: Fix more missing data for omap3.dtsi file After dropping the duplicate data in hwmod that now should come from the .dts files, I noticed few more entries missing. Let's add these as otherwise devices relying on these won't work. Looks like the side tone entries are bundled into the mcbsp1 to 3, so that may needs some special handling in the hwmod code as it's currently trying to look up mcbsp2_sidetone and mcbsp3_sidetone entries. Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-11-26 05:23:45 +07:00
sham: sham@480c3000 {
compatible = "ti,omap3-sham";
ti,hwmods = "sham";
reg = <0x480c3000 0x64>;
interrupts = <49>;
};
smartreflex_core: smartreflex@480cb000 {
compatible = "ti,omap3-smartreflex-core";
ti,hwmods = "smartreflex_core";
reg = <0x480cb000 0x400>;
interrupts = <19>;
};
smartreflex_mpu_iva: smartreflex@480c9000 {
compatible = "ti,omap3-smartreflex-iva";
ti,hwmods = "smartreflex_mpu_iva";
reg = <0x480c9000 0x400>;
interrupts = <18>;
};
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
timer1: timer@48318000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x48318000 0x400>;
interrupts = <37>;
ti,hwmods = "timer1";
ti,timer-alwon;
};
timer2: timer@49032000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x49032000 0x400>;
interrupts = <38>;
ti,hwmods = "timer2";
};
timer3: timer@49034000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x49034000 0x400>;
interrupts = <39>;
ti,hwmods = "timer3";
};
timer4: timer@49036000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x49036000 0x400>;
interrupts = <40>;
ti,hwmods = "timer4";
};
timer5: timer@49038000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x49038000 0x400>;
interrupts = <41>;
ti,hwmods = "timer5";
ti,timer-dsp;
};
timer6: timer@4903a000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x4903a000 0x400>;
interrupts = <42>;
ti,hwmods = "timer6";
ti,timer-dsp;
};
timer7: timer@4903c000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x4903c000 0x400>;
interrupts = <43>;
ti,hwmods = "timer7";
ti,timer-dsp;
};
timer8: timer@4903e000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x4903e000 0x400>;
interrupts = <44>;
ti,hwmods = "timer8";
ti,timer-pwm;
ti,timer-dsp;
};
timer9: timer@49040000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x49040000 0x400>;
interrupts = <45>;
ti,hwmods = "timer9";
ti,timer-pwm;
};
timer10: timer@48086000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x48086000 0x400>;
interrupts = <46>;
ti,hwmods = "timer10";
ti,timer-pwm;
};
timer11: timer@48088000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x48088000 0x400>;
interrupts = <47>;
ti,hwmods = "timer11";
ti,timer-pwm;
};
timer12: timer@48304000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 00:38:18 +07:00
compatible = "ti,omap3430-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 21:59:00 +07:00
reg = <0x48304000 0x400>;
interrupts = <95>;
ti,hwmods = "timer12";
ti,timer-alwon;
ti,timer-secure;
};
ARM: dts: OMAP3: Add HS USB Host IP nodes Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-03-20 22:44:59 +07:00
usbhstll: usbhstll@48062000 {
compatible = "ti,usbhs-tll";
reg = <0x48062000 0x1000>;
interrupts = <78>;
ti,hwmods = "usb_tll_hs";
};
usbhshost: usbhshost@48064000 {
compatible = "ti,usbhs-host";
reg = <0x48064000 0x400>;
ti,hwmods = "usb_host_hs";
#address-cells = <1>;
#size-cells = <1>;
ranges;
usbhsohci: ohci@48064400 {
compatible = "ti,ohci-omap3", "usb-ohci";
reg = <0x48064400 0x400>;
interrupt-parent = <&intc>;
interrupts = <76>;
};
usbhsehci: ehci@48064800 {
compatible = "ti,ehci-omap", "usb-ehci";
reg = <0x48064800 0x400>;
interrupt-parent = <&intc>;
interrupts = <77>;
};
};
ARM: dts: OMAP3: Add GPMC controller Add device-tree support for the GPMC controller on the OMAP3. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-01-29 00:54:07 +07:00
gpmc: gpmc@6e000000 {
compatible = "ti,omap3430-gpmc";
ti,hwmods = "gpmc";
ARM: dts: OMAP3: reduce GPMC mapped registers address space Currently the OMAP General-Purpose Memory Controller (GPMC) device node maps 16 MB of address space for its hardware registers. This is because the OMAP Technical Reference Manual says that the GPMC module register address space size is 16 MB. But in practice the maximum address offset used by a GPMC register is 0x02d0. So, there is no need to map such a big address space for GPMC regs. This change was suggested by Jon Hunter [1]. [1]: https://patchwork.kernel.org/patch/2057111/ Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-02-27 08:30:51 +07:00
reg = <0x6e000000 0x02d0>;
ARM: dts: OMAP3: Add GPMC controller Add device-tree support for the GPMC controller on the OMAP3. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-01-29 00:54:07 +07:00
interrupts = <20>;
gpmc,num-cs = <8>;
gpmc,num-waitpins = <4>;
#address-cells = <2>;
#size-cells = <1>;
};
ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards Add usb otg data node in omap4/omap3 device tree file. Also update the node with board specific setting in omapx-<board>.dts file. The dt data specifies among others the interface type (ULPI or UTMI), mode which is mostly OTG, power that specifies the amount of power this can supply when in host mode. The information about usb otg node is available @ Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-07 20:35:16 +07:00
usb_otg_hs: usb_otg_hs@480ab000 {
compatible = "ti,omap3-musb";
reg = <0x480ab000 0x1000>;
ARM: dts: Fix musb interrupt for device tree booting Commit ad871c10 (ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards) added support for MUSB on omap3 for device tree, but added the interrupts the wrong way probably as they were copied from the omap4.dtsi file. On omap3 we have TI specific interrupt controller, not GIC. Fix this by specifying the interrupt following the TI INTC binding. Without this fix MUSB won't work as it is trying to use irq0 instead of irq92. Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-15 10:28:15 +07:00
interrupts = <92>, <93>;
ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards Add usb otg data node in omap4/omap3 device tree file. Also update the node with board specific setting in omapx-<board>.dts file. The dt data specifies among others the interface type (ULPI or UTMI), mode which is mostly OTG, power that specifies the amount of power this can supply when in host mode. The information about usb otg node is available @ Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-07 20:35:16 +07:00
interrupt-names = "mc", "dma";
ti,hwmods = "usb_otg_hs";
multipoint = <1>;
num-eps = <16>;
ram-bits = <12>;
};
arm/dts: Add initial device tree support for OMAP3 SoC Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-16 22:32:01 +07:00
};
};
Reference in New Issue Copy Permalink