2011-10-12 18:53:05 +07:00
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/dts-v1/;
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/include/ "tegra20.dtsi"
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/ {
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model = "NVIDIA Tegra2 Ventana evaluation board";
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compatible = "nvidia,ventana", "nvidia,tegra20";
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memory {
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reg = < 0x00000000 0x40000000 >;
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};
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2011-11-22 04:44:09 +07:00
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i2c@7000c000 {
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clock-frequency = <400000>;
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};
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i2c@7000c400 {
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clock-frequency = <400000>;
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};
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i2c@7000c500 {
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clock-frequency = <400000>;
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};
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i2c@7000d000 {
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clock-frequency = <400000>;
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};
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2011-11-22 04:44:10 +07:00
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serial@70006000 {
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status = "disable";
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};
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serial@70006040 {
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status = "disable";
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};
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serial@70006200 {
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status = "disable";
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};
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2011-10-12 18:53:05 +07:00
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serial@70006300 {
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clock-frequency = < 216000000 >;
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};
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2011-11-22 04:44:10 +07:00
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serial@70006400 {
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status = "disable";
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};
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2011-11-22 04:44:11 +07:00
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sdhci@c8000000 {
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status = "disable";
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};
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sdhci@c8000200 {
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status = "disable";
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};
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2011-10-12 18:53:05 +07:00
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sdhci@c8000400 {
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cd-gpios = <&gpio 69 0>; /* gpio PI5 */
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wp-gpios = <&gpio 57 0>; /* gpio PH1 */
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2011-10-19 13:53:57 +07:00
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power-gpios = <&gpio 70 0>; /* gpio PI6 */
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2011-10-12 18:53:05 +07:00
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};
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sdhci@c8000600 {
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support-8bit;
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};
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};
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