2017-01-06 19:52:48 +07:00
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menu "DesignWare PCI Core Support"
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config PCIE_DW
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bool
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2017-02-15 20:18:18 +07:00
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config PCIE_DW_HOST
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bool
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2017-02-15 20:18:19 +07:00
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on PCI_MSI_IRQ_DOMAIN
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2017-02-15 20:18:18 +07:00
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select PCIE_DW
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2017-01-06 19:52:48 +07:00
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2017-03-27 16:45:05 +07:00
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config PCIE_DW_EP
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bool
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depends on PCI_ENDPOINT
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select PCIE_DW
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2017-01-06 19:52:48 +07:00
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config PCI_DRA7XX
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bool "TI DRA7xx PCIe controller"
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2017-05-15 19:26:17 +07:00
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depends on SOC_DRA7XX || COMPILE_TEST
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2017-03-27 16:45:08 +07:00
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depends on (PCI && PCI_MSI_IRQ_DOMAIN) || PCI_ENDPOINT
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2017-01-06 19:52:48 +07:00
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depends on OF && HAS_IOMEM && TI_PIPE3
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2017-03-27 16:45:08 +07:00
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help
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Enables support for the PCIe controller in the DRA7xx SoC. There
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are two instances of PCIe controller in DRA7xx. This controller can
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work either as EP or RC. In order to enable host-specific features
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PCI_DRA7XX_HOST must be selected and in order to enable device-
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specific features PCI_DRA7XX_EP must be selected. This uses
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2017-09-02 04:35:50 +07:00
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the DesignWare core.
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2017-03-27 16:45:08 +07:00
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if PCI_DRA7XX
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config PCI_DRA7XX_HOST
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bool "PCI DRA7xx Host Mode"
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on PCI_MSI_IRQ_DOMAIN
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2017-02-15 20:18:18 +07:00
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select PCIE_DW_HOST
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2017-03-27 16:45:08 +07:00
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default y
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2017-01-06 19:52:48 +07:00
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help
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2017-03-27 16:45:08 +07:00
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Enables support for the PCIe controller in the DRA7xx SoC to work in
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host mode.
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config PCI_DRA7XX_EP
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bool "PCI DRA7xx Endpoint Mode"
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depends on PCI_ENDPOINT
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select PCIE_DW_EP
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help
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Enables support for the PCIe controller in the DRA7xx SoC to work in
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endpoint mode.
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endif
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2017-01-06 19:52:48 +07:00
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config PCIE_DW_PLAT
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bool "Platform bus based DesignWare PCIe Controller"
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2017-02-15 20:18:19 +07:00
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on PCI_MSI_IRQ_DOMAIN
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2017-02-15 20:18:18 +07:00
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select PCIE_DW_HOST
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2017-01-06 19:52:48 +07:00
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---help---
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This selects the DesignWare PCIe controller support. Select this if
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you have a PCIe controller on Platform bus.
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If you have a controller with this interface, say Y or M here.
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If unsure, say N.
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config PCI_EXYNOS
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bool "Samsung Exynos PCIe controller"
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2017-02-15 20:18:19 +07:00
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on SOC_EXYNOS5440
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depends on PCI_MSI_IRQ_DOMAIN
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select PCIEPORTBUS
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2017-02-15 20:18:18 +07:00
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select PCIE_DW_HOST
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2017-01-06 19:52:48 +07:00
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config PCI_IMX6
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bool "Freescale i.MX6 PCIe controller"
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2017-02-15 20:18:19 +07:00
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on SOC_IMX6Q
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depends on PCI_MSI_IRQ_DOMAIN
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select PCIEPORTBUS
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2017-02-15 20:18:18 +07:00
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select PCIE_DW_HOST
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2017-01-06 19:52:48 +07:00
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config PCIE_SPEAR13XX
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bool "STMicroelectronics SPEAr PCIe controller"
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2017-02-15 20:18:19 +07:00
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on ARCH_SPEAR13XX
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depends on PCI_MSI_IRQ_DOMAIN
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select PCIEPORTBUS
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2017-02-15 20:18:18 +07:00
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select PCIE_DW_HOST
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2017-01-06 19:52:48 +07:00
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help
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Say Y here if you want PCIe support on SPEAr13XX SoCs.
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config PCI_KEYSTONE
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bool "TI Keystone PCIe controller"
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2017-02-15 20:18:19 +07:00
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on ARCH_KEYSTONE
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depends on PCI_MSI_IRQ_DOMAIN
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select PCIEPORTBUS
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2017-02-15 20:18:18 +07:00
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select PCIE_DW_HOST
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2017-01-06 19:52:48 +07:00
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help
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Say Y here if you want to enable PCI controller support on Keystone
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2017-09-02 04:35:50 +07:00
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SoCs. The PCI controller on Keystone is based on DesignWare hardware
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and therefore the driver re-uses the DesignWare core functions to
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2017-01-06 19:52:48 +07:00
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implement the driver.
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config PCI_LAYERSCAPE
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bool "Freescale Layerscape PCIe controller"
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2017-02-15 20:18:19 +07:00
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on OF && (ARM || ARCH_LAYERSCAPE)
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depends on PCI_MSI_IRQ_DOMAIN
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select MFD_SYSCON
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2017-02-15 20:18:18 +07:00
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select PCIE_DW_HOST
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2017-01-06 19:52:48 +07:00
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help
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Say Y here if you want PCIe controller support on Layerscape SoCs.
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config PCI_HISI
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depends on OF && ARM64
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bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
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2017-02-15 20:18:19 +07:00
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on PCI_MSI_IRQ_DOMAIN
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select PCIEPORTBUS
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2017-02-15 20:18:18 +07:00
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select PCIE_DW_HOST
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2017-04-04 04:17:11 +07:00
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select PCI_HOST_COMMON
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2017-01-06 19:52:48 +07:00
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help
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Say Y here if you want PCIe controller support on HiSilicon
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Hip05 and Hip06 SoCs
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config PCIE_QCOM
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bool "Qualcomm PCIe controller"
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2017-02-15 20:18:19 +07:00
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on ARCH_QCOM && OF
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depends on PCI_MSI_IRQ_DOMAIN
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select PCIEPORTBUS
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2017-02-15 20:18:18 +07:00
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select PCIE_DW_HOST
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2017-01-06 19:52:48 +07:00
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help
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Say Y here to enable PCIe controller support on Qualcomm SoCs. The
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2017-09-02 04:35:50 +07:00
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PCIe controller uses the DesignWare core plus Qualcomm-specific
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2017-01-06 19:52:48 +07:00
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hardware wrappers.
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config PCIE_ARMADA_8K
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bool "Marvell Armada-8K PCIe controller"
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2017-02-15 20:18:19 +07:00
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on ARCH_MVEBU
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depends on PCI_MSI_IRQ_DOMAIN
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select PCIEPORTBUS
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2017-02-15 20:18:18 +07:00
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select PCIE_DW_HOST
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2017-01-06 19:52:48 +07:00
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help
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Say Y here if you want to enable PCIe controller support on
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Armada-8K SoCs. The PCIe controller on Armada-8K is based on
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2017-09-02 04:35:50 +07:00
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DesignWare hardware and therefore the driver re-uses the
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DesignWare core functions to implement the driver.
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2017-01-06 19:52:48 +07:00
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config PCIE_ARTPEC6
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bool "Axis ARTPEC-6 PCIe controller"
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2017-02-15 20:18:19 +07:00
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depends on PCI
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2017-01-06 19:52:48 +07:00
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depends on MACH_ARTPEC6
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depends on PCI_MSI_IRQ_DOMAIN
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select PCIEPORTBUS
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2017-02-15 20:18:18 +07:00
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select PCIE_DW_HOST
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2017-01-06 19:52:48 +07:00
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help
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Say Y here to enable PCIe controller support on Axis ARTPEC-6
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SoCs. This PCIe controller uses the DesignWare core.
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2017-06-19 17:23:48 +07:00
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config PCIE_KIRIN
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depends on OF && ARM64
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bool "HiSilicon Kirin series SoCs PCIe controllers"
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depends on PCI
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select PCIEPORTBUS
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select PCIE_DW_HOST
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help
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Say Y here if you want PCIe controller support
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on HiSilicon Kirin series SoCs.
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2017-01-06 19:52:48 +07:00
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endmenu
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