2008-10-23 05:47:49 +07:00
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/*
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* Copyright (c) 2007 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/ethtool.h>
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#include <linux/netdevice.h>
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2012-07-19 05:33:49 +07:00
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#include <linux/mlx4/driver.h>
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2014-10-27 16:37:36 +07:00
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#include <linux/mlx4/device.h>
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2013-01-31 06:07:04 +07:00
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#include <linux/in.h>
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#include <net/ip.h>
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2015-03-30 21:45:23 +07:00
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#include <linux/bitmap.h>
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2008-10-23 05:47:49 +07:00
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#include "mlx4_en.h"
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#include "en_port.h"
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2012-07-05 11:03:49 +07:00
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#define EN_ETHTOOL_QP_ATTACH (1ull << 63)
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#define EN_ETHTOOL_SHORT_MASK cpu_to_be16(0xffff)
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#define EN_ETHTOOL_WORD_MASK cpu_to_be32(0xffffffff)
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2008-10-23 05:47:49 +07:00
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2012-12-02 10:49:22 +07:00
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static int mlx4_en_moderation_update(struct mlx4_en_priv *priv)
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{
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int i;
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int err = 0;
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for (i = 0; i < priv->tx_ring_num; i++) {
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2013-11-07 17:19:52 +07:00
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priv->tx_cq[i]->moder_cnt = priv->tx_frames;
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priv->tx_cq[i]->moder_time = priv->tx_usecs;
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2013-09-12 22:11:20 +07:00
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if (priv->port_up) {
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2013-11-07 17:19:52 +07:00
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err = mlx4_en_set_cq_moder(priv, priv->tx_cq[i]);
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2013-09-12 22:11:20 +07:00
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if (err)
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return err;
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}
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2012-12-02 10:49:22 +07:00
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}
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if (priv->adaptive_rx_coal)
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return 0;
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for (i = 0; i < priv->rx_ring_num; i++) {
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2013-11-07 17:19:52 +07:00
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priv->rx_cq[i]->moder_cnt = priv->rx_frames;
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priv->rx_cq[i]->moder_time = priv->rx_usecs;
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2012-12-02 10:49:22 +07:00
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priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
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2013-09-12 22:11:20 +07:00
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if (priv->port_up) {
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2013-11-07 17:19:52 +07:00
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err = mlx4_en_set_cq_moder(priv, priv->rx_cq[i]);
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2013-09-12 22:11:20 +07:00
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if (err)
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return err;
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}
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2012-12-02 10:49:22 +07:00
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}
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return err;
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}
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2008-10-23 05:47:49 +07:00
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static void
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mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
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{
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struct mlx4_en_priv *priv = netdev_priv(dev);
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struct mlx4_en_dev *mdev = priv->mdev;
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2011-11-14 15:13:25 +07:00
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strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
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strlcpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")",
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sizeof(drvinfo->version));
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snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
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"%d.%d.%d",
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2008-10-23 05:47:49 +07:00
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(u16) (mdev->dev->caps.fw_ver >> 32),
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(u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
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(u16) (mdev->dev->caps.fw_ver & 0xffff));
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2015-01-25 21:59:35 +07:00
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strlcpy(drvinfo->bus_info, pci_name(mdev->dev->persist->pdev),
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2011-11-14 15:13:25 +07:00
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sizeof(drvinfo->bus_info));
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2008-10-23 05:47:49 +07:00
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drvinfo->n_stats = 0;
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drvinfo->regdump_len = 0;
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drvinfo->eedump_len = 0;
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}
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2014-07-22 19:44:10 +07:00
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static const char mlx4_en_priv_flags[][ETH_GSTRING_LEN] = {
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"blueflame",
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};
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2008-10-23 05:47:49 +07:00
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static const char main_strings[][ETH_GSTRING_LEN] = {
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2015-03-30 21:45:23 +07:00
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/* main statistics */
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2008-10-23 05:47:49 +07:00
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"rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
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"tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
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"rx_length_errors", "rx_over_errors", "rx_crc_errors",
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"rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
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"tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
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"tx_heartbeat_errors", "tx_window_errors",
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/* port statistics */
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2010-08-24 10:46:46 +07:00
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"tso_packets",
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2014-10-02 22:24:21 +07:00
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"xmit_more",
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2008-10-23 05:47:49 +07:00
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"queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed",
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2014-11-09 18:51:53 +07:00
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"rx_csum_good", "rx_csum_none", "rx_csum_complete", "tx_chksum_offload",
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2008-10-23 05:47:49 +07:00
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2015-03-30 21:45:25 +07:00
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/* priority flow control statistics rx */
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"rx_pause_prio_0", "rx_pause_duration_prio_0",
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"rx_pause_transition_prio_0",
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"rx_pause_prio_1", "rx_pause_duration_prio_1",
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"rx_pause_transition_prio_1",
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"rx_pause_prio_2", "rx_pause_duration_prio_2",
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"rx_pause_transition_prio_2",
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"rx_pause_prio_3", "rx_pause_duration_prio_3",
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"rx_pause_transition_prio_3",
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"rx_pause_prio_4", "rx_pause_duration_prio_4",
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"rx_pause_transition_prio_4",
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"rx_pause_prio_5", "rx_pause_duration_prio_5",
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"rx_pause_transition_prio_5",
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"rx_pause_prio_6", "rx_pause_duration_prio_6",
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"rx_pause_transition_prio_6",
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"rx_pause_prio_7", "rx_pause_duration_prio_7",
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"rx_pause_transition_prio_7",
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/* flow control statistics rx */
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"rx_pause", "rx_pause_duration", "rx_pause_transition",
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/* priority flow control statistics tx */
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"tx_pause_prio_0", "tx_pause_duration_prio_0",
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"tx_pause_transition_prio_0",
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"tx_pause_prio_1", "tx_pause_duration_prio_1",
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"tx_pause_transition_prio_1",
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"tx_pause_prio_2", "tx_pause_duration_prio_2",
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"tx_pause_transition_prio_2",
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"tx_pause_prio_3", "tx_pause_duration_prio_3",
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"tx_pause_transition_prio_3",
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"tx_pause_prio_4", "tx_pause_duration_prio_4",
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"tx_pause_transition_prio_4",
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"tx_pause_prio_5", "tx_pause_duration_prio_5",
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"tx_pause_transition_prio_5",
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"tx_pause_prio_6", "tx_pause_duration_prio_6",
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"tx_pause_transition_prio_6",
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"tx_pause_prio_7", "tx_pause_duration_prio_7",
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"tx_pause_transition_prio_7",
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/* flow control statistics tx */
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"tx_pause", "tx_pause_duration", "tx_pause_transition",
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2008-10-23 05:47:49 +07:00
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/* packet statistics */
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2015-03-30 21:45:26 +07:00
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"rx_multicast_packets",
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"rx_broadcast_packets",
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"rx_jabbers",
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"rx_in_range_length_error",
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"rx_out_range_length_error",
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"tx_multicast_packets",
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"tx_broadcast_packets",
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"rx_prio_0_packets", "rx_prio_0_bytes",
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"rx_prio_1_packets", "rx_prio_1_bytes",
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"rx_prio_2_packets", "rx_prio_2_bytes",
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"rx_prio_3_packets", "rx_prio_3_bytes",
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"rx_prio_4_packets", "rx_prio_4_bytes",
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"rx_prio_5_packets", "rx_prio_5_bytes",
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"rx_prio_6_packets", "rx_prio_6_bytes",
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"rx_prio_7_packets", "rx_prio_7_bytes",
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"rx_novlan_packets", "rx_novlan_bytes",
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"tx_prio_0_packets", "tx_prio_0_bytes",
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"tx_prio_1_packets", "tx_prio_1_bytes",
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"tx_prio_2_packets", "tx_prio_2_bytes",
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"tx_prio_3_packets", "tx_prio_3_bytes",
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"tx_prio_4_packets", "tx_prio_4_bytes",
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"tx_prio_5_packets", "tx_prio_5_bytes",
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"tx_prio_6_packets", "tx_prio_6_bytes",
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"tx_prio_7_packets", "tx_prio_7_bytes",
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"tx_novlan_packets", "tx_novlan_bytes",
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2008-10-23 05:47:49 +07:00
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};
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2010-08-24 10:46:18 +07:00
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static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
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2012-04-13 11:33:20 +07:00
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"Interrupt Test",
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2010-08-24 10:46:18 +07:00
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"Link Test",
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"Speed Test",
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"Register Test",
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"Loopback Test",
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};
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2008-10-23 05:47:49 +07:00
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static u32 mlx4_en_get_msglevel(struct net_device *dev)
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{
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return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
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}
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static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
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{
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((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
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}
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static void mlx4_en_get_wol(struct net_device *netdev,
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struct ethtool_wolinfo *wol)
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{
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2011-03-23 05:37:59 +07:00
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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int err = 0;
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u64 config = 0;
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2011-11-27 02:55:15 +07:00
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u64 mask;
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2011-03-23 05:37:59 +07:00
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2011-11-27 02:55:15 +07:00
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if ((priv->port < 1) || (priv->port > 2)) {
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en_err(priv, "Failed to get WoL information\n");
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return;
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}
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mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
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MLX4_DEV_CAP_FLAG_WOL_PORT2;
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if (!(priv->mdev->dev->caps.flags & mask)) {
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2011-03-23 05:37:59 +07:00
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wol->supported = 0;
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wol->wolopts = 0;
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return;
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}
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err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
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if (err) {
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en_err(priv, "Failed to get WoL information\n");
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return;
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}
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if (config & MLX4_EN_WOL_MAGIC)
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wol->supported = WAKE_MAGIC;
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else
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wol->supported = 0;
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if (config & MLX4_EN_WOL_ENABLED)
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wol->wolopts = WAKE_MAGIC;
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else
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wol->wolopts = 0;
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}
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static int mlx4_en_set_wol(struct net_device *netdev,
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struct ethtool_wolinfo *wol)
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{
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struct mlx4_en_priv *priv = netdev_priv(netdev);
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u64 config = 0;
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int err = 0;
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2011-11-27 02:55:15 +07:00
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u64 mask;
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if ((priv->port < 1) || (priv->port > 2))
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return -EOPNOTSUPP;
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mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
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MLX4_DEV_CAP_FLAG_WOL_PORT2;
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2011-03-23 05:37:59 +07:00
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2011-11-27 02:55:15 +07:00
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if (!(priv->mdev->dev->caps.flags & mask))
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2011-03-23 05:37:59 +07:00
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return -EOPNOTSUPP;
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if (wol->supported & ~WAKE_MAGIC)
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return -EINVAL;
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err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
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if (err) {
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en_err(priv, "Failed to get WoL info, unable to modify\n");
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return err;
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}
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if (wol->wolopts & WAKE_MAGIC) {
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config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED |
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MLX4_EN_WOL_MAGIC;
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} else {
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config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC);
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config |= MLX4_EN_WOL_DO_MODIFY;
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}
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err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
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if (err)
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en_err(priv, "Failed to set WoL information\n");
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return err;
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2008-10-23 05:47:49 +07:00
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}
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2015-03-30 21:45:23 +07:00
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struct bitmap_iterator {
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unsigned long *stats_bitmap;
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unsigned int count;
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unsigned int iterator;
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bool advance_array; /* if set, force no increments */
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};
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static inline void bitmap_iterator_init(struct bitmap_iterator *h,
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unsigned long *stats_bitmap,
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int count)
|
|
|
|
{
|
|
|
|
h->iterator = 0;
|
|
|
|
h->advance_array = !bitmap_empty(stats_bitmap, count);
|
|
|
|
h->count = h->advance_array ? bitmap_weight(stats_bitmap, count)
|
|
|
|
: count;
|
|
|
|
h->stats_bitmap = stats_bitmap;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int bitmap_iterator_test(struct bitmap_iterator *h)
|
|
|
|
{
|
|
|
|
return !h->advance_array ? 1 : test_bit(h->iterator, h->stats_bitmap);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int bitmap_iterator_inc(struct bitmap_iterator *h)
|
|
|
|
{
|
|
|
|
return h->iterator++;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline unsigned int
|
|
|
|
bitmap_iterator_count(struct bitmap_iterator *h)
|
|
|
|
{
|
|
|
|
return h->count;
|
|
|
|
}
|
|
|
|
|
2008-10-23 05:47:49 +07:00
|
|
|
static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
2015-03-30 21:45:23 +07:00
|
|
|
struct bitmap_iterator it;
|
|
|
|
|
2015-03-30 21:45:24 +07:00
|
|
|
bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
|
2008-10-23 05:47:49 +07:00
|
|
|
|
2010-08-24 10:46:18 +07:00
|
|
|
switch (sset) {
|
|
|
|
case ETH_SS_STATS:
|
2015-03-30 21:45:23 +07:00
|
|
|
return bitmap_iterator_count(&it) +
|
2013-06-18 20:18:28 +07:00
|
|
|
(priv->tx_ring_num * 2) +
|
2013-08-01 10:10:25 +07:00
|
|
|
#ifdef CONFIG_NET_RX_BUSY_POLL
|
2013-06-18 20:18:28 +07:00
|
|
|
(priv->rx_ring_num * 5);
|
|
|
|
#else
|
|
|
|
(priv->rx_ring_num * 2);
|
|
|
|
#endif
|
2010-08-24 10:46:18 +07:00
|
|
|
case ETH_SS_TEST:
|
2011-07-08 02:19:29 +07:00
|
|
|
return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
|
|
|
|
& MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
|
2014-07-22 19:44:10 +07:00
|
|
|
case ETH_SS_PRIV_FLAGS:
|
|
|
|
return ARRAY_SIZE(mlx4_en_priv_flags);
|
2010-08-24 10:46:18 +07:00
|
|
|
default:
|
2008-10-23 05:47:49 +07:00
|
|
|
return -EOPNOTSUPP;
|
2010-08-24 10:46:18 +07:00
|
|
|
}
|
2008-10-23 05:47:49 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void mlx4_en_get_ethtool_stats(struct net_device *dev,
|
|
|
|
struct ethtool_stats *stats, uint64_t *data)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
int index = 0;
|
2015-03-30 21:45:23 +07:00
|
|
|
int i;
|
|
|
|
struct bitmap_iterator it;
|
|
|
|
|
2015-03-30 21:45:24 +07:00
|
|
|
bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
|
2008-10-23 05:47:49 +07:00
|
|
|
|
|
|
|
spin_lock_bh(&priv->stats_lock);
|
|
|
|
|
2015-03-30 21:45:23 +07:00
|
|
|
for (i = 0; i < NUM_MAIN_STATS; i++, bitmap_iterator_inc(&it))
|
|
|
|
if (bitmap_iterator_test(&it))
|
|
|
|
data[index++] = ((unsigned long *)&priv->stats)[i];
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_PORT_STATS; i++, bitmap_iterator_inc(&it))
|
|
|
|
if (bitmap_iterator_test(&it))
|
|
|
|
data[index++] = ((unsigned long *)&priv->port_stats)[i];
|
|
|
|
|
2015-03-30 21:45:25 +07:00
|
|
|
for (i = 0; i < NUM_FLOW_PRIORITY_STATS_RX;
|
|
|
|
i++, bitmap_iterator_inc(&it))
|
|
|
|
if (bitmap_iterator_test(&it))
|
|
|
|
data[index++] =
|
|
|
|
((u64 *)&priv->rx_priority_flowstats)[i];
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_FLOW_STATS_RX; i++, bitmap_iterator_inc(&it))
|
|
|
|
if (bitmap_iterator_test(&it))
|
|
|
|
data[index++] = ((u64 *)&priv->rx_flowstats)[i];
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_FLOW_PRIORITY_STATS_TX;
|
|
|
|
i++, bitmap_iterator_inc(&it))
|
|
|
|
if (bitmap_iterator_test(&it))
|
|
|
|
data[index++] =
|
|
|
|
((u64 *)&priv->tx_priority_flowstats)[i];
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_FLOW_STATS_TX; i++, bitmap_iterator_inc(&it))
|
|
|
|
if (bitmap_iterator_test(&it))
|
|
|
|
data[index++] = ((u64 *)&priv->tx_flowstats)[i];
|
|
|
|
|
2015-03-30 21:45:23 +07:00
|
|
|
for (i = 0; i < NUM_PKT_STATS; i++, bitmap_iterator_inc(&it))
|
|
|
|
if (bitmap_iterator_test(&it))
|
|
|
|
data[index++] = ((unsigned long *)&priv->pkstats)[i];
|
|
|
|
|
2008-10-23 05:47:49 +07:00
|
|
|
for (i = 0; i < priv->tx_ring_num; i++) {
|
2013-11-07 17:19:52 +07:00
|
|
|
data[index++] = priv->tx_ring[i]->packets;
|
|
|
|
data[index++] = priv->tx_ring[i]->bytes;
|
2008-10-23 05:47:49 +07:00
|
|
|
}
|
|
|
|
for (i = 0; i < priv->rx_ring_num; i++) {
|
2013-11-07 17:19:52 +07:00
|
|
|
data[index++] = priv->rx_ring[i]->packets;
|
|
|
|
data[index++] = priv->rx_ring[i]->bytes;
|
2013-08-01 10:10:25 +07:00
|
|
|
#ifdef CONFIG_NET_RX_BUSY_POLL
|
2013-11-07 17:19:52 +07:00
|
|
|
data[index++] = priv->rx_ring[i]->yields;
|
|
|
|
data[index++] = priv->rx_ring[i]->misses;
|
|
|
|
data[index++] = priv->rx_ring[i]->cleaned;
|
2013-06-18 20:18:28 +07:00
|
|
|
#endif
|
2008-10-23 05:47:49 +07:00
|
|
|
}
|
|
|
|
spin_unlock_bh(&priv->stats_lock);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2010-08-24 10:46:18 +07:00
|
|
|
static void mlx4_en_self_test(struct net_device *dev,
|
|
|
|
struct ethtool_test *etest, u64 *buf)
|
|
|
|
{
|
|
|
|
mlx4_en_ex_selftest(dev, &etest->flags, buf);
|
|
|
|
}
|
|
|
|
|
2008-10-23 05:47:49 +07:00
|
|
|
static void mlx4_en_get_strings(struct net_device *dev,
|
|
|
|
uint32_t stringset, uint8_t *data)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
int index = 0;
|
2015-03-30 21:45:23 +07:00
|
|
|
int i, strings = 0;
|
|
|
|
struct bitmap_iterator it;
|
|
|
|
|
2015-03-30 21:45:24 +07:00
|
|
|
bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
|
2008-10-23 05:47:49 +07:00
|
|
|
|
2010-08-24 10:46:18 +07:00
|
|
|
switch (stringset) {
|
|
|
|
case ETH_SS_TEST:
|
|
|
|
for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
|
|
|
|
strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
|
2011-07-08 02:19:29 +07:00
|
|
|
if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
|
2010-08-24 10:46:18 +07:00
|
|
|
for (; i < MLX4_EN_NUM_SELF_TEST; i++)
|
|
|
|
strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case ETH_SS_STATS:
|
|
|
|
/* Add main counters */
|
2015-03-30 21:45:23 +07:00
|
|
|
for (i = 0; i < NUM_MAIN_STATS; i++, strings++,
|
|
|
|
bitmap_iterator_inc(&it))
|
|
|
|
if (bitmap_iterator_test(&it))
|
2012-01-19 16:45:05 +07:00
|
|
|
strcpy(data + (index++) * ETH_GSTRING_LEN,
|
2015-03-30 21:45:23 +07:00
|
|
|
main_strings[strings]);
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_PORT_STATS; i++, strings++,
|
|
|
|
bitmap_iterator_inc(&it))
|
|
|
|
if (bitmap_iterator_test(&it))
|
2012-01-19 16:45:05 +07:00
|
|
|
strcpy(data + (index++) * ETH_GSTRING_LEN,
|
2015-03-30 21:45:23 +07:00
|
|
|
main_strings[strings]);
|
|
|
|
|
2015-03-30 21:45:25 +07:00
|
|
|
for (i = 0; i < NUM_FLOW_STATS; i++, strings++,
|
|
|
|
bitmap_iterator_inc(&it))
|
|
|
|
if (bitmap_iterator_test(&it))
|
|
|
|
strcpy(data + (index++) * ETH_GSTRING_LEN,
|
|
|
|
main_strings[strings]);
|
|
|
|
|
2015-03-30 21:45:23 +07:00
|
|
|
for (i = 0; i < NUM_PKT_STATS; i++, strings++,
|
|
|
|
bitmap_iterator_inc(&it))
|
|
|
|
if (bitmap_iterator_test(&it))
|
2012-01-19 16:45:05 +07:00
|
|
|
strcpy(data + (index++) * ETH_GSTRING_LEN,
|
2015-03-30 21:45:23 +07:00
|
|
|
main_strings[strings]);
|
|
|
|
|
2010-08-24 10:46:18 +07:00
|
|
|
for (i = 0; i < priv->tx_ring_num; i++) {
|
|
|
|
sprintf(data + (index++) * ETH_GSTRING_LEN,
|
|
|
|
"tx%d_packets", i);
|
|
|
|
sprintf(data + (index++) * ETH_GSTRING_LEN,
|
|
|
|
"tx%d_bytes", i);
|
|
|
|
}
|
|
|
|
for (i = 0; i < priv->rx_ring_num; i++) {
|
|
|
|
sprintf(data + (index++) * ETH_GSTRING_LEN,
|
|
|
|
"rx%d_packets", i);
|
|
|
|
sprintf(data + (index++) * ETH_GSTRING_LEN,
|
|
|
|
"rx%d_bytes", i);
|
2013-08-01 10:10:25 +07:00
|
|
|
#ifdef CONFIG_NET_RX_BUSY_POLL
|
2013-06-18 20:18:28 +07:00
|
|
|
sprintf(data + (index++) * ETH_GSTRING_LEN,
|
|
|
|
"rx%d_napi_yield", i);
|
|
|
|
sprintf(data + (index++) * ETH_GSTRING_LEN,
|
|
|
|
"rx%d_misses", i);
|
|
|
|
sprintf(data + (index++) * ETH_GSTRING_LEN,
|
|
|
|
"rx%d_cleaned", i);
|
|
|
|
#endif
|
2010-08-24 10:46:18 +07:00
|
|
|
}
|
|
|
|
break;
|
2014-07-22 19:44:10 +07:00
|
|
|
case ETH_SS_PRIV_FLAGS:
|
|
|
|
for (i = 0; i < ARRAY_SIZE(mlx4_en_priv_flags); i++)
|
|
|
|
strcpy(data + i * ETH_GSTRING_LEN,
|
|
|
|
mlx4_en_priv_flags[i]);
|
|
|
|
break;
|
|
|
|
|
2010-08-24 10:46:18 +07:00
|
|
|
}
|
2008-10-23 05:47:49 +07:00
|
|
|
}
|
|
|
|
|
2014-10-27 16:37:40 +07:00
|
|
|
static u32 mlx4_en_autoneg_get(struct net_device *dev)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_en_dev *mdev = priv->mdev;
|
|
|
|
u32 autoneg = AUTONEG_DISABLE;
|
|
|
|
|
|
|
|
if ((mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP) &&
|
|
|
|
(priv->port_state.flags & MLX4_EN_PORT_ANE))
|
|
|
|
autoneg = AUTONEG_ENABLE;
|
|
|
|
|
|
|
|
return autoneg;
|
|
|
|
}
|
|
|
|
|
|
|
|
static u32 ptys_get_supported_port(struct mlx4_ptys_reg *ptys_reg)
|
|
|
|
{
|
|
|
|
u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
|
|
|
|
|
|
|
|
if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
|
|
|
|
| MLX4_PROT_MASK(MLX4_1000BASE_T)
|
|
|
|
| MLX4_PROT_MASK(MLX4_100BASE_TX))) {
|
|
|
|
return SUPPORTED_TP;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
|
|
|
|
| MLX4_PROT_MASK(MLX4_10GBASE_SR)
|
|
|
|
| MLX4_PROT_MASK(MLX4_56GBASE_SR4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_40GBASE_CR4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_40GBASE_SR4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
|
|
|
|
return SUPPORTED_FIBRE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_40GBASE_KR4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_20GBASE_KR2)
|
|
|
|
| MLX4_PROT_MASK(MLX4_10GBASE_KR)
|
|
|
|
| MLX4_PROT_MASK(MLX4_10GBASE_KX4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
|
|
|
|
return SUPPORTED_Backplane;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static u32 ptys_get_active_port(struct mlx4_ptys_reg *ptys_reg)
|
|
|
|
{
|
|
|
|
u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_oper);
|
|
|
|
|
|
|
|
if (!eth_proto) /* link down */
|
|
|
|
eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
|
|
|
|
|
|
|
|
if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
|
|
|
|
| MLX4_PROT_MASK(MLX4_1000BASE_T)
|
|
|
|
| MLX4_PROT_MASK(MLX4_100BASE_TX))) {
|
|
|
|
return PORT_TP;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_SR)
|
|
|
|
| MLX4_PROT_MASK(MLX4_56GBASE_SR4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_40GBASE_SR4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
|
|
|
|
return PORT_FIBRE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
|
|
|
|
| MLX4_PROT_MASK(MLX4_56GBASE_CR4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_40GBASE_CR4))) {
|
|
|
|
return PORT_DA;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_40GBASE_KR4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_20GBASE_KR2)
|
|
|
|
| MLX4_PROT_MASK(MLX4_10GBASE_KR)
|
|
|
|
| MLX4_PROT_MASK(MLX4_10GBASE_KX4)
|
|
|
|
| MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
|
|
|
|
return PORT_NONE;
|
|
|
|
}
|
|
|
|
return PORT_OTHER;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define MLX4_LINK_MODES_SZ \
|
|
|
|
(FIELD_SIZEOF(struct mlx4_ptys_reg, eth_proto_cap) * 8)
|
|
|
|
|
|
|
|
enum ethtool_report {
|
|
|
|
SUPPORTED = 0,
|
|
|
|
ADVERTISED = 1,
|
|
|
|
SPEED = 2
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Translates mlx4 link mode to equivalent ethtool Link modes/speed */
|
|
|
|
static u32 ptys2ethtool_map[MLX4_LINK_MODES_SZ][3] = {
|
|
|
|
[MLX4_100BASE_TX] = {
|
|
|
|
SUPPORTED_100baseT_Full,
|
|
|
|
ADVERTISED_100baseT_Full,
|
|
|
|
SPEED_100
|
|
|
|
},
|
|
|
|
|
|
|
|
[MLX4_1000BASE_T] = {
|
|
|
|
SUPPORTED_1000baseT_Full,
|
|
|
|
ADVERTISED_1000baseT_Full,
|
|
|
|
SPEED_1000
|
|
|
|
},
|
|
|
|
[MLX4_1000BASE_CX_SGMII] = {
|
|
|
|
SUPPORTED_1000baseKX_Full,
|
|
|
|
ADVERTISED_1000baseKX_Full,
|
|
|
|
SPEED_1000
|
|
|
|
},
|
|
|
|
[MLX4_1000BASE_KX] = {
|
|
|
|
SUPPORTED_1000baseKX_Full,
|
|
|
|
ADVERTISED_1000baseKX_Full,
|
|
|
|
SPEED_1000
|
|
|
|
},
|
|
|
|
|
|
|
|
[MLX4_10GBASE_T] = {
|
|
|
|
SUPPORTED_10000baseT_Full,
|
|
|
|
ADVERTISED_10000baseT_Full,
|
|
|
|
SPEED_10000
|
|
|
|
},
|
|
|
|
[MLX4_10GBASE_CX4] = {
|
|
|
|
SUPPORTED_10000baseKX4_Full,
|
|
|
|
ADVERTISED_10000baseKX4_Full,
|
|
|
|
SPEED_10000
|
|
|
|
},
|
|
|
|
[MLX4_10GBASE_KX4] = {
|
|
|
|
SUPPORTED_10000baseKX4_Full,
|
|
|
|
ADVERTISED_10000baseKX4_Full,
|
|
|
|
SPEED_10000
|
|
|
|
},
|
|
|
|
[MLX4_10GBASE_KR] = {
|
|
|
|
SUPPORTED_10000baseKR_Full,
|
|
|
|
ADVERTISED_10000baseKR_Full,
|
|
|
|
SPEED_10000
|
|
|
|
},
|
|
|
|
[MLX4_10GBASE_CR] = {
|
|
|
|
SUPPORTED_10000baseKR_Full,
|
|
|
|
ADVERTISED_10000baseKR_Full,
|
|
|
|
SPEED_10000
|
|
|
|
},
|
|
|
|
[MLX4_10GBASE_SR] = {
|
|
|
|
SUPPORTED_10000baseKR_Full,
|
|
|
|
ADVERTISED_10000baseKR_Full,
|
|
|
|
SPEED_10000
|
|
|
|
},
|
|
|
|
|
|
|
|
[MLX4_20GBASE_KR2] = {
|
|
|
|
SUPPORTED_20000baseMLD2_Full | SUPPORTED_20000baseKR2_Full,
|
|
|
|
ADVERTISED_20000baseMLD2_Full | ADVERTISED_20000baseKR2_Full,
|
|
|
|
SPEED_20000
|
|
|
|
},
|
|
|
|
|
|
|
|
[MLX4_40GBASE_CR4] = {
|
|
|
|
SUPPORTED_40000baseCR4_Full,
|
|
|
|
ADVERTISED_40000baseCR4_Full,
|
|
|
|
SPEED_40000
|
|
|
|
},
|
|
|
|
[MLX4_40GBASE_KR4] = {
|
|
|
|
SUPPORTED_40000baseKR4_Full,
|
|
|
|
ADVERTISED_40000baseKR4_Full,
|
|
|
|
SPEED_40000
|
|
|
|
},
|
|
|
|
[MLX4_40GBASE_SR4] = {
|
|
|
|
SUPPORTED_40000baseSR4_Full,
|
|
|
|
ADVERTISED_40000baseSR4_Full,
|
|
|
|
SPEED_40000
|
|
|
|
},
|
|
|
|
|
|
|
|
[MLX4_56GBASE_KR4] = {
|
|
|
|
SUPPORTED_56000baseKR4_Full,
|
|
|
|
ADVERTISED_56000baseKR4_Full,
|
|
|
|
SPEED_56000
|
|
|
|
},
|
|
|
|
[MLX4_56GBASE_CR4] = {
|
|
|
|
SUPPORTED_56000baseCR4_Full,
|
|
|
|
ADVERTISED_56000baseCR4_Full,
|
|
|
|
SPEED_56000
|
|
|
|
},
|
|
|
|
[MLX4_56GBASE_SR4] = {
|
|
|
|
SUPPORTED_56000baseSR4_Full,
|
|
|
|
ADVERTISED_56000baseSR4_Full,
|
|
|
|
SPEED_56000
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static u32 ptys2ethtool_link_modes(u32 eth_proto, enum ethtool_report report)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
u32 link_modes = 0;
|
|
|
|
|
|
|
|
for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
|
|
|
|
if (eth_proto & MLX4_PROT_MASK(i))
|
|
|
|
link_modes |= ptys2ethtool_map[i][report];
|
|
|
|
}
|
|
|
|
return link_modes;
|
|
|
|
}
|
|
|
|
|
2014-10-27 16:37:41 +07:00
|
|
|
static u32 ethtool2ptys_link_modes(u32 link_modes, enum ethtool_report report)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
u32 ptys_modes = 0;
|
|
|
|
|
|
|
|
for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
|
|
|
|
if (ptys2ethtool_map[i][report] & link_modes)
|
|
|
|
ptys_modes |= 1 << i;
|
|
|
|
}
|
|
|
|
return ptys_modes;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Convert actual speed (SPEED_XXX) to ptys link modes */
|
|
|
|
static u32 speed2ptys_link_modes(u32 speed)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
u32 ptys_modes = 0;
|
|
|
|
|
|
|
|
for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
|
|
|
|
if (ptys2ethtool_map[i][SPEED] == speed)
|
|
|
|
ptys_modes |= 1 << i;
|
|
|
|
}
|
|
|
|
return ptys_modes;
|
|
|
|
}
|
|
|
|
|
2014-10-27 16:37:40 +07:00
|
|
|
static int ethtool_get_ptys_settings(struct net_device *dev,
|
|
|
|
struct ethtool_cmd *cmd)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_ptys_reg ptys_reg;
|
|
|
|
u32 eth_proto;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
memset(&ptys_reg, 0, sizeof(ptys_reg));
|
|
|
|
ptys_reg.local_port = priv->port;
|
|
|
|
ptys_reg.proto_mask = MLX4_PTYS_EN;
|
|
|
|
ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
|
|
|
|
MLX4_ACCESS_REG_QUERY, &ptys_reg);
|
|
|
|
if (ret) {
|
|
|
|
en_warn(priv, "Failed to run mlx4_ACCESS_PTYS_REG status(%x)",
|
|
|
|
ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
en_dbg(DRV, priv, "ptys_reg.proto_mask %x\n",
|
|
|
|
ptys_reg.proto_mask);
|
|
|
|
en_dbg(DRV, priv, "ptys_reg.eth_proto_cap %x\n",
|
|
|
|
be32_to_cpu(ptys_reg.eth_proto_cap));
|
|
|
|
en_dbg(DRV, priv, "ptys_reg.eth_proto_admin %x\n",
|
|
|
|
be32_to_cpu(ptys_reg.eth_proto_admin));
|
|
|
|
en_dbg(DRV, priv, "ptys_reg.eth_proto_oper %x\n",
|
|
|
|
be32_to_cpu(ptys_reg.eth_proto_oper));
|
|
|
|
en_dbg(DRV, priv, "ptys_reg.eth_proto_lp_adv %x\n",
|
|
|
|
be32_to_cpu(ptys_reg.eth_proto_lp_adv));
|
|
|
|
|
|
|
|
cmd->supported = 0;
|
|
|
|
cmd->advertising = 0;
|
|
|
|
|
|
|
|
cmd->supported |= ptys_get_supported_port(&ptys_reg);
|
|
|
|
|
|
|
|
eth_proto = be32_to_cpu(ptys_reg.eth_proto_cap);
|
|
|
|
cmd->supported |= ptys2ethtool_link_modes(eth_proto, SUPPORTED);
|
|
|
|
|
|
|
|
eth_proto = be32_to_cpu(ptys_reg.eth_proto_admin);
|
|
|
|
cmd->advertising |= ptys2ethtool_link_modes(eth_proto, ADVERTISED);
|
|
|
|
|
|
|
|
cmd->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
|
|
|
|
cmd->advertising |= (priv->prof->tx_pause) ? ADVERTISED_Pause : 0;
|
|
|
|
|
|
|
|
cmd->advertising |= (priv->prof->tx_pause ^ priv->prof->rx_pause) ?
|
|
|
|
ADVERTISED_Asym_Pause : 0;
|
|
|
|
|
|
|
|
cmd->port = ptys_get_active_port(&ptys_reg);
|
|
|
|
cmd->transceiver = (SUPPORTED_TP & cmd->supported) ?
|
|
|
|
XCVR_EXTERNAL : XCVR_INTERNAL;
|
|
|
|
|
|
|
|
if (mlx4_en_autoneg_get(dev)) {
|
|
|
|
cmd->supported |= SUPPORTED_Autoneg;
|
|
|
|
cmd->advertising |= ADVERTISED_Autoneg;
|
|
|
|
}
|
|
|
|
|
|
|
|
cmd->autoneg = (priv->port_state.flags & MLX4_EN_PORT_ANC) ?
|
|
|
|
AUTONEG_ENABLE : AUTONEG_DISABLE;
|
|
|
|
|
|
|
|
eth_proto = be32_to_cpu(ptys_reg.eth_proto_lp_adv);
|
|
|
|
cmd->lp_advertising = ptys2ethtool_link_modes(eth_proto, ADVERTISED);
|
|
|
|
|
|
|
|
cmd->lp_advertising |= (priv->port_state.flags & MLX4_EN_PORT_ANC) ?
|
|
|
|
ADVERTISED_Autoneg : 0;
|
|
|
|
|
|
|
|
cmd->phy_address = 0;
|
|
|
|
cmd->mdio_support = 0;
|
|
|
|
cmd->maxtxpkt = 0;
|
|
|
|
cmd->maxrxpkt = 0;
|
|
|
|
cmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
|
|
|
|
cmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ethtool_get_default_settings(struct net_device *dev,
|
|
|
|
struct ethtool_cmd *cmd)
|
2008-10-23 05:47:49 +07:00
|
|
|
{
|
2010-08-24 10:46:23 +07:00
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
int trans_type;
|
|
|
|
|
2008-10-23 05:47:49 +07:00
|
|
|
cmd->autoneg = AUTONEG_DISABLE;
|
|
|
|
cmd->supported = SUPPORTED_10000baseT_Full;
|
2010-08-24 10:46:23 +07:00
|
|
|
cmd->advertising = ADVERTISED_10000baseT_Full;
|
2014-10-27 16:37:40 +07:00
|
|
|
trans_type = priv->port_state.transceiver;
|
2010-08-24 10:46:23 +07:00
|
|
|
|
|
|
|
if (trans_type > 0 && trans_type <= 0xC) {
|
|
|
|
cmd->port = PORT_FIBRE;
|
|
|
|
cmd->transceiver = XCVR_EXTERNAL;
|
|
|
|
cmd->supported |= SUPPORTED_FIBRE;
|
|
|
|
cmd->advertising |= ADVERTISED_FIBRE;
|
|
|
|
} else if (trans_type == 0x80 || trans_type == 0) {
|
|
|
|
cmd->port = PORT_TP;
|
|
|
|
cmd->transceiver = XCVR_INTERNAL;
|
|
|
|
cmd->supported |= SUPPORTED_TP;
|
|
|
|
cmd->advertising |= ADVERTISED_TP;
|
|
|
|
} else {
|
|
|
|
cmd->port = -1;
|
|
|
|
cmd->transceiver = -1;
|
|
|
|
}
|
2014-10-27 16:37:40 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
int ret = -EINVAL;
|
|
|
|
|
|
|
|
if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
en_dbg(DRV, priv, "query port state.flags ANC(%x) ANE(%x)\n",
|
|
|
|
priv->port_state.flags & MLX4_EN_PORT_ANC,
|
|
|
|
priv->port_state.flags & MLX4_EN_PORT_ANE);
|
|
|
|
|
|
|
|
if (priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL)
|
|
|
|
ret = ethtool_get_ptys_settings(dev, cmd);
|
|
|
|
if (ret) /* ETH PROT CRTL is not supported or PTYS CMD failed */
|
|
|
|
ethtool_get_default_settings(dev, cmd);
|
|
|
|
|
|
|
|
if (netif_carrier_ok(dev)) {
|
|
|
|
ethtool_cmd_speed_set(cmd, priv->port_state.link_speed);
|
|
|
|
cmd->duplex = DUPLEX_FULL;
|
|
|
|
} else {
|
|
|
|
ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN);
|
|
|
|
cmd->duplex = DUPLEX_UNKNOWN;
|
|
|
|
}
|
2008-10-23 05:47:49 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-10-27 16:37:41 +07:00
|
|
|
/* Calculate PTYS admin according ethtool speed (SPEED_XXX) */
|
|
|
|
static __be32 speed_set_ptys_admin(struct mlx4_en_priv *priv, u32 speed,
|
|
|
|
__be32 proto_cap)
|
|
|
|
{
|
|
|
|
__be32 proto_admin = 0;
|
|
|
|
|
|
|
|
if (!speed) { /* Speed = 0 ==> Reset Link modes */
|
|
|
|
proto_admin = proto_cap;
|
|
|
|
en_info(priv, "Speed was set to 0, Reset advertised Link Modes to default (%x)\n",
|
|
|
|
be32_to_cpu(proto_cap));
|
|
|
|
} else {
|
|
|
|
u32 ptys_link_modes = speed2ptys_link_modes(speed);
|
|
|
|
|
|
|
|
proto_admin = cpu_to_be32(ptys_link_modes) & proto_cap;
|
|
|
|
en_info(priv, "Setting Speed to %d\n", speed);
|
|
|
|
}
|
|
|
|
return proto_admin;
|
|
|
|
}
|
|
|
|
|
2008-10-23 05:47:49 +07:00
|
|
|
static int mlx4_en_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
|
|
|
|
{
|
2014-10-27 16:37:41 +07:00
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_ptys_reg ptys_reg;
|
|
|
|
__be32 proto_admin;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
u32 ptys_adv = ethtool2ptys_link_modes(cmd->advertising, ADVERTISED);
|
|
|
|
int speed = ethtool_cmd_speed(cmd);
|
|
|
|
|
|
|
|
en_dbg(DRV, priv, "Set Speed=%d adv=0x%x autoneg=%d duplex=%d\n",
|
|
|
|
speed, cmd->advertising, cmd->autoneg, cmd->duplex);
|
|
|
|
|
|
|
|
if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL) ||
|
2014-11-20 19:19:44 +07:00
|
|
|
(cmd->duplex == DUPLEX_HALF))
|
2008-10-23 05:47:49 +07:00
|
|
|
return -EINVAL;
|
|
|
|
|
2014-10-27 16:37:41 +07:00
|
|
|
memset(&ptys_reg, 0, sizeof(ptys_reg));
|
|
|
|
ptys_reg.local_port = priv->port;
|
|
|
|
ptys_reg.proto_mask = MLX4_PTYS_EN;
|
|
|
|
ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
|
|
|
|
MLX4_ACCESS_REG_QUERY, &ptys_reg);
|
|
|
|
if (ret) {
|
|
|
|
en_warn(priv, "Failed to QUERY mlx4_ACCESS_PTYS_REG status(%x)\n",
|
|
|
|
ret);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-01-27 20:58:06 +07:00
|
|
|
proto_admin = cmd->autoneg == AUTONEG_ENABLE ?
|
|
|
|
cpu_to_be32(ptys_adv) :
|
|
|
|
speed_set_ptys_admin(priv, speed,
|
|
|
|
ptys_reg.eth_proto_cap);
|
2014-10-27 16:37:41 +07:00
|
|
|
|
|
|
|
proto_admin &= ptys_reg.eth_proto_cap;
|
|
|
|
if (!proto_admin) {
|
|
|
|
en_warn(priv, "Not supported link mode(s) requested, check supported link modes.\n");
|
|
|
|
return -EINVAL; /* nothing to change due to bad input */
|
|
|
|
}
|
|
|
|
|
2015-01-27 20:58:06 +07:00
|
|
|
if (proto_admin == ptys_reg.eth_proto_admin)
|
|
|
|
return 0; /* Nothing to change */
|
|
|
|
|
2014-10-27 16:37:41 +07:00
|
|
|
en_dbg(DRV, priv, "mlx4_ACCESS_PTYS_REG SET: ptys_reg.eth_proto_admin = 0x%x\n",
|
|
|
|
be32_to_cpu(proto_admin));
|
|
|
|
|
|
|
|
ptys_reg.eth_proto_admin = proto_admin;
|
|
|
|
ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev, MLX4_ACCESS_REG_WRITE,
|
|
|
|
&ptys_reg);
|
|
|
|
if (ret) {
|
|
|
|
en_warn(priv, "Failed to write mlx4_ACCESS_PTYS_REG eth_proto_admin(0x%x) status(0x%x)",
|
|
|
|
be32_to_cpu(ptys_reg.eth_proto_admin), ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_lock(&priv->mdev->state_lock);
|
|
|
|
if (priv->port_up) {
|
2015-01-27 20:58:06 +07:00
|
|
|
en_warn(priv, "Port link mode changed, restarting port...\n");
|
2014-10-27 16:37:41 +07:00
|
|
|
mlx4_en_stop_port(dev, 1);
|
|
|
|
if (mlx4_en_start_port(dev))
|
|
|
|
en_err(priv, "Failed restarting port %d\n", priv->port);
|
|
|
|
}
|
|
|
|
mutex_unlock(&priv->mdev->state_lock);
|
2008-10-23 05:47:49 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_get_coalesce(struct net_device *dev,
|
|
|
|
struct ethtool_coalesce *coal)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
|
2012-04-23 09:18:33 +07:00
|
|
|
coal->tx_coalesce_usecs = priv->tx_usecs;
|
|
|
|
coal->tx_max_coalesced_frames = priv->tx_frames;
|
2014-07-08 15:28:12 +07:00
|
|
|
coal->tx_max_coalesced_frames_irq = priv->tx_work_limit;
|
|
|
|
|
2008-10-23 05:47:49 +07:00
|
|
|
coal->rx_coalesce_usecs = priv->rx_usecs;
|
|
|
|
coal->rx_max_coalesced_frames = priv->rx_frames;
|
|
|
|
|
|
|
|
coal->pkt_rate_low = priv->pkt_rate_low;
|
|
|
|
coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
|
|
|
|
coal->pkt_rate_high = priv->pkt_rate_high;
|
|
|
|
coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
|
|
|
|
coal->rate_sample_interval = priv->sample_interval;
|
|
|
|
coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
|
2014-07-08 15:28:12 +07:00
|
|
|
|
2008-10-23 05:47:49 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_set_coalesce(struct net_device *dev,
|
|
|
|
struct ethtool_coalesce *coal)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
|
2014-07-08 15:28:12 +07:00
|
|
|
if (!coal->tx_max_coalesced_frames_irq)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2008-10-23 05:47:49 +07:00
|
|
|
priv->rx_frames = (coal->rx_max_coalesced_frames ==
|
|
|
|
MLX4_EN_AUTO_CONF) ?
|
2009-06-02 06:23:13 +07:00
|
|
|
MLX4_EN_RX_COAL_TARGET :
|
2008-10-23 05:47:49 +07:00
|
|
|
coal->rx_max_coalesced_frames;
|
|
|
|
priv->rx_usecs = (coal->rx_coalesce_usecs ==
|
|
|
|
MLX4_EN_AUTO_CONF) ?
|
|
|
|
MLX4_EN_RX_COAL_TIME :
|
|
|
|
coal->rx_coalesce_usecs;
|
|
|
|
|
2012-04-23 09:18:33 +07:00
|
|
|
/* Setting TX coalescing parameters */
|
|
|
|
if (coal->tx_coalesce_usecs != priv->tx_usecs ||
|
|
|
|
coal->tx_max_coalesced_frames != priv->tx_frames) {
|
|
|
|
priv->tx_usecs = coal->tx_coalesce_usecs;
|
|
|
|
priv->tx_frames = coal->tx_max_coalesced_frames;
|
|
|
|
}
|
|
|
|
|
2008-10-23 05:47:49 +07:00
|
|
|
/* Set adaptive coalescing params */
|
|
|
|
priv->pkt_rate_low = coal->pkt_rate_low;
|
|
|
|
priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
|
|
|
|
priv->pkt_rate_high = coal->pkt_rate_high;
|
|
|
|
priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
|
|
|
|
priv->sample_interval = coal->rate_sample_interval;
|
|
|
|
priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
|
2014-07-08 15:28:12 +07:00
|
|
|
priv->tx_work_limit = coal->tx_max_coalesced_frames_irq;
|
2008-10-23 05:47:49 +07:00
|
|
|
|
2012-12-02 10:49:22 +07:00
|
|
|
return mlx4_en_moderation_update(priv);
|
2008-10-23 05:47:49 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_set_pauseparam(struct net_device *dev,
|
|
|
|
struct ethtool_pauseparam *pause)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_en_dev *mdev = priv->mdev;
|
|
|
|
int err;
|
|
|
|
|
2014-09-08 23:46:53 +07:00
|
|
|
if (pause->autoneg)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2008-11-05 11:48:36 +07:00
|
|
|
priv->prof->tx_pause = pause->tx_pause != 0;
|
|
|
|
priv->prof->rx_pause = pause->rx_pause != 0;
|
2008-10-23 05:47:49 +07:00
|
|
|
err = mlx4_SET_PORT_general(mdev->dev, priv->port,
|
|
|
|
priv->rx_skb_size + ETH_FCS_LEN,
|
2008-11-05 11:48:36 +07:00
|
|
|
priv->prof->tx_pause,
|
|
|
|
priv->prof->tx_ppp,
|
|
|
|
priv->prof->rx_pause,
|
|
|
|
priv->prof->rx_ppp);
|
2008-10-23 05:47:49 +07:00
|
|
|
if (err)
|
2009-06-02 03:27:13 +07:00
|
|
|
en_err(priv, "Failed setting pause params\n");
|
2015-03-30 21:45:25 +07:00
|
|
|
else
|
|
|
|
mlx4_en_update_pfc_stats_bitmap(mdev->dev, &priv->stats_bitmap,
|
|
|
|
priv->prof->rx_ppp,
|
|
|
|
priv->prof->rx_pause,
|
|
|
|
priv->prof->tx_ppp,
|
|
|
|
priv->prof->tx_pause);
|
2008-10-23 05:47:49 +07:00
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mlx4_en_get_pauseparam(struct net_device *dev,
|
|
|
|
struct ethtool_pauseparam *pause)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
|
2008-11-05 11:48:36 +07:00
|
|
|
pause->tx_pause = priv->prof->tx_pause;
|
|
|
|
pause->rx_pause = priv->prof->rx_pause;
|
2008-10-23 05:47:49 +07:00
|
|
|
}
|
|
|
|
|
2008-12-30 09:39:20 +07:00
|
|
|
static int mlx4_en_set_ringparam(struct net_device *dev,
|
|
|
|
struct ethtool_ringparam *param)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_en_dev *mdev = priv->mdev;
|
|
|
|
u32 rx_size, tx_size;
|
|
|
|
int port_up = 0;
|
|
|
|
int err = 0;
|
|
|
|
|
|
|
|
if (param->rx_jumbo_pending || param->rx_mini_pending)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
rx_size = roundup_pow_of_two(param->rx_pending);
|
|
|
|
rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
|
2009-01-09 01:57:37 +07:00
|
|
|
rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE);
|
2008-12-30 09:39:20 +07:00
|
|
|
tx_size = roundup_pow_of_two(param->tx_pending);
|
|
|
|
tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
|
2009-01-09 01:57:37 +07:00
|
|
|
tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE);
|
2008-12-30 09:39:20 +07:00
|
|
|
|
2013-11-07 17:19:52 +07:00
|
|
|
if (rx_size == (priv->port_up ? priv->rx_ring[0]->actual_size :
|
|
|
|
priv->rx_ring[0]->size) &&
|
|
|
|
tx_size == priv->tx_ring[0]->size)
|
2008-12-30 09:39:20 +07:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
mutex_lock(&mdev->state_lock);
|
|
|
|
if (priv->port_up) {
|
|
|
|
port_up = 1;
|
2013-01-31 06:07:11 +07:00
|
|
|
mlx4_en_stop_port(dev, 1);
|
2008-12-30 09:39:20 +07:00
|
|
|
}
|
|
|
|
|
2011-10-09 12:26:46 +07:00
|
|
|
mlx4_en_free_resources(priv);
|
2008-12-30 09:39:20 +07:00
|
|
|
|
|
|
|
priv->prof->tx_ring_size = tx_size;
|
|
|
|
priv->prof->rx_ring_size = rx_size;
|
|
|
|
|
|
|
|
err = mlx4_en_alloc_resources(priv);
|
|
|
|
if (err) {
|
2009-06-02 03:27:13 +07:00
|
|
|
en_err(priv, "Failed reallocating port resources\n");
|
2008-12-30 09:39:20 +07:00
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
if (port_up) {
|
|
|
|
err = mlx4_en_start_port(dev);
|
|
|
|
if (err)
|
2009-06-02 03:27:13 +07:00
|
|
|
en_err(priv, "Failed starting port\n");
|
2008-12-30 09:39:20 +07:00
|
|
|
}
|
|
|
|
|
2012-12-02 10:49:22 +07:00
|
|
|
err = mlx4_en_moderation_update(priv);
|
2011-10-09 12:38:23 +07:00
|
|
|
|
2008-12-30 09:39:20 +07:00
|
|
|
out:
|
|
|
|
mutex_unlock(&mdev->state_lock);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2008-10-23 05:47:49 +07:00
|
|
|
static void mlx4_en_get_ringparam(struct net_device *dev,
|
|
|
|
struct ethtool_ringparam *param)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
|
|
|
|
memset(param, 0, sizeof(*param));
|
2009-01-09 01:57:37 +07:00
|
|
|
param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
|
|
|
|
param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
|
2010-08-24 10:46:34 +07:00
|
|
|
param->rx_pending = priv->port_up ?
|
2013-11-07 17:19:52 +07:00
|
|
|
priv->rx_ring[0]->actual_size : priv->rx_ring[0]->size;
|
|
|
|
param->tx_pending = priv->tx_ring[0]->size;
|
2008-10-23 05:47:49 +07:00
|
|
|
}
|
|
|
|
|
2012-01-18 05:54:55 +07:00
|
|
|
static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
|
|
|
|
return priv->rx_ring_num;
|
|
|
|
}
|
|
|
|
|
2014-11-16 21:23:16 +07:00
|
|
|
static u32 mlx4_en_get_rxfh_key_size(struct net_device *netdev)
|
|
|
|
{
|
|
|
|
return MLX4_EN_RSS_KEY_SIZE;
|
|
|
|
}
|
|
|
|
|
2014-12-02 23:12:11 +07:00
|
|
|
static int mlx4_en_check_rxfh_func(struct net_device *dev, u8 hfunc)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
|
|
|
|
/* check if requested function is supported by the device */
|
2015-04-27 17:40:56 +07:00
|
|
|
if (hfunc == ETH_RSS_HASH_TOP) {
|
|
|
|
if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP))
|
|
|
|
return -EINVAL;
|
|
|
|
if (!(dev->features & NETIF_F_RXHASH))
|
|
|
|
en_warn(priv, "Toeplitz hash function should be used in conjunction with RX hashing for optimal performance\n");
|
|
|
|
return 0;
|
|
|
|
} else if (hfunc == ETH_RSS_HASH_XOR) {
|
|
|
|
if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR))
|
|
|
|
return -EINVAL;
|
|
|
|
if (dev->features & NETIF_F_RXHASH)
|
|
|
|
en_warn(priv, "Enabling both XOR Hash function and RX Hashing can limit RPS functionality\n");
|
|
|
|
return 0;
|
|
|
|
}
|
2014-12-02 23:12:11 +07:00
|
|
|
|
2015-04-27 17:40:56 +07:00
|
|
|
return -EINVAL;
|
2014-12-02 23:12:11 +07:00
|
|
|
}
|
|
|
|
|
2014-12-02 23:12:10 +07:00
|
|
|
static int mlx4_en_get_rxfh(struct net_device *dev, u32 *ring_index, u8 *key,
|
|
|
|
u8 *hfunc)
|
2012-01-18 05:54:55 +07:00
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_en_rss_map *rss_map = &priv->rss_map;
|
|
|
|
int rss_rings;
|
|
|
|
size_t n = priv->rx_ring_num;
|
|
|
|
int err = 0;
|
|
|
|
|
|
|
|
rss_rings = priv->prof->rss_rings ?: priv->rx_ring_num;
|
2014-10-27 16:37:47 +07:00
|
|
|
rss_rings = 1 << ilog2(rss_rings);
|
2012-01-18 05:54:55 +07:00
|
|
|
|
|
|
|
while (n--) {
|
2014-12-02 23:12:10 +07:00
|
|
|
if (!ring_index)
|
|
|
|
break;
|
2012-01-18 05:54:55 +07:00
|
|
|
ring_index[n] = rss_map->qps[n % rss_rings].qpn -
|
|
|
|
rss_map->base_qpn;
|
|
|
|
}
|
2014-11-16 21:23:16 +07:00
|
|
|
if (key)
|
2014-11-23 08:24:19 +07:00
|
|
|
memcpy(key, priv->rss_key, MLX4_EN_RSS_KEY_SIZE);
|
2014-12-02 23:12:10 +07:00
|
|
|
if (hfunc)
|
2014-12-02 23:12:11 +07:00
|
|
|
*hfunc = priv->rss_hash_fn;
|
2012-01-18 05:54:55 +07:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2014-05-15 07:25:27 +07:00
|
|
|
static int mlx4_en_set_rxfh(struct net_device *dev, const u32 *ring_index,
|
2014-12-02 23:12:10 +07:00
|
|
|
const u8 *key, const u8 hfunc)
|
2012-01-18 05:54:55 +07:00
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_en_dev *mdev = priv->mdev;
|
|
|
|
int port_up = 0;
|
|
|
|
int err = 0;
|
|
|
|
int i;
|
|
|
|
int rss_rings = 0;
|
|
|
|
|
|
|
|
/* Calculate RSS table size and make sure flows are spread evenly
|
|
|
|
* between rings
|
|
|
|
*/
|
|
|
|
for (i = 0; i < priv->rx_ring_num; i++) {
|
2014-11-23 08:24:19 +07:00
|
|
|
if (!ring_index)
|
|
|
|
continue;
|
2012-01-18 05:54:55 +07:00
|
|
|
if (i > 0 && !ring_index[i] && !rss_rings)
|
|
|
|
rss_rings = i;
|
|
|
|
|
|
|
|
if (ring_index[i] != (i % (rss_rings ?: priv->rx_ring_num)))
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!rss_rings)
|
|
|
|
rss_rings = priv->rx_ring_num;
|
|
|
|
|
|
|
|
/* RSS table size must be an order of 2 */
|
|
|
|
if (!is_power_of_2(rss_rings))
|
|
|
|
return -EINVAL;
|
|
|
|
|
2014-12-02 23:12:11 +07:00
|
|
|
if (hfunc != ETH_RSS_HASH_NO_CHANGE) {
|
|
|
|
err = mlx4_en_check_rxfh_func(dev, hfunc);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2012-01-18 05:54:55 +07:00
|
|
|
mutex_lock(&mdev->state_lock);
|
|
|
|
if (priv->port_up) {
|
|
|
|
port_up = 1;
|
2013-01-31 06:07:11 +07:00
|
|
|
mlx4_en_stop_port(dev, 1);
|
2012-01-18 05:54:55 +07:00
|
|
|
}
|
|
|
|
|
2014-11-23 08:24:19 +07:00
|
|
|
if (ring_index)
|
|
|
|
priv->prof->rss_rings = rss_rings;
|
|
|
|
if (key)
|
|
|
|
memcpy(priv->rss_key, key, MLX4_EN_RSS_KEY_SIZE);
|
2015-04-27 17:40:56 +07:00
|
|
|
if (hfunc != ETH_RSS_HASH_NO_CHANGE)
|
|
|
|
priv->rss_hash_fn = hfunc;
|
2014-12-02 23:12:11 +07:00
|
|
|
|
2012-01-18 05:54:55 +07:00
|
|
|
if (port_up) {
|
|
|
|
err = mlx4_en_start_port(dev);
|
|
|
|
if (err)
|
|
|
|
en_err(priv, "Failed starting port\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_unlock(&mdev->state_lock);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2012-07-05 11:03:49 +07:00
|
|
|
#define all_zeros_or_all_ones(field) \
|
|
|
|
((field) == 0 || (field) == (__force typeof(field))-1)
|
|
|
|
|
|
|
|
static int mlx4_en_validate_flow(struct net_device *dev,
|
|
|
|
struct ethtool_rxnfc *cmd)
|
|
|
|
{
|
|
|
|
struct ethtool_usrip4_spec *l3_mask;
|
|
|
|
struct ethtool_tcpip4_spec *l4_mask;
|
|
|
|
struct ethhdr *eth_mask;
|
|
|
|
|
|
|
|
if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2012-12-12 09:13:19 +07:00
|
|
|
if (cmd->fs.flow_type & FLOW_MAC_EXT) {
|
|
|
|
/* dest mac mask must be ff:ff:ff:ff:ff:ff */
|
|
|
|
if (!is_broadcast_ether_addr(cmd->fs.m_ext.h_dest))
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
|
2012-07-05 11:03:49 +07:00
|
|
|
case TCP_V4_FLOW:
|
|
|
|
case UDP_V4_FLOW:
|
|
|
|
if (cmd->fs.m_u.tcp_ip4_spec.tos)
|
|
|
|
return -EINVAL;
|
|
|
|
l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
|
|
|
|
/* don't allow mask which isn't all 0 or 1 */
|
|
|
|
if (!all_zeros_or_all_ones(l4_mask->ip4src) ||
|
|
|
|
!all_zeros_or_all_ones(l4_mask->ip4dst) ||
|
|
|
|
!all_zeros_or_all_ones(l4_mask->psrc) ||
|
|
|
|
!all_zeros_or_all_ones(l4_mask->pdst))
|
|
|
|
return -EINVAL;
|
|
|
|
break;
|
|
|
|
case IP_USER_FLOW:
|
|
|
|
l3_mask = &cmd->fs.m_u.usr_ip4_spec;
|
|
|
|
if (l3_mask->l4_4_bytes || l3_mask->tos || l3_mask->proto ||
|
|
|
|
cmd->fs.h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4 ||
|
|
|
|
(!l3_mask->ip4src && !l3_mask->ip4dst) ||
|
|
|
|
!all_zeros_or_all_ones(l3_mask->ip4src) ||
|
|
|
|
!all_zeros_or_all_ones(l3_mask->ip4dst))
|
|
|
|
return -EINVAL;
|
|
|
|
break;
|
|
|
|
case ETHER_FLOW:
|
|
|
|
eth_mask = &cmd->fs.m_u.ether_spec;
|
|
|
|
/* source mac mask must not be set */
|
2012-12-12 09:13:18 +07:00
|
|
|
if (!is_zero_ether_addr(eth_mask->h_source))
|
2012-07-05 11:03:49 +07:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* dest mac mask must be ff:ff:ff:ff:ff:ff */
|
2012-12-12 09:13:18 +07:00
|
|
|
if (!is_broadcast_ether_addr(eth_mask->h_dest))
|
2012-07-05 11:03:49 +07:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!all_zeros_or_all_ones(eth_mask->h_proto))
|
|
|
|
return -EINVAL;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((cmd->fs.flow_type & FLOW_EXT)) {
|
|
|
|
if (cmd->fs.m_ext.vlan_etype ||
|
2013-01-31 06:07:06 +07:00
|
|
|
!((cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
|
|
|
|
0 ||
|
|
|
|
(cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
|
|
|
|
cpu_to_be16(VLAN_VID_MASK)))
|
2012-07-05 11:03:49 +07:00
|
|
|
return -EINVAL;
|
2013-01-31 06:07:06 +07:00
|
|
|
|
2013-01-31 06:07:05 +07:00
|
|
|
if (cmd->fs.m_ext.vlan_tci) {
|
|
|
|
if (be16_to_cpu(cmd->fs.h_ext.vlan_tci) >= VLAN_N_VID)
|
|
|
|
return -EINVAL;
|
2013-01-31 06:07:06 +07:00
|
|
|
|
2013-01-31 06:07:05 +07:00
|
|
|
}
|
2012-07-05 11:03:49 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-01-31 06:07:04 +07:00
|
|
|
static int mlx4_en_ethtool_add_mac_rule(struct ethtool_rxnfc *cmd,
|
|
|
|
struct list_head *rule_list_h,
|
|
|
|
struct mlx4_spec_list *spec_l2,
|
|
|
|
unsigned char *mac)
|
|
|
|
{
|
|
|
|
int err = 0;
|
|
|
|
__be64 mac_msk = cpu_to_be64(MLX4_MAC_MASK << 16);
|
|
|
|
|
|
|
|
spec_l2->id = MLX4_NET_TRANS_RULE_ID_ETH;
|
|
|
|
memcpy(spec_l2->eth.dst_mac_msk, &mac_msk, ETH_ALEN);
|
|
|
|
memcpy(spec_l2->eth.dst_mac, mac, ETH_ALEN);
|
|
|
|
|
2013-01-31 06:07:06 +07:00
|
|
|
if ((cmd->fs.flow_type & FLOW_EXT) &&
|
|
|
|
(cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK))) {
|
2013-01-31 06:07:04 +07:00
|
|
|
spec_l2->eth.vlan_id = cmd->fs.h_ext.vlan_tci;
|
2013-01-31 06:07:06 +07:00
|
|
|
spec_l2->eth.vlan_id_msk = cpu_to_be16(VLAN_VID_MASK);
|
2013-01-31 06:07:04 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
list_add_tail(&spec_l2->list, rule_list_h);
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_ethtool_add_mac_rule_by_ipv4(struct mlx4_en_priv *priv,
|
|
|
|
struct ethtool_rxnfc *cmd,
|
|
|
|
struct list_head *rule_list_h,
|
|
|
|
struct mlx4_spec_list *spec_l2,
|
|
|
|
__be32 ipv4_dst)
|
|
|
|
{
|
2013-02-04 10:01:21 +07:00
|
|
|
#ifdef CONFIG_INET
|
2013-01-31 06:07:04 +07:00
|
|
|
unsigned char mac[ETH_ALEN];
|
|
|
|
|
|
|
|
if (!ipv4_is_multicast(ipv4_dst)) {
|
2013-02-07 09:25:20 +07:00
|
|
|
if (cmd->fs.flow_type & FLOW_MAC_EXT)
|
2013-01-31 06:07:04 +07:00
|
|
|
memcpy(&mac, cmd->fs.h_ext.h_dest, ETH_ALEN);
|
2013-02-07 09:25:20 +07:00
|
|
|
else
|
|
|
|
memcpy(&mac, priv->dev->dev_addr, ETH_ALEN);
|
2013-01-31 06:07:04 +07:00
|
|
|
} else {
|
|
|
|
ip_eth_mc_map(ipv4_dst, mac);
|
|
|
|
}
|
|
|
|
|
|
|
|
return mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2, &mac[0]);
|
2013-02-04 10:01:21 +07:00
|
|
|
#else
|
|
|
|
return -EINVAL;
|
|
|
|
#endif
|
2013-01-31 06:07:04 +07:00
|
|
|
}
|
|
|
|
|
2012-07-05 11:03:49 +07:00
|
|
|
static int add_ip_rule(struct mlx4_en_priv *priv,
|
2013-01-31 06:07:04 +07:00
|
|
|
struct ethtool_rxnfc *cmd,
|
|
|
|
struct list_head *list_h)
|
2012-07-05 11:03:49 +07:00
|
|
|
{
|
2013-02-04 10:01:20 +07:00
|
|
|
int err;
|
2013-01-31 06:07:04 +07:00
|
|
|
struct mlx4_spec_list *spec_l2 = NULL;
|
|
|
|
struct mlx4_spec_list *spec_l3 = NULL;
|
2012-07-05 11:03:49 +07:00
|
|
|
struct ethtool_usrip4_spec *l3_mask = &cmd->fs.m_u.usr_ip4_spec;
|
|
|
|
|
2013-01-31 06:07:04 +07:00
|
|
|
spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
|
|
|
|
spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
|
|
|
|
if (!spec_l2 || !spec_l3) {
|
2013-02-04 10:01:20 +07:00
|
|
|
err = -ENOMEM;
|
|
|
|
goto free_spec;
|
2012-07-05 11:03:49 +07:00
|
|
|
}
|
|
|
|
|
2013-02-04 10:01:20 +07:00
|
|
|
err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h, spec_l2,
|
|
|
|
cmd->fs.h_u.
|
|
|
|
usr_ip4_spec.ip4dst);
|
|
|
|
if (err)
|
|
|
|
goto free_spec;
|
2012-07-05 11:03:49 +07:00
|
|
|
spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
|
|
|
|
spec_l3->ipv4.src_ip = cmd->fs.h_u.usr_ip4_spec.ip4src;
|
|
|
|
if (l3_mask->ip4src)
|
|
|
|
spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
|
|
|
|
spec_l3->ipv4.dst_ip = cmd->fs.h_u.usr_ip4_spec.ip4dst;
|
|
|
|
if (l3_mask->ip4dst)
|
|
|
|
spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
|
|
|
|
list_add_tail(&spec_l3->list, list_h);
|
|
|
|
|
|
|
|
return 0;
|
2013-02-04 10:01:20 +07:00
|
|
|
|
|
|
|
free_spec:
|
|
|
|
kfree(spec_l2);
|
|
|
|
kfree(spec_l3);
|
|
|
|
return err;
|
2012-07-05 11:03:49 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int add_tcp_udp_rule(struct mlx4_en_priv *priv,
|
|
|
|
struct ethtool_rxnfc *cmd,
|
|
|
|
struct list_head *list_h, int proto)
|
|
|
|
{
|
2013-02-04 10:01:20 +07:00
|
|
|
int err;
|
2013-01-31 06:07:04 +07:00
|
|
|
struct mlx4_spec_list *spec_l2 = NULL;
|
|
|
|
struct mlx4_spec_list *spec_l3 = NULL;
|
|
|
|
struct mlx4_spec_list *spec_l4 = NULL;
|
2012-07-05 11:03:49 +07:00
|
|
|
struct ethtool_tcpip4_spec *l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
|
|
|
|
|
2013-01-31 06:07:04 +07:00
|
|
|
spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
|
|
|
|
spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
|
|
|
|
spec_l4 = kzalloc(sizeof(*spec_l4), GFP_KERNEL);
|
|
|
|
if (!spec_l2 || !spec_l3 || !spec_l4) {
|
2013-02-04 10:01:20 +07:00
|
|
|
err = -ENOMEM;
|
|
|
|
goto free_spec;
|
2012-07-05 11:03:49 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
|
|
|
|
|
|
|
|
if (proto == TCP_V4_FLOW) {
|
2013-02-04 10:01:20 +07:00
|
|
|
err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
|
|
|
|
spec_l2,
|
|
|
|
cmd->fs.h_u.
|
|
|
|
tcp_ip4_spec.ip4dst);
|
|
|
|
if (err)
|
|
|
|
goto free_spec;
|
2012-07-05 11:03:49 +07:00
|
|
|
spec_l4->id = MLX4_NET_TRANS_RULE_ID_TCP;
|
|
|
|
spec_l3->ipv4.src_ip = cmd->fs.h_u.tcp_ip4_spec.ip4src;
|
|
|
|
spec_l3->ipv4.dst_ip = cmd->fs.h_u.tcp_ip4_spec.ip4dst;
|
|
|
|
spec_l4->tcp_udp.src_port = cmd->fs.h_u.tcp_ip4_spec.psrc;
|
|
|
|
spec_l4->tcp_udp.dst_port = cmd->fs.h_u.tcp_ip4_spec.pdst;
|
|
|
|
} else {
|
2013-02-04 10:01:20 +07:00
|
|
|
err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
|
|
|
|
spec_l2,
|
|
|
|
cmd->fs.h_u.
|
|
|
|
udp_ip4_spec.ip4dst);
|
|
|
|
if (err)
|
|
|
|
goto free_spec;
|
2012-07-05 11:03:49 +07:00
|
|
|
spec_l4->id = MLX4_NET_TRANS_RULE_ID_UDP;
|
|
|
|
spec_l3->ipv4.src_ip = cmd->fs.h_u.udp_ip4_spec.ip4src;
|
|
|
|
spec_l3->ipv4.dst_ip = cmd->fs.h_u.udp_ip4_spec.ip4dst;
|
|
|
|
spec_l4->tcp_udp.src_port = cmd->fs.h_u.udp_ip4_spec.psrc;
|
|
|
|
spec_l4->tcp_udp.dst_port = cmd->fs.h_u.udp_ip4_spec.pdst;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (l4_mask->ip4src)
|
|
|
|
spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
|
|
|
|
if (l4_mask->ip4dst)
|
|
|
|
spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
|
|
|
|
|
|
|
|
if (l4_mask->psrc)
|
|
|
|
spec_l4->tcp_udp.src_port_msk = EN_ETHTOOL_SHORT_MASK;
|
|
|
|
if (l4_mask->pdst)
|
|
|
|
spec_l4->tcp_udp.dst_port_msk = EN_ETHTOOL_SHORT_MASK;
|
|
|
|
|
|
|
|
list_add_tail(&spec_l3->list, list_h);
|
|
|
|
list_add_tail(&spec_l4->list, list_h);
|
|
|
|
|
|
|
|
return 0;
|
2013-02-04 10:01:20 +07:00
|
|
|
|
|
|
|
free_spec:
|
|
|
|
kfree(spec_l2);
|
|
|
|
kfree(spec_l3);
|
|
|
|
kfree(spec_l4);
|
|
|
|
return err;
|
2012-07-05 11:03:49 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_ethtool_to_net_trans_rule(struct net_device *dev,
|
|
|
|
struct ethtool_rxnfc *cmd,
|
|
|
|
struct list_head *rule_list_h)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
struct ethhdr *eth_spec;
|
|
|
|
struct mlx4_spec_list *spec_l2;
|
2013-01-31 06:07:04 +07:00
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
2012-07-05 11:03:49 +07:00
|
|
|
|
|
|
|
err = mlx4_en_validate_flow(dev, cmd);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
2012-12-12 09:13:19 +07:00
|
|
|
switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
|
2012-07-05 11:03:49 +07:00
|
|
|
case ETHER_FLOW:
|
2013-01-31 06:07:04 +07:00
|
|
|
spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
|
|
|
|
if (!spec_l2)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2012-07-05 11:03:49 +07:00
|
|
|
eth_spec = &cmd->fs.h_u.ether_spec;
|
2013-01-31 06:07:04 +07:00
|
|
|
mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2,
|
|
|
|
ð_spec->h_dest[0]);
|
2012-07-05 11:03:49 +07:00
|
|
|
spec_l2->eth.ether_type = eth_spec->h_proto;
|
|
|
|
if (eth_spec->h_proto)
|
|
|
|
spec_l2->eth.ether_type_enable = 1;
|
|
|
|
break;
|
|
|
|
case IP_USER_FLOW:
|
|
|
|
err = add_ip_rule(priv, cmd, rule_list_h);
|
|
|
|
break;
|
|
|
|
case TCP_V4_FLOW:
|
|
|
|
err = add_tcp_udp_rule(priv, cmd, rule_list_h, TCP_V4_FLOW);
|
|
|
|
break;
|
|
|
|
case UDP_V4_FLOW:
|
|
|
|
err = add_tcp_udp_rule(priv, cmd, rule_list_h, UDP_V4_FLOW);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_flow_replace(struct net_device *dev,
|
|
|
|
struct ethtool_rxnfc *cmd)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct ethtool_flow_id *loc_rule;
|
|
|
|
struct mlx4_spec_list *spec, *tmp_spec;
|
|
|
|
u32 qpn;
|
|
|
|
u64 reg_id;
|
|
|
|
|
|
|
|
struct mlx4_net_trans_rule rule = {
|
|
|
|
.queue_mode = MLX4_NET_TRANS_Q_FIFO,
|
|
|
|
.exclusive = 0,
|
|
|
|
.allow_loopback = 1,
|
2013-04-24 20:58:45 +07:00
|
|
|
.promisc_mode = MLX4_FS_REGULAR,
|
2012-07-05 11:03:49 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
rule.port = priv->port;
|
|
|
|
rule.priority = MLX4_DOMAIN_ETHTOOL | cmd->fs.location;
|
|
|
|
INIT_LIST_HEAD(&rule.list);
|
|
|
|
|
|
|
|
/* Allow direct QP attaches if the EN_ETHTOOL_QP_ATTACH flag is set */
|
|
|
|
if (cmd->fs.ring_cookie == RX_CLS_FLOW_DISC)
|
2012-07-05 11:03:50 +07:00
|
|
|
qpn = priv->drop_qp.qpn;
|
2012-07-05 11:03:49 +07:00
|
|
|
else if (cmd->fs.ring_cookie & EN_ETHTOOL_QP_ATTACH) {
|
|
|
|
qpn = cmd->fs.ring_cookie & (EN_ETHTOOL_QP_ATTACH - 1);
|
|
|
|
} else {
|
|
|
|
if (cmd->fs.ring_cookie >= priv->rx_ring_num) {
|
2014-05-08 02:52:57 +07:00
|
|
|
en_warn(priv, "rxnfc: RX ring (%llu) doesn't exist\n",
|
2012-07-05 11:03:49 +07:00
|
|
|
cmd->fs.ring_cookie);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
qpn = priv->rss_map.qps[cmd->fs.ring_cookie].qpn;
|
|
|
|
if (!qpn) {
|
2014-05-08 02:52:57 +07:00
|
|
|
en_warn(priv, "rxnfc: RX ring (%llu) is inactive\n",
|
2012-07-05 11:03:49 +07:00
|
|
|
cmd->fs.ring_cookie);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
rule.qpn = qpn;
|
|
|
|
err = mlx4_en_ethtool_to_net_trans_rule(dev, cmd, &rule.list);
|
|
|
|
if (err)
|
|
|
|
goto out_free_list;
|
|
|
|
|
|
|
|
loc_rule = &priv->ethtool_rules[cmd->fs.location];
|
|
|
|
if (loc_rule->id) {
|
|
|
|
err = mlx4_flow_detach(priv->mdev->dev, loc_rule->id);
|
|
|
|
if (err) {
|
|
|
|
en_err(priv, "Fail to detach network rule at location %d. registration id = %llx\n",
|
|
|
|
cmd->fs.location, loc_rule->id);
|
|
|
|
goto out_free_list;
|
|
|
|
}
|
|
|
|
loc_rule->id = 0;
|
|
|
|
memset(&loc_rule->flow_spec, 0,
|
|
|
|
sizeof(struct ethtool_rx_flow_spec));
|
2013-01-31 06:07:08 +07:00
|
|
|
list_del(&loc_rule->list);
|
2012-07-05 11:03:49 +07:00
|
|
|
}
|
|
|
|
err = mlx4_flow_attach(priv->mdev->dev, &rule, ®_id);
|
|
|
|
if (err) {
|
2014-05-08 02:52:57 +07:00
|
|
|
en_err(priv, "Fail to attach network rule at location %d\n",
|
2012-07-05 11:03:49 +07:00
|
|
|
cmd->fs.location);
|
|
|
|
goto out_free_list;
|
|
|
|
}
|
|
|
|
loc_rule->id = reg_id;
|
|
|
|
memcpy(&loc_rule->flow_spec, &cmd->fs,
|
|
|
|
sizeof(struct ethtool_rx_flow_spec));
|
2013-01-31 06:07:08 +07:00
|
|
|
list_add_tail(&loc_rule->list, &priv->ethtool_list);
|
2012-07-05 11:03:49 +07:00
|
|
|
|
|
|
|
out_free_list:
|
|
|
|
list_for_each_entry_safe(spec, tmp_spec, &rule.list, list) {
|
|
|
|
list_del(&spec->list);
|
|
|
|
kfree(spec);
|
|
|
|
}
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_flow_detach(struct net_device *dev,
|
|
|
|
struct ethtool_rxnfc *cmd)
|
|
|
|
{
|
|
|
|
int err = 0;
|
|
|
|
struct ethtool_flow_id *rule;
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
|
|
|
|
if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
rule = &priv->ethtool_rules[cmd->fs.location];
|
|
|
|
if (!rule->id) {
|
|
|
|
err = -ENOENT;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = mlx4_flow_detach(priv->mdev->dev, rule->id);
|
|
|
|
if (err) {
|
|
|
|
en_err(priv, "Fail to detach network rule at location %d. registration id = 0x%llx\n",
|
|
|
|
cmd->fs.location, rule->id);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
rule->id = 0;
|
|
|
|
memset(&rule->flow_spec, 0, sizeof(struct ethtool_rx_flow_spec));
|
2013-01-31 06:07:08 +07:00
|
|
|
list_del(&rule->list);
|
2012-07-05 11:03:49 +07:00
|
|
|
out:
|
|
|
|
return err;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_get_flow(struct net_device *dev, struct ethtool_rxnfc *cmd,
|
|
|
|
int loc)
|
|
|
|
{
|
|
|
|
int err = 0;
|
|
|
|
struct ethtool_flow_id *rule;
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
|
|
|
|
if (loc < 0 || loc >= MAX_NUM_OF_FS_RULES)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
rule = &priv->ethtool_rules[loc];
|
|
|
|
if (rule->id)
|
|
|
|
memcpy(&cmd->fs, &rule->flow_spec,
|
|
|
|
sizeof(struct ethtool_rx_flow_spec));
|
|
|
|
else
|
|
|
|
err = -ENOENT;
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_get_num_flows(struct mlx4_en_priv *priv)
|
|
|
|
{
|
|
|
|
|
|
|
|
int i, res = 0;
|
|
|
|
for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) {
|
|
|
|
if (priv->ethtool_rules[i].id)
|
|
|
|
res++;
|
|
|
|
}
|
|
|
|
return res;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2012-01-18 05:54:55 +07:00
|
|
|
static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
|
|
|
|
u32 *rule_locs)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
2012-07-05 11:03:49 +07:00
|
|
|
struct mlx4_en_dev *mdev = priv->mdev;
|
2012-01-18 05:54:55 +07:00
|
|
|
int err = 0;
|
2012-07-05 11:03:49 +07:00
|
|
|
int i = 0, priority = 0;
|
|
|
|
|
|
|
|
if ((cmd->cmd == ETHTOOL_GRXCLSRLCNT ||
|
|
|
|
cmd->cmd == ETHTOOL_GRXCLSRULE ||
|
|
|
|
cmd->cmd == ETHTOOL_GRXCLSRLALL) &&
|
2013-01-31 06:07:07 +07:00
|
|
|
(mdev->dev->caps.steering_mode !=
|
|
|
|
MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up))
|
2012-07-05 11:03:49 +07:00
|
|
|
return -EINVAL;
|
2012-01-18 05:54:55 +07:00
|
|
|
|
|
|
|
switch (cmd->cmd) {
|
|
|
|
case ETHTOOL_GRXRINGS:
|
|
|
|
cmd->data = priv->rx_ring_num;
|
|
|
|
break;
|
2012-07-05 11:03:49 +07:00
|
|
|
case ETHTOOL_GRXCLSRLCNT:
|
|
|
|
cmd->rule_cnt = mlx4_en_get_num_flows(priv);
|
|
|
|
break;
|
|
|
|
case ETHTOOL_GRXCLSRULE:
|
|
|
|
err = mlx4_en_get_flow(dev, cmd, cmd->fs.location);
|
|
|
|
break;
|
|
|
|
case ETHTOOL_GRXCLSRLALL:
|
|
|
|
while ((!err || err == -ENOENT) && priority < cmd->rule_cnt) {
|
|
|
|
err = mlx4_en_get_flow(dev, cmd, i);
|
|
|
|
if (!err)
|
|
|
|
rule_locs[priority++] = i;
|
|
|
|
i++;
|
|
|
|
}
|
|
|
|
err = 0;
|
|
|
|
break;
|
2012-01-18 05:54:55 +07:00
|
|
|
default:
|
|
|
|
err = -EOPNOTSUPP;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2012-07-05 11:03:49 +07:00
|
|
|
static int mlx4_en_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
|
|
|
|
{
|
|
|
|
int err = 0;
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_en_dev *mdev = priv->mdev;
|
|
|
|
|
2013-01-31 06:07:07 +07:00
|
|
|
if (mdev->dev->caps.steering_mode !=
|
|
|
|
MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up)
|
2012-07-05 11:03:49 +07:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
switch (cmd->cmd) {
|
|
|
|
case ETHTOOL_SRXCLSRLINS:
|
|
|
|
err = mlx4_en_flow_replace(dev, cmd);
|
|
|
|
break;
|
|
|
|
case ETHTOOL_SRXCLSRLDEL:
|
|
|
|
err = mlx4_en_flow_detach(dev, cmd);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
en_warn(priv, "Unsupported ethtool command. (%d)\n", cmd->cmd);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2012-12-02 10:49:23 +07:00
|
|
|
static void mlx4_en_get_channels(struct net_device *dev,
|
|
|
|
struct ethtool_channels *channel)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
|
|
|
|
memset(channel, 0, sizeof(*channel));
|
|
|
|
|
|
|
|
channel->max_rx = MAX_RX_RINGS;
|
|
|
|
channel->max_tx = MLX4_EN_MAX_TX_RING_P_UP;
|
|
|
|
|
|
|
|
channel->rx_count = priv->rx_ring_num;
|
|
|
|
channel->tx_count = priv->tx_ring_num / MLX4_EN_NUM_UP;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_set_channels(struct net_device *dev,
|
|
|
|
struct ethtool_channels *channel)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_en_dev *mdev = priv->mdev;
|
2014-05-18 04:52:03 +07:00
|
|
|
int port_up = 0;
|
2012-12-02 10:49:23 +07:00
|
|
|
int err = 0;
|
|
|
|
|
|
|
|
if (channel->other_count || channel->combined_count ||
|
|
|
|
channel->tx_count > MLX4_EN_MAX_TX_RING_P_UP ||
|
|
|
|
channel->rx_count > MAX_RX_RINGS ||
|
|
|
|
!channel->tx_count || !channel->rx_count)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
mutex_lock(&mdev->state_lock);
|
|
|
|
if (priv->port_up) {
|
|
|
|
port_up = 1;
|
2013-01-31 06:07:11 +07:00
|
|
|
mlx4_en_stop_port(dev, 1);
|
2012-12-02 10:49:23 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
mlx4_en_free_resources(priv);
|
|
|
|
|
|
|
|
priv->num_tx_rings_p_up = channel->tx_count;
|
|
|
|
priv->tx_ring_num = channel->tx_count * MLX4_EN_NUM_UP;
|
|
|
|
priv->rx_ring_num = channel->rx_count;
|
|
|
|
|
|
|
|
err = mlx4_en_alloc_resources(priv);
|
|
|
|
if (err) {
|
|
|
|
en_err(priv, "Failed reallocating port resources\n");
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
|
|
|
|
netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
|
|
|
|
|
2014-05-14 16:15:11 +07:00
|
|
|
if (dev->num_tc)
|
|
|
|
mlx4_en_setup_tc(dev, MLX4_EN_NUM_UP);
|
2012-12-02 10:49:23 +07:00
|
|
|
|
|
|
|
en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num);
|
|
|
|
en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num);
|
|
|
|
|
|
|
|
if (port_up) {
|
|
|
|
err = mlx4_en_start_port(dev);
|
|
|
|
if (err)
|
|
|
|
en_err(priv, "Failed starting port\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
err = mlx4_en_moderation_update(priv);
|
|
|
|
|
|
|
|
out:
|
|
|
|
mutex_unlock(&mdev->state_lock);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2013-04-23 13:06:49 +07:00
|
|
|
static int mlx4_en_get_ts_info(struct net_device *dev,
|
|
|
|
struct ethtool_ts_info *info)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_en_dev *mdev = priv->mdev;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = ethtool_op_get_ts_info(dev, info);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) {
|
|
|
|
info->so_timestamping |=
|
|
|
|
SOF_TIMESTAMPING_TX_HARDWARE |
|
|
|
|
SOF_TIMESTAMPING_RX_HARDWARE |
|
|
|
|
SOF_TIMESTAMPING_RAW_HARDWARE;
|
|
|
|
|
|
|
|
info->tx_types =
|
|
|
|
(1 << HWTSTAMP_TX_OFF) |
|
|
|
|
(1 << HWTSTAMP_TX_ON);
|
|
|
|
|
|
|
|
info->rx_filters =
|
|
|
|
(1 << HWTSTAMP_FILTER_NONE) |
|
|
|
|
(1 << HWTSTAMP_FILTER_ALL);
|
2014-01-01 00:39:39 +07:00
|
|
|
|
|
|
|
if (mdev->ptp_clock)
|
|
|
|
info->phc_index = ptp_clock_index(mdev->ptp_clock);
|
2013-04-23 13:06:49 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-07-24 13:11:46 +07:00
|
|
|
static int mlx4_en_set_priv_flags(struct net_device *dev, u32 flags)
|
2014-07-22 19:44:10 +07:00
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
bool bf_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
|
|
|
|
bool bf_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (bf_enabled_new == bf_enabled_old)
|
|
|
|
return 0; /* Nothing to do */
|
|
|
|
|
|
|
|
if (bf_enabled_new) {
|
|
|
|
bool bf_supported = true;
|
|
|
|
|
|
|
|
for (i = 0; i < priv->tx_ring_num; i++)
|
|
|
|
bf_supported &= priv->tx_ring[i]->bf_alloced;
|
|
|
|
|
|
|
|
if (!bf_supported) {
|
|
|
|
en_err(priv, "BlueFlame is not supported\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
priv->pflags |= MLX4_EN_PRIV_FLAGS_BLUEFLAME;
|
|
|
|
} else {
|
|
|
|
priv->pflags &= ~MLX4_EN_PRIV_FLAGS_BLUEFLAME;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < priv->tx_ring_num; i++)
|
|
|
|
priv->tx_ring[i]->bf_enabled = bf_enabled_new;
|
|
|
|
|
|
|
|
en_info(priv, "BlueFlame %s\n",
|
|
|
|
bf_enabled_new ? "Enabled" : "Disabled");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-07-24 13:11:46 +07:00
|
|
|
static u32 mlx4_en_get_priv_flags(struct net_device *dev)
|
2014-07-22 19:44:10 +07:00
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
|
|
|
|
return priv->pflags;
|
|
|
|
}
|
|
|
|
|
2014-10-05 16:35:22 +07:00
|
|
|
static int mlx4_en_get_tunable(struct net_device *dev,
|
|
|
|
const struct ethtool_tunable *tuna,
|
|
|
|
void *data)
|
|
|
|
{
|
|
|
|
const struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
switch (tuna->id) {
|
|
|
|
case ETHTOOL_TX_COPYBREAK:
|
|
|
|
*(u32 *)data = priv->prof->inline_thold;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_set_tunable(struct net_device *dev,
|
|
|
|
const struct ethtool_tunable *tuna,
|
|
|
|
const void *data)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
int val, ret = 0;
|
|
|
|
|
|
|
|
switch (tuna->id) {
|
|
|
|
case ETHTOOL_TX_COPYBREAK:
|
|
|
|
val = *(u32 *)data;
|
|
|
|
if (val < MIN_PKT_LEN || val > MAX_INLINE)
|
|
|
|
ret = -EINVAL;
|
|
|
|
else
|
|
|
|
priv->prof->inline_thold = val;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-10-27 16:37:36 +07:00
|
|
|
static int mlx4_en_get_module_info(struct net_device *dev,
|
|
|
|
struct ethtool_modinfo *modinfo)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_en_dev *mdev = priv->mdev;
|
|
|
|
int ret;
|
|
|
|
u8 data[4];
|
|
|
|
|
|
|
|
/* Read first 2 bytes to get Module & REV ID */
|
|
|
|
ret = mlx4_get_module_info(mdev->dev, priv->port,
|
|
|
|
0/*offset*/, 2/*size*/, data);
|
|
|
|
if (ret < 2)
|
|
|
|
return -EIO;
|
|
|
|
|
|
|
|
switch (data[0] /* identifier */) {
|
|
|
|
case MLX4_MODULE_ID_QSFP:
|
|
|
|
modinfo->type = ETH_MODULE_SFF_8436;
|
|
|
|
modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
|
|
|
|
break;
|
|
|
|
case MLX4_MODULE_ID_QSFP_PLUS:
|
|
|
|
if (data[1] >= 0x3) { /* revision id */
|
|
|
|
modinfo->type = ETH_MODULE_SFF_8636;
|
|
|
|
modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
|
|
|
|
} else {
|
|
|
|
modinfo->type = ETH_MODULE_SFF_8436;
|
|
|
|
modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case MLX4_MODULE_ID_QSFP28:
|
|
|
|
modinfo->type = ETH_MODULE_SFF_8636;
|
|
|
|
modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
|
|
|
|
break;
|
|
|
|
case MLX4_MODULE_ID_SFP:
|
|
|
|
modinfo->type = ETH_MODULE_SFF_8472;
|
|
|
|
modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -ENOSYS;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlx4_en_get_module_eeprom(struct net_device *dev,
|
|
|
|
struct ethtool_eeprom *ee,
|
|
|
|
u8 *data)
|
|
|
|
{
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_en_dev *mdev = priv->mdev;
|
|
|
|
int offset = ee->offset;
|
|
|
|
int i = 0, ret;
|
|
|
|
|
|
|
|
if (ee->len == 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
memset(data, 0, ee->len);
|
|
|
|
|
|
|
|
while (i < ee->len) {
|
|
|
|
en_dbg(DRV, priv,
|
|
|
|
"mlx4_get_module_info i(%d) offset(%d) len(%d)\n",
|
|
|
|
i, offset, ee->len - i);
|
|
|
|
|
|
|
|
ret = mlx4_get_module_info(mdev->dev, priv->port,
|
|
|
|
offset, ee->len - i, data + i);
|
|
|
|
|
|
|
|
if (!ret) /* Done reading */
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (ret < 0) {
|
|
|
|
en_err(priv,
|
|
|
|
"mlx4_get_module_info i(%d) offset(%d) bytes_to_read(%d) - FAILED (0x%x)\n",
|
|
|
|
i, offset, ee->len - i, ret);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
i += ret;
|
|
|
|
offset += ret;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
2014-07-22 19:44:10 +07:00
|
|
|
|
2015-04-02 20:31:20 +07:00
|
|
|
static int mlx4_en_set_phys_id(struct net_device *dev,
|
|
|
|
enum ethtool_phys_id_state state)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
u16 beacon_duration;
|
|
|
|
struct mlx4_en_priv *priv = netdev_priv(dev);
|
|
|
|
struct mlx4_en_dev *mdev = priv->mdev;
|
|
|
|
|
|
|
|
if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_BEACON))
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
|
|
|
|
switch (state) {
|
|
|
|
case ETHTOOL_ID_ACTIVE:
|
|
|
|
beacon_duration = PORT_BEACON_MAX_LIMIT;
|
|
|
|
break;
|
|
|
|
case ETHTOOL_ID_INACTIVE:
|
|
|
|
beacon_duration = 0;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = mlx4_SET_PORT_BEACON(mdev->dev, priv->port, beacon_duration);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2008-10-23 05:47:49 +07:00
|
|
|
const struct ethtool_ops mlx4_en_ethtool_ops = {
|
|
|
|
.get_drvinfo = mlx4_en_get_drvinfo,
|
|
|
|
.get_settings = mlx4_en_get_settings,
|
|
|
|
.set_settings = mlx4_en_set_settings,
|
|
|
|
.get_link = ethtool_op_get_link,
|
|
|
|
.get_strings = mlx4_en_get_strings,
|
|
|
|
.get_sset_count = mlx4_en_get_sset_count,
|
|
|
|
.get_ethtool_stats = mlx4_en_get_ethtool_stats,
|
2010-08-24 10:46:18 +07:00
|
|
|
.self_test = mlx4_en_self_test,
|
2015-04-02 20:31:20 +07:00
|
|
|
.set_phys_id = mlx4_en_set_phys_id,
|
2008-10-23 05:47:49 +07:00
|
|
|
.get_wol = mlx4_en_get_wol,
|
2011-03-23 05:37:59 +07:00
|
|
|
.set_wol = mlx4_en_set_wol,
|
2008-10-23 05:47:49 +07:00
|
|
|
.get_msglevel = mlx4_en_get_msglevel,
|
|
|
|
.set_msglevel = mlx4_en_set_msglevel,
|
|
|
|
.get_coalesce = mlx4_en_get_coalesce,
|
|
|
|
.set_coalesce = mlx4_en_set_coalesce,
|
|
|
|
.get_pauseparam = mlx4_en_get_pauseparam,
|
|
|
|
.set_pauseparam = mlx4_en_set_pauseparam,
|
|
|
|
.get_ringparam = mlx4_en_get_ringparam,
|
2008-12-30 09:39:20 +07:00
|
|
|
.set_ringparam = mlx4_en_set_ringparam,
|
2012-01-18 05:54:55 +07:00
|
|
|
.get_rxnfc = mlx4_en_get_rxnfc,
|
2012-07-05 11:03:49 +07:00
|
|
|
.set_rxnfc = mlx4_en_set_rxnfc,
|
2012-01-18 05:54:55 +07:00
|
|
|
.get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
|
2014-11-16 21:23:16 +07:00
|
|
|
.get_rxfh_key_size = mlx4_en_get_rxfh_key_size,
|
2014-05-15 07:25:27 +07:00
|
|
|
.get_rxfh = mlx4_en_get_rxfh,
|
|
|
|
.set_rxfh = mlx4_en_set_rxfh,
|
2012-12-02 10:49:23 +07:00
|
|
|
.get_channels = mlx4_en_get_channels,
|
|
|
|
.set_channels = mlx4_en_set_channels,
|
2013-04-23 13:06:49 +07:00
|
|
|
.get_ts_info = mlx4_en_get_ts_info,
|
2014-07-22 19:44:10 +07:00
|
|
|
.set_priv_flags = mlx4_en_set_priv_flags,
|
|
|
|
.get_priv_flags = mlx4_en_get_priv_flags,
|
2014-10-05 16:35:22 +07:00
|
|
|
.get_tunable = mlx4_en_get_tunable,
|
|
|
|
.set_tunable = mlx4_en_set_tunable,
|
2014-10-27 16:37:36 +07:00
|
|
|
.get_module_info = mlx4_en_get_module_info,
|
|
|
|
.get_module_eeprom = mlx4_en_get_module_eeprom
|
2008-10-23 05:47:49 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|