2005-04-17 05:20:36 +07:00
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#ifndef __ARM_MMU_H
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#define __ARM_MMU_H
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2006-06-21 02:46:52 +07:00
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#ifdef CONFIG_MMU
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2005-04-17 05:20:36 +07:00
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typedef struct {
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2007-05-17 16:19:23 +07:00
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#ifdef CONFIG_CPU_HAS_ASID
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2005-04-17 05:20:36 +07:00
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unsigned int id;
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2009-07-03 20:44:46 +07:00
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raw_spinlock_t id_lock;
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2005-04-17 05:20:36 +07:00
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#endif
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2006-06-30 02:17:15 +07:00
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unsigned int kvm_seq;
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2005-04-17 05:20:36 +07:00
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} mm_context_t;
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2007-05-17 16:19:23 +07:00
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#ifdef CONFIG_CPU_HAS_ASID
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2005-04-17 05:20:36 +07:00
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#define ASID(mm) ((mm)->context.id & 255)
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2010-11-23 17:39:23 +07:00
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/* init_mm.context.id_lock should be initialized. */
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#define INIT_MM_CONTEXT(name) \
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2009-07-03 20:44:46 +07:00
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.context.id_lock = __RAW_SPIN_LOCK_UNLOCKED(name.context.id_lock),
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2005-04-17 05:20:36 +07:00
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#else
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#define ASID(mm) (0)
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#endif
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2006-06-21 02:46:52 +07:00
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#else
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/*
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* From nommu.h:
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* Copyright (C) 2002, David McCullough <davidm@snapgear.com>
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* modified for 2.6 by Hyok S. Choi <hyok.choi@samsung.com>
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*/
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typedef struct {
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unsigned long end_brk;
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} mm_context_t;
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#endif
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2012-03-29 00:30:01 +07:00
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/*
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* switch_mm() may do a full cache flush over the context switch,
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* so enable interrupts over the context switch to avoid high
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* latency.
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*/
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#define __ARCH_WANT_INTERRUPTS_ON_CTXSW
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2005-04-17 05:20:36 +07:00
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#endif
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