2019-04-17 21:16:30 +07:00
|
|
|
// SPDX-License-Identifier: GPL-2.0+
|
|
|
|
//
|
|
|
|
// wm831x-dcdc.c -- DC-DC buck converter driver for the WM831x series
|
|
|
|
//
|
|
|
|
// Copyright 2009 Wolfson Microelectronics PLC.
|
|
|
|
//
|
|
|
|
// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
2009-07-28 21:21:49 +07:00
|
|
|
|
|
|
|
#include <linux/module.h>
|
|
|
|
#include <linux/moduleparam.h>
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/bitops.h>
|
|
|
|
#include <linux/err.h>
|
|
|
|
#include <linux/i2c.h>
|
|
|
|
#include <linux/platform_device.h>
|
|
|
|
#include <linux/regulator/driver.h>
|
2009-09-22 22:47:11 +07:00
|
|
|
#include <linux/regulator/machine.h>
|
2019-06-12 14:42:22 +07:00
|
|
|
#include <linux/gpio/consumer.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 15:04:11 +07:00
|
|
|
#include <linux/slab.h>
|
2009-07-28 21:21:49 +07:00
|
|
|
|
|
|
|
#include <linux/mfd/wm831x/core.h>
|
|
|
|
#include <linux/mfd/wm831x/regulator.h>
|
|
|
|
#include <linux/mfd/wm831x/pdata.h>
|
|
|
|
|
|
|
|
#define WM831X_BUCKV_MAX_SELECTOR 0x68
|
|
|
|
#define WM831X_BUCKP_MAX_SELECTOR 0x66
|
|
|
|
|
|
|
|
#define WM831X_DCDC_MODE_FAST 0
|
|
|
|
#define WM831X_DCDC_MODE_NORMAL 1
|
|
|
|
#define WM831X_DCDC_MODE_IDLE 2
|
|
|
|
#define WM831X_DCDC_MODE_STANDBY 3
|
|
|
|
|
2012-03-29 03:40:42 +07:00
|
|
|
#define WM831X_DCDC_MAX_NAME 9
|
2009-07-28 21:21:49 +07:00
|
|
|
|
|
|
|
/* Register offsets in control block */
|
|
|
|
#define WM831X_DCDC_CONTROL_1 0
|
|
|
|
#define WM831X_DCDC_CONTROL_2 1
|
|
|
|
#define WM831X_DCDC_ON_CONFIG 2
|
|
|
|
#define WM831X_DCDC_SLEEP_CONTROL 3
|
2009-09-22 22:47:11 +07:00
|
|
|
#define WM831X_DCDC_DVS_CONTROL 4
|
2009-07-28 21:21:49 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Shared
|
|
|
|
*/
|
|
|
|
|
|
|
|
struct wm831x_dcdc {
|
|
|
|
char name[WM831X_DCDC_MAX_NAME];
|
2012-03-29 03:40:42 +07:00
|
|
|
char supply_name[WM831X_DCDC_MAX_NAME];
|
2009-07-28 21:21:49 +07:00
|
|
|
struct regulator_desc desc;
|
|
|
|
int base;
|
|
|
|
struct wm831x *wm831x;
|
|
|
|
struct regulator_dev *regulator;
|
2019-06-12 14:42:22 +07:00
|
|
|
struct gpio_desc *dvs_gpiod;
|
2009-09-22 22:47:11 +07:00
|
|
|
int dvs_gpio_state;
|
|
|
|
int on_vsel;
|
|
|
|
int dvs_vsel;
|
2009-07-28 21:21:49 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
|
|
|
|
|
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
|
|
|
|
struct wm831x *wm831x = dcdc->wm831x;
|
|
|
|
u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
|
|
|
|
int val;
|
|
|
|
|
|
|
|
val = wm831x_reg_read(wm831x, reg);
|
|
|
|
if (val < 0)
|
|
|
|
return val;
|
|
|
|
|
|
|
|
val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
|
|
|
|
|
|
|
|
switch (val) {
|
|
|
|
case WM831X_DCDC_MODE_FAST:
|
|
|
|
return REGULATOR_MODE_FAST;
|
|
|
|
case WM831X_DCDC_MODE_NORMAL:
|
|
|
|
return REGULATOR_MODE_NORMAL;
|
|
|
|
case WM831X_DCDC_MODE_STANDBY:
|
|
|
|
return REGULATOR_MODE_STANDBY;
|
|
|
|
case WM831X_DCDC_MODE_IDLE:
|
|
|
|
return REGULATOR_MODE_IDLE;
|
|
|
|
default:
|
|
|
|
BUG();
|
2011-02-03 03:17:22 +07:00
|
|
|
return -EINVAL;
|
2009-07-28 21:21:49 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
|
|
|
|
unsigned int mode)
|
|
|
|
{
|
|
|
|
int val;
|
|
|
|
|
|
|
|
switch (mode) {
|
|
|
|
case REGULATOR_MODE_FAST:
|
|
|
|
val = WM831X_DCDC_MODE_FAST;
|
|
|
|
break;
|
|
|
|
case REGULATOR_MODE_NORMAL:
|
|
|
|
val = WM831X_DCDC_MODE_NORMAL;
|
|
|
|
break;
|
|
|
|
case REGULATOR_MODE_STANDBY:
|
|
|
|
val = WM831X_DCDC_MODE_STANDBY;
|
|
|
|
break;
|
|
|
|
case REGULATOR_MODE_IDLE:
|
|
|
|
val = WM831X_DCDC_MODE_IDLE;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
|
|
|
|
val << WM831X_DC1_ON_MODE_SHIFT);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
|
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
|
|
|
|
struct wm831x *wm831x = dcdc->wm831x;
|
|
|
|
u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
|
|
|
|
|
|
|
|
return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
|
|
|
|
unsigned int mode)
|
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
|
|
|
|
struct wm831x *wm831x = dcdc->wm831x;
|
|
|
|
u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
|
|
|
|
|
|
|
|
return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
|
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
|
|
|
|
struct wm831x *wm831x = dcdc->wm831x;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* First, check for errors */
|
|
|
|
ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
if (ret & (1 << rdev_get_id(rdev))) {
|
|
|
|
dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
|
|
|
|
rdev_get_id(rdev) + 1);
|
|
|
|
return REGULATOR_STATUS_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* DCDC1 and DCDC2 can additionally detect high voltage/current */
|
|
|
|
if (rdev_get_id(rdev) < 2) {
|
|
|
|
if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
|
|
|
|
dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
|
|
|
|
rdev_get_id(rdev) + 1);
|
|
|
|
return REGULATOR_STATUS_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
|
|
|
|
dev_dbg(wm831x->dev, "DCDC%d over current\n",
|
|
|
|
rdev_get_id(rdev) + 1);
|
|
|
|
return REGULATOR_STATUS_ERROR;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Is the regulator on? */
|
|
|
|
ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
if (!(ret & (1 << rdev_get_id(rdev))))
|
|
|
|
return REGULATOR_STATUS_OFF;
|
|
|
|
|
|
|
|
/* TODO: When we handle hardware control modes so we can report the
|
|
|
|
* current mode. */
|
|
|
|
return REGULATOR_STATUS_ON;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
|
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = data;
|
|
|
|
|
2019-02-26 22:48:46 +07:00
|
|
|
regulator_lock(dcdc->regulator);
|
2009-07-28 21:21:49 +07:00
|
|
|
regulator_notifier_call_chain(dcdc->regulator,
|
|
|
|
REGULATOR_EVENT_UNDER_VOLTAGE,
|
|
|
|
NULL);
|
2019-02-26 22:48:46 +07:00
|
|
|
regulator_unlock(dcdc->regulator);
|
2009-07-28 21:21:49 +07:00
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
|
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = data;
|
|
|
|
|
2019-02-26 22:48:46 +07:00
|
|
|
regulator_lock(dcdc->regulator);
|
2009-07-28 21:21:49 +07:00
|
|
|
regulator_notifier_call_chain(dcdc->regulator,
|
|
|
|
REGULATOR_EVENT_OVER_CURRENT,
|
|
|
|
NULL);
|
2019-02-26 22:48:46 +07:00
|
|
|
regulator_unlock(dcdc->regulator);
|
2009-07-28 21:21:49 +07:00
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* BUCKV specifics
|
|
|
|
*/
|
|
|
|
|
2020-05-08 22:43:36 +07:00
|
|
|
static const struct linear_range wm831x_buckv_ranges[] = {
|
2019-01-20 14:33:56 +07:00
|
|
|
REGULATOR_LINEAR_RANGE(600000, 0, 0x7, 0),
|
|
|
|
REGULATOR_LINEAR_RANGE(600000, 0x8, 0x68, 12500),
|
|
|
|
};
|
2009-09-22 22:47:11 +07:00
|
|
|
|
|
|
|
static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
|
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
|
|
|
|
|
|
|
|
if (state == dcdc->dvs_gpio_state)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
dcdc->dvs_gpio_state = state;
|
2019-06-12 14:42:22 +07:00
|
|
|
gpiod_set_value(dcdc->dvs_gpiod, state);
|
2009-09-22 22:47:11 +07:00
|
|
|
|
|
|
|
/* Should wait for DVS state change to be asserted if we have
|
|
|
|
* a GPIO for it, for now assume the device is configured
|
|
|
|
* for the fastest possible transition.
|
|
|
|
*/
|
|
|
|
|
|
|
|
return 0;
|
2009-07-28 21:21:49 +07:00
|
|
|
}
|
|
|
|
|
2012-06-13 19:29:17 +07:00
|
|
|
static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev,
|
|
|
|
unsigned vsel)
|
2009-07-28 21:21:49 +07:00
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
|
2009-09-22 22:47:11 +07:00
|
|
|
struct wm831x *wm831x = dcdc->wm831x;
|
|
|
|
int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
|
|
|
|
int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
|
2012-06-13 19:29:17 +07:00
|
|
|
int ret;
|
2010-11-10 21:38:29 +07:00
|
|
|
|
2009-09-22 22:47:11 +07:00
|
|
|
/* If this value is already set then do a GPIO update if we can */
|
2019-06-12 14:42:22 +07:00
|
|
|
if (dcdc->dvs_gpiod && dcdc->on_vsel == vsel)
|
2009-09-22 22:47:11 +07:00
|
|
|
return wm831x_buckv_set_dvs(rdev, 0);
|
|
|
|
|
2019-06-12 14:42:22 +07:00
|
|
|
if (dcdc->dvs_gpiod && dcdc->dvs_vsel == vsel)
|
2009-09-22 22:47:11 +07:00
|
|
|
return wm831x_buckv_set_dvs(rdev, 1);
|
|
|
|
|
|
|
|
/* Always set the ON status to the minimum voltage */
|
|
|
|
ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
dcdc->on_vsel = vsel;
|
|
|
|
|
2019-06-12 14:42:22 +07:00
|
|
|
if (!dcdc->dvs_gpiod)
|
2009-09-22 22:47:11 +07:00
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* Kick the voltage transition now */
|
|
|
|
ret = wm831x_buckv_set_dvs(rdev, 0);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2011-07-26 04:20:34 +07:00
|
|
|
/*
|
|
|
|
* If this VSEL is higher than the last one we've seen then
|
|
|
|
* remember it as the DVS VSEL. This is optimised for CPUfreq
|
|
|
|
* usage where we want to get to the highest voltage very
|
|
|
|
* quickly.
|
|
|
|
*/
|
|
|
|
if (vsel > dcdc->dvs_vsel) {
|
|
|
|
ret = wm831x_set_bits(wm831x, dvs_reg,
|
|
|
|
WM831X_DC1_DVS_VSEL_MASK,
|
2012-11-20 08:02:06 +07:00
|
|
|
vsel);
|
2011-07-26 04:20:34 +07:00
|
|
|
if (ret == 0)
|
|
|
|
dcdc->dvs_vsel = vsel;
|
|
|
|
else
|
|
|
|
dev_warn(wm831x->dev,
|
|
|
|
"Failed to set DCDC DVS VSEL: %d\n", ret);
|
2009-09-22 22:47:11 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2009-07-28 21:21:49 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
|
2009-09-22 22:47:11 +07:00
|
|
|
int uV)
|
2009-07-28 21:21:49 +07:00
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
|
2009-09-22 22:47:11 +07:00
|
|
|
struct wm831x *wm831x = dcdc->wm831x;
|
2009-07-28 21:21:49 +07:00
|
|
|
u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
|
2009-09-22 22:47:11 +07:00
|
|
|
int vsel;
|
|
|
|
|
2019-01-20 14:33:56 +07:00
|
|
|
vsel = regulator_map_voltage_linear_range(rdev, uV, uV);
|
2009-09-22 22:47:11 +07:00
|
|
|
if (vsel < 0)
|
|
|
|
return vsel;
|
2009-07-28 21:21:49 +07:00
|
|
|
|
2009-09-22 22:47:11 +07:00
|
|
|
return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
|
2009-07-28 21:21:49 +07:00
|
|
|
}
|
|
|
|
|
2010-12-11 00:28:08 +07:00
|
|
|
static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
|
2009-07-28 21:21:49 +07:00
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
|
|
|
|
|
2019-06-12 14:42:22 +07:00
|
|
|
if (dcdc->dvs_gpiod && dcdc->dvs_gpio_state)
|
2010-12-11 00:28:08 +07:00
|
|
|
return dcdc->dvs_vsel;
|
2009-09-22 22:47:11 +07:00
|
|
|
else
|
2010-12-11 00:28:08 +07:00
|
|
|
return dcdc->on_vsel;
|
2009-07-28 21:21:49 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Current limit options */
|
2019-02-24 20:16:51 +07:00
|
|
|
static const unsigned int wm831x_dcdc_ilim[] = {
|
|
|
|
125000, 250000, 375000, 500000, 625000, 750000, 875000, 1000000
|
2009-07-28 21:21:49 +07:00
|
|
|
};
|
|
|
|
|
2015-12-19 22:31:24 +07:00
|
|
|
static const struct regulator_ops wm831x_buckv_ops = {
|
2012-06-13 19:29:17 +07:00
|
|
|
.set_voltage_sel = wm831x_buckv_set_voltage_sel,
|
2010-12-11 00:28:08 +07:00
|
|
|
.get_voltage_sel = wm831x_buckv_get_voltage_sel,
|
2019-01-20 14:33:56 +07:00
|
|
|
.list_voltage = regulator_list_voltage_linear_range,
|
|
|
|
.map_voltage = regulator_map_voltage_linear_range,
|
2009-07-28 21:21:49 +07:00
|
|
|
.set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
|
2019-02-28 20:40:22 +07:00
|
|
|
.set_current_limit = regulator_set_current_limit_regmap,
|
|
|
|
.get_current_limit = regulator_get_current_limit_regmap,
|
2009-07-28 21:21:49 +07:00
|
|
|
|
2012-04-15 18:38:42 +07:00
|
|
|
.is_enabled = regulator_is_enabled_regmap,
|
|
|
|
.enable = regulator_enable_regmap,
|
|
|
|
.disable = regulator_disable_regmap,
|
2009-07-28 21:21:49 +07:00
|
|
|
.get_status = wm831x_dcdc_get_status,
|
|
|
|
.get_mode = wm831x_dcdc_get_mode,
|
|
|
|
.set_mode = wm831x_dcdc_set_mode,
|
|
|
|
.set_suspend_mode = wm831x_dcdc_set_suspend_mode,
|
|
|
|
};
|
|
|
|
|
2009-09-22 22:47:11 +07:00
|
|
|
/*
|
|
|
|
* Set up DVS control. We just log errors since we can still run
|
|
|
|
* (with reduced performance) if we fail.
|
|
|
|
*/
|
2013-08-31 17:42:46 +07:00
|
|
|
static void wm831x_buckv_dvs_init(struct platform_device *pdev,
|
|
|
|
struct wm831x_dcdc *dcdc,
|
|
|
|
struct wm831x_buckv_pdata *pdata)
|
2009-09-22 22:47:11 +07:00
|
|
|
{
|
|
|
|
struct wm831x *wm831x = dcdc->wm831x;
|
|
|
|
int ret;
|
|
|
|
u16 ctrl;
|
|
|
|
|
2019-06-12 14:42:22 +07:00
|
|
|
if (!pdata)
|
2009-09-22 22:47:11 +07:00
|
|
|
return;
|
|
|
|
|
|
|
|
/* gpiolib won't let us read the GPIO status so pick the higher
|
|
|
|
* of the two existing voltages so we take it as platform data.
|
|
|
|
*/
|
|
|
|
dcdc->dvs_gpio_state = pdata->dvs_init_state;
|
|
|
|
|
2019-06-12 14:42:22 +07:00
|
|
|
dcdc->dvs_gpiod = devm_gpiod_get(&pdev->dev, "dvs",
|
|
|
|
dcdc->dvs_gpio_state ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW);
|
|
|
|
if (IS_ERR(dcdc->dvs_gpiod)) {
|
|
|
|
dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %ld\n",
|
|
|
|
dcdc->name, PTR_ERR(dcdc->dvs_gpiod));
|
2009-09-22 22:47:11 +07:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2011-07-26 04:20:32 +07:00
|
|
|
switch (pdata->dvs_control_src) {
|
|
|
|
case 1:
|
|
|
|
ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
|
|
|
|
pdata->dvs_control_src, dcdc->name);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2011-07-26 04:20:33 +07:00
|
|
|
/* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
|
|
|
|
* to make bootstrapping a bit smoother.
|
|
|
|
*/
|
|
|
|
if (!dcdc->dvs_vsel) {
|
|
|
|
ret = wm831x_set_bits(wm831x,
|
|
|
|
dcdc->base + WM831X_DCDC_DVS_CONTROL,
|
|
|
|
WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
|
|
|
|
if (ret == 0)
|
|
|
|
dcdc->dvs_vsel = dcdc->on_vsel;
|
|
|
|
else
|
|
|
|
dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
|
|
|
|
ret);
|
|
|
|
}
|
|
|
|
|
2011-07-26 04:20:32 +07:00
|
|
|
ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
|
|
|
|
WM831X_DC1_DVS_SRC_MASK, ctrl);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
|
|
|
|
dcdc->name, ret);
|
|
|
|
}
|
2009-09-22 22:47:11 +07:00
|
|
|
}
|
|
|
|
|
2012-11-20 01:22:22 +07:00
|
|
|
static int wm831x_buckv_probe(struct platform_device *pdev)
|
2009-07-28 21:21:49 +07:00
|
|
|
{
|
|
|
|
struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
|
2013-07-30 15:20:47 +07:00
|
|
|
struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
|
2012-04-04 06:50:22 +07:00
|
|
|
struct regulator_config config = { };
|
2011-07-26 04:20:29 +07:00
|
|
|
int id;
|
2009-07-28 21:21:49 +07:00
|
|
|
struct wm831x_dcdc *dcdc;
|
|
|
|
struct resource *res;
|
|
|
|
int ret, irq;
|
|
|
|
|
2011-07-26 04:20:29 +07:00
|
|
|
if (pdata && pdata->wm831x_num)
|
|
|
|
id = (pdata->wm831x_num * 10) + 1;
|
|
|
|
else
|
|
|
|
id = 0;
|
|
|
|
id = pdev->id - id;
|
|
|
|
|
2009-07-28 21:21:49 +07:00
|
|
|
dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
|
|
|
|
|
2011-12-15 01:11:14 +07:00
|
|
|
dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
|
|
|
|
GFP_KERNEL);
|
2014-02-20 15:53:20 +07:00
|
|
|
if (!dcdc)
|
2009-07-28 21:21:49 +07:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dcdc->wm831x = wm831x;
|
|
|
|
|
2012-08-08 01:42:47 +07:00
|
|
|
res = platform_get_resource(pdev, IORESOURCE_REG, 0);
|
2009-07-28 21:21:49 +07:00
|
|
|
if (res == NULL) {
|
2012-08-08 01:42:47 +07:00
|
|
|
dev_err(&pdev->dev, "No REG resource\n");
|
2009-07-28 21:21:49 +07:00
|
|
|
ret = -EINVAL;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
dcdc->base = res->start;
|
|
|
|
|
|
|
|
snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
|
|
|
|
dcdc->desc.name = dcdc->name;
|
2012-03-29 03:40:42 +07:00
|
|
|
|
|
|
|
snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
|
|
|
|
"DC%dVDD", id + 1);
|
|
|
|
dcdc->desc.supply_name = dcdc->supply_name;
|
|
|
|
|
2009-07-28 21:21:49 +07:00
|
|
|
dcdc->desc.id = id;
|
|
|
|
dcdc->desc.type = REGULATOR_VOLTAGE;
|
|
|
|
dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
|
2019-01-20 14:33:56 +07:00
|
|
|
dcdc->desc.linear_ranges = wm831x_buckv_ranges;
|
|
|
|
dcdc->desc.n_linear_ranges = ARRAY_SIZE(wm831x_buckv_ranges);
|
2009-07-28 21:21:49 +07:00
|
|
|
dcdc->desc.ops = &wm831x_buckv_ops;
|
|
|
|
dcdc->desc.owner = THIS_MODULE;
|
2012-04-15 18:38:42 +07:00
|
|
|
dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
|
|
|
|
dcdc->desc.enable_mask = 1 << id;
|
2019-02-28 20:40:22 +07:00
|
|
|
dcdc->desc.csel_reg = dcdc->base + WM831X_DCDC_CONTROL_2;
|
|
|
|
dcdc->desc.csel_mask = WM831X_DC1_HC_THR_MASK;
|
|
|
|
dcdc->desc.n_current_limits = ARRAY_SIZE(wm831x_dcdc_ilim);
|
|
|
|
dcdc->desc.curr_table = wm831x_dcdc_ilim;
|
2009-07-28 21:21:49 +07:00
|
|
|
|
2009-09-22 22:47:11 +07:00
|
|
|
ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
|
|
|
|
|
2011-07-26 04:20:30 +07:00
|
|
|
ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
|
2009-09-22 22:47:11 +07:00
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
|
|
|
|
|
2012-05-14 17:37:09 +07:00
|
|
|
if (pdata && pdata->dcdc[id])
|
2013-08-31 17:42:46 +07:00
|
|
|
wm831x_buckv_dvs_init(pdev, dcdc,
|
|
|
|
pdata->dcdc[id]->driver_data);
|
2009-09-22 22:47:11 +07:00
|
|
|
|
2012-04-04 06:50:22 +07:00
|
|
|
config.dev = pdev->dev.parent;
|
2012-05-10 06:41:02 +07:00
|
|
|
if (pdata)
|
|
|
|
config.init_data = pdata->dcdc[id];
|
2012-04-04 06:50:22 +07:00
|
|
|
config.driver_data = dcdc;
|
2012-04-15 18:38:42 +07:00
|
|
|
config.regmap = wm831x->regmap;
|
2012-04-04 06:50:22 +07:00
|
|
|
|
2013-08-31 17:58:40 +07:00
|
|
|
dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
|
|
|
|
&config);
|
2009-07-28 21:21:49 +07:00
|
|
|
if (IS_ERR(dcdc->regulator)) {
|
|
|
|
ret = PTR_ERR(dcdc->regulator);
|
|
|
|
dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
|
|
|
|
id + 1, ret);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
2012-05-15 04:14:24 +07:00
|
|
|
irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
|
2013-08-31 17:47:39 +07:00
|
|
|
ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
|
|
|
|
wm831x_dcdc_uv_irq,
|
2015-06-02 08:33:53 +07:00
|
|
|
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
|
|
|
|
dcdc->name, dcdc);
|
2009-07-28 21:21:49 +07:00
|
|
|
if (ret != 0) {
|
|
|
|
dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
|
|
|
|
irq, ret);
|
2013-08-31 17:58:40 +07:00
|
|
|
goto err;
|
2009-07-28 21:21:49 +07:00
|
|
|
}
|
|
|
|
|
2012-05-15 04:14:24 +07:00
|
|
|
irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
|
2013-08-31 17:47:39 +07:00
|
|
|
ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
|
|
|
|
wm831x_dcdc_oc_irq,
|
2015-06-02 08:33:53 +07:00
|
|
|
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
|
|
|
|
dcdc->name, dcdc);
|
2009-07-28 21:21:49 +07:00
|
|
|
if (ret != 0) {
|
|
|
|
dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
|
|
|
|
irq, ret);
|
2013-08-31 17:58:40 +07:00
|
|
|
goto err;
|
2009-07-28 21:21:49 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, dcdc);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver wm831x_buckv_driver = {
|
|
|
|
.probe = wm831x_buckv_probe,
|
|
|
|
.driver = {
|
|
|
|
.name = "wm831x-buckv",
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* BUCKP specifics
|
|
|
|
*/
|
|
|
|
|
2012-06-13 19:27:58 +07:00
|
|
|
static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV)
|
2009-07-28 21:21:49 +07:00
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
|
|
|
|
struct wm831x *wm831x = dcdc->wm831x;
|
|
|
|
u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
|
2012-06-13 19:27:58 +07:00
|
|
|
int sel;
|
|
|
|
|
|
|
|
sel = regulator_map_voltage_linear(rdev, uV, uV);
|
|
|
|
if (sel < 0)
|
|
|
|
return sel;
|
2009-07-28 21:21:49 +07:00
|
|
|
|
2012-06-13 19:27:58 +07:00
|
|
|
return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel);
|
2009-07-28 21:21:49 +07:00
|
|
|
}
|
|
|
|
|
2015-12-19 22:31:24 +07:00
|
|
|
static const struct regulator_ops wm831x_buckp_ops = {
|
2012-06-13 19:27:58 +07:00
|
|
|
.set_voltage_sel = regulator_set_voltage_sel_regmap,
|
2012-04-15 17:55:34 +07:00
|
|
|
.get_voltage_sel = regulator_get_voltage_sel_regmap,
|
2012-06-13 19:27:14 +07:00
|
|
|
.list_voltage = regulator_list_voltage_linear,
|
2012-06-13 19:27:58 +07:00
|
|
|
.map_voltage = regulator_map_voltage_linear,
|
2009-07-28 21:21:49 +07:00
|
|
|
.set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
|
|
|
|
|
2012-04-15 18:38:42 +07:00
|
|
|
.is_enabled = regulator_is_enabled_regmap,
|
|
|
|
.enable = regulator_enable_regmap,
|
|
|
|
.disable = regulator_disable_regmap,
|
2009-07-28 21:21:49 +07:00
|
|
|
.get_status = wm831x_dcdc_get_status,
|
|
|
|
.get_mode = wm831x_dcdc_get_mode,
|
|
|
|
.set_mode = wm831x_dcdc_set_mode,
|
|
|
|
.set_suspend_mode = wm831x_dcdc_set_suspend_mode,
|
|
|
|
};
|
|
|
|
|
2012-11-20 01:22:22 +07:00
|
|
|
static int wm831x_buckp_probe(struct platform_device *pdev)
|
2009-07-28 21:21:49 +07:00
|
|
|
{
|
|
|
|
struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
|
2013-07-30 15:20:47 +07:00
|
|
|
struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
|
2012-04-04 06:50:22 +07:00
|
|
|
struct regulator_config config = { };
|
2011-07-26 04:20:29 +07:00
|
|
|
int id;
|
2009-07-28 21:21:49 +07:00
|
|
|
struct wm831x_dcdc *dcdc;
|
|
|
|
struct resource *res;
|
|
|
|
int ret, irq;
|
|
|
|
|
2011-07-26 04:20:29 +07:00
|
|
|
if (pdata && pdata->wm831x_num)
|
|
|
|
id = (pdata->wm831x_num * 10) + 1;
|
|
|
|
else
|
|
|
|
id = 0;
|
|
|
|
id = pdev->id - id;
|
|
|
|
|
2009-07-28 21:21:49 +07:00
|
|
|
dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
|
|
|
|
|
2011-12-15 01:11:14 +07:00
|
|
|
dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
|
|
|
|
GFP_KERNEL);
|
2014-02-20 15:53:20 +07:00
|
|
|
if (!dcdc)
|
2009-07-28 21:21:49 +07:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dcdc->wm831x = wm831x;
|
|
|
|
|
2012-08-08 01:42:47 +07:00
|
|
|
res = platform_get_resource(pdev, IORESOURCE_REG, 0);
|
2009-07-28 21:21:49 +07:00
|
|
|
if (res == NULL) {
|
2012-08-08 01:42:47 +07:00
|
|
|
dev_err(&pdev->dev, "No REG resource\n");
|
2009-07-28 21:21:49 +07:00
|
|
|
ret = -EINVAL;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
dcdc->base = res->start;
|
|
|
|
|
|
|
|
snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
|
|
|
|
dcdc->desc.name = dcdc->name;
|
2012-03-29 03:40:42 +07:00
|
|
|
|
|
|
|
snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
|
|
|
|
"DC%dVDD", id + 1);
|
|
|
|
dcdc->desc.supply_name = dcdc->supply_name;
|
|
|
|
|
2009-07-28 21:21:49 +07:00
|
|
|
dcdc->desc.id = id;
|
|
|
|
dcdc->desc.type = REGULATOR_VOLTAGE;
|
|
|
|
dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
|
|
|
|
dcdc->desc.ops = &wm831x_buckp_ops;
|
|
|
|
dcdc->desc.owner = THIS_MODULE;
|
2012-04-15 17:55:34 +07:00
|
|
|
dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
|
|
|
|
dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
|
2012-04-15 18:38:42 +07:00
|
|
|
dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
|
|
|
|
dcdc->desc.enable_mask = 1 << id;
|
2012-06-13 19:27:14 +07:00
|
|
|
dcdc->desc.min_uV = 850000;
|
|
|
|
dcdc->desc.uV_step = 25000;
|
2009-07-28 21:21:49 +07:00
|
|
|
|
2012-04-04 06:50:22 +07:00
|
|
|
config.dev = pdev->dev.parent;
|
2012-05-10 06:41:02 +07:00
|
|
|
if (pdata)
|
|
|
|
config.init_data = pdata->dcdc[id];
|
2012-04-04 06:50:22 +07:00
|
|
|
config.driver_data = dcdc;
|
2012-04-15 17:55:34 +07:00
|
|
|
config.regmap = wm831x->regmap;
|
2012-04-04 06:50:22 +07:00
|
|
|
|
2013-08-31 17:58:40 +07:00
|
|
|
dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
|
|
|
|
&config);
|
2009-07-28 21:21:49 +07:00
|
|
|
if (IS_ERR(dcdc->regulator)) {
|
|
|
|
ret = PTR_ERR(dcdc->regulator);
|
|
|
|
dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
|
|
|
|
id + 1, ret);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
2012-05-15 04:14:24 +07:00
|
|
|
irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
|
2013-08-31 17:47:39 +07:00
|
|
|
ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
|
|
|
|
wm831x_dcdc_uv_irq,
|
2015-06-02 08:33:53 +07:00
|
|
|
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
|
|
|
|
dcdc->name, dcdc);
|
2009-07-28 21:21:49 +07:00
|
|
|
if (ret != 0) {
|
|
|
|
dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
|
|
|
|
irq, ret);
|
2013-08-31 17:58:40 +07:00
|
|
|
goto err;
|
2009-07-28 21:21:49 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, dcdc);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver wm831x_buckp_driver = {
|
|
|
|
.probe = wm831x_buckp_probe,
|
|
|
|
.driver = {
|
|
|
|
.name = "wm831x-buckp",
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2009-07-28 21:23:16 +07:00
|
|
|
/*
|
|
|
|
* DCDC boost convertors
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int wm831x_boostp_get_status(struct regulator_dev *rdev)
|
|
|
|
{
|
|
|
|
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
|
|
|
|
struct wm831x *wm831x = dcdc->wm831x;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* First, check for errors */
|
|
|
|
ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
if (ret & (1 << rdev_get_id(rdev))) {
|
|
|
|
dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
|
|
|
|
rdev_get_id(rdev) + 1);
|
|
|
|
return REGULATOR_STATUS_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Is the regulator on? */
|
|
|
|
ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
if (ret & (1 << rdev_get_id(rdev)))
|
|
|
|
return REGULATOR_STATUS_ON;
|
|
|
|
else
|
|
|
|
return REGULATOR_STATUS_OFF;
|
|
|
|
}
|
|
|
|
|
2015-12-19 22:31:24 +07:00
|
|
|
static const struct regulator_ops wm831x_boostp_ops = {
|
2009-07-28 21:23:16 +07:00
|
|
|
.get_status = wm831x_boostp_get_status,
|
|
|
|
|
2012-04-15 18:38:42 +07:00
|
|
|
.is_enabled = regulator_is_enabled_regmap,
|
|
|
|
.enable = regulator_enable_regmap,
|
|
|
|
.disable = regulator_disable_regmap,
|
2009-07-28 21:23:16 +07:00
|
|
|
};
|
|
|
|
|
2012-11-20 01:22:22 +07:00
|
|
|
static int wm831x_boostp_probe(struct platform_device *pdev)
|
2009-07-28 21:23:16 +07:00
|
|
|
{
|
|
|
|
struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
|
2013-07-30 15:20:47 +07:00
|
|
|
struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
|
2012-04-04 06:50:22 +07:00
|
|
|
struct regulator_config config = { };
|
2009-07-28 21:23:16 +07:00
|
|
|
int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
|
|
|
|
struct wm831x_dcdc *dcdc;
|
|
|
|
struct resource *res;
|
|
|
|
int ret, irq;
|
|
|
|
|
|
|
|
dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
|
|
|
|
|
|
|
|
if (pdata == NULL || pdata->dcdc[id] == NULL)
|
|
|
|
return -ENODEV;
|
|
|
|
|
2012-03-23 16:00:01 +07:00
|
|
|
dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
|
2014-02-20 15:53:20 +07:00
|
|
|
if (!dcdc)
|
2009-07-28 21:23:16 +07:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dcdc->wm831x = wm831x;
|
|
|
|
|
2012-08-08 01:42:47 +07:00
|
|
|
res = platform_get_resource(pdev, IORESOURCE_REG, 0);
|
2009-07-28 21:23:16 +07:00
|
|
|
if (res == NULL) {
|
2012-08-08 01:42:47 +07:00
|
|
|
dev_err(&pdev->dev, "No REG resource\n");
|
2013-12-31 03:03:24 +07:00
|
|
|
return -EINVAL;
|
2009-07-28 21:23:16 +07:00
|
|
|
}
|
|
|
|
dcdc->base = res->start;
|
|
|
|
|
|
|
|
snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
|
|
|
|
dcdc->desc.name = dcdc->name;
|
|
|
|
dcdc->desc.id = id;
|
|
|
|
dcdc->desc.type = REGULATOR_VOLTAGE;
|
|
|
|
dcdc->desc.ops = &wm831x_boostp_ops;
|
|
|
|
dcdc->desc.owner = THIS_MODULE;
|
2012-04-15 18:38:42 +07:00
|
|
|
dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
|
|
|
|
dcdc->desc.enable_mask = 1 << id;
|
2009-07-28 21:23:16 +07:00
|
|
|
|
2012-04-04 06:50:22 +07:00
|
|
|
config.dev = pdev->dev.parent;
|
2012-05-14 17:37:09 +07:00
|
|
|
if (pdata)
|
|
|
|
config.init_data = pdata->dcdc[id];
|
2012-04-04 06:50:22 +07:00
|
|
|
config.driver_data = dcdc;
|
2012-04-15 18:38:42 +07:00
|
|
|
config.regmap = wm831x->regmap;
|
2012-04-04 06:50:22 +07:00
|
|
|
|
2013-08-31 17:58:40 +07:00
|
|
|
dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
|
|
|
|
&config);
|
2009-07-28 21:23:16 +07:00
|
|
|
if (IS_ERR(dcdc->regulator)) {
|
|
|
|
ret = PTR_ERR(dcdc->regulator);
|
|
|
|
dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
|
|
|
|
id + 1, ret);
|
2013-12-31 03:03:24 +07:00
|
|
|
return ret;
|
2009-07-28 21:23:16 +07:00
|
|
|
}
|
|
|
|
|
2012-05-15 04:14:24 +07:00
|
|
|
irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
|
2013-08-31 17:47:39 +07:00
|
|
|
ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
|
|
|
|
wm831x_dcdc_uv_irq,
|
2015-06-02 08:33:53 +07:00
|
|
|
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
|
|
|
|
dcdc->name,
|
2013-08-31 17:47:39 +07:00
|
|
|
dcdc);
|
2009-07-28 21:23:16 +07:00
|
|
|
if (ret != 0) {
|
|
|
|
dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
|
|
|
|
irq, ret);
|
2013-12-31 03:03:24 +07:00
|
|
|
return ret;
|
2009-07-28 21:23:16 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, dcdc);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver wm831x_boostp_driver = {
|
|
|
|
.probe = wm831x_boostp_probe,
|
|
|
|
.driver = {
|
|
|
|
.name = "wm831x-boostp",
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2009-07-28 21:22:23 +07:00
|
|
|
/*
|
|
|
|
* External Power Enable
|
|
|
|
*
|
|
|
|
* These aren't actually DCDCs but look like them in hardware so share
|
|
|
|
* code.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define WM831X_EPE_BASE 6
|
|
|
|
|
2015-12-19 22:31:24 +07:00
|
|
|
static const struct regulator_ops wm831x_epe_ops = {
|
2012-04-15 18:38:42 +07:00
|
|
|
.is_enabled = regulator_is_enabled_regmap,
|
|
|
|
.enable = regulator_enable_regmap,
|
|
|
|
.disable = regulator_disable_regmap,
|
2009-07-28 21:22:23 +07:00
|
|
|
.get_status = wm831x_dcdc_get_status,
|
|
|
|
};
|
|
|
|
|
2012-11-20 01:22:22 +07:00
|
|
|
static int wm831x_epe_probe(struct platform_device *pdev)
|
2009-07-28 21:22:23 +07:00
|
|
|
{
|
|
|
|
struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
|
2013-07-30 15:20:47 +07:00
|
|
|
struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
|
2012-04-04 06:50:22 +07:00
|
|
|
struct regulator_config config = { };
|
2009-07-28 21:22:23 +07:00
|
|
|
int id = pdev->id % ARRAY_SIZE(pdata->epe);
|
|
|
|
struct wm831x_dcdc *dcdc;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
|
|
|
|
|
2012-03-23 16:00:01 +07:00
|
|
|
dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
|
2014-02-20 15:53:20 +07:00
|
|
|
if (!dcdc)
|
2009-07-28 21:22:23 +07:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dcdc->wm831x = wm831x;
|
|
|
|
|
|
|
|
/* For current parts this is correct; probably need to revisit
|
|
|
|
* in future.
|
|
|
|
*/
|
|
|
|
snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
|
|
|
|
dcdc->desc.name = dcdc->name;
|
|
|
|
dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
|
|
|
|
dcdc->desc.ops = &wm831x_epe_ops;
|
|
|
|
dcdc->desc.type = REGULATOR_VOLTAGE;
|
|
|
|
dcdc->desc.owner = THIS_MODULE;
|
2012-04-15 18:38:42 +07:00
|
|
|
dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
|
|
|
|
dcdc->desc.enable_mask = 1 << dcdc->desc.id;
|
2009-07-28 21:22:23 +07:00
|
|
|
|
2012-04-04 06:50:22 +07:00
|
|
|
config.dev = pdev->dev.parent;
|
2012-05-10 06:41:02 +07:00
|
|
|
if (pdata)
|
|
|
|
config.init_data = pdata->epe[id];
|
2012-04-04 06:50:22 +07:00
|
|
|
config.driver_data = dcdc;
|
2012-04-15 18:38:42 +07:00
|
|
|
config.regmap = wm831x->regmap;
|
2012-04-04 06:50:22 +07:00
|
|
|
|
2013-08-31 17:58:40 +07:00
|
|
|
dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
|
|
|
|
&config);
|
2009-07-28 21:22:23 +07:00
|
|
|
if (IS_ERR(dcdc->regulator)) {
|
|
|
|
ret = PTR_ERR(dcdc->regulator);
|
|
|
|
dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
|
|
|
|
id + 1, ret);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, dcdc);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver wm831x_epe_driver = {
|
|
|
|
.probe = wm831x_epe_probe,
|
|
|
|
.driver = {
|
|
|
|
.name = "wm831x-epe",
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2015-12-02 23:32:52 +07:00
|
|
|
static struct platform_driver * const drivers[] = {
|
|
|
|
&wm831x_buckv_driver,
|
|
|
|
&wm831x_buckp_driver,
|
|
|
|
&wm831x_boostp_driver,
|
|
|
|
&wm831x_epe_driver,
|
|
|
|
};
|
|
|
|
|
2009-07-28 21:21:49 +07:00
|
|
|
static int __init wm831x_dcdc_init(void)
|
|
|
|
{
|
2015-12-02 23:32:52 +07:00
|
|
|
return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
|
2009-07-28 21:21:49 +07:00
|
|
|
}
|
|
|
|
subsys_initcall(wm831x_dcdc_init);
|
|
|
|
|
|
|
|
static void __exit wm831x_dcdc_exit(void)
|
|
|
|
{
|
2015-12-02 23:32:52 +07:00
|
|
|
platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
|
2009-07-28 21:21:49 +07:00
|
|
|
}
|
|
|
|
module_exit(wm831x_dcdc_exit);
|
|
|
|
|
|
|
|
/* Module information */
|
|
|
|
MODULE_AUTHOR("Mark Brown");
|
|
|
|
MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_ALIAS("platform:wm831x-buckv");
|
|
|
|
MODULE_ALIAS("platform:wm831x-buckp");
|
2012-11-30 19:39:53 +07:00
|
|
|
MODULE_ALIAS("platform:wm831x-boostp");
|
2011-07-26 04:20:31 +07:00
|
|
|
MODULE_ALIAS("platform:wm831x-epe");
|